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GET /api/patches/83975/?format=api
{ "id": 83975, "url": "http://patches.dpdk.org/api/patches/83975/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201111064936.768604-33-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201111064936.768604-33-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201111064936.768604-33-jiawenwu@trustnetic.com", "date": "2020-11-11T06:49:31", "name": "[v2,32/37] net/txgbe: add macsec setting", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "0b1e7a3076952448ba0da0bbc4ec6911702ea9d9", "submitter": { "id": 1932, "url": "http://patches.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201111064936.768604-33-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 13798, "url": "http://patches.dpdk.org/api/series/13798/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13798", "date": "2020-11-11T06:49:00", "name": "net: add txgbe PMD part 2", "version": 2, "mbox": "http://patches.dpdk.org/series/13798/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/83975/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/83975/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C41EBA09D2;\n\tWed, 11 Nov 2020 07:59:14 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 04C61C858;\n\tWed, 11 Nov 2020 07:48:28 +0100 (CET)", "from smtpbg511.qq.com (smtpbg511.qq.com [203.205.250.109])\n by dpdk.org (Postfix) with ESMTP id 2D8A1BE9F\n for <dev@dpdk.org>; Wed, 11 Nov 2020 07:48:09 +0100 (CET)", "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp10.qq.com (ESMTP) with\n id ; Wed, 11 Nov 2020 14:48:01 +0800 (CST)" ], "X-QQ-mid": "bizesmtp27t1605077282t9q4pb7n", "X-QQ-SSF": "01400000000000C0C000B00A0000000", "X-QQ-FEAT": "mAJfWfDYrJNiKGdnxvCb2VXX7qK6d0BDdGFTf7KaSonNExGGS5WvLrX/xQoJZ\n moMdpjK6SS7tKZSaygIYMIlaRicOQYNTLjH3miff6mMr2bW/FhSCzxWuZbTD+CmIF6w5V22\n cSqaYvSk103oraGPFE/F29+0lknGOjISJNHfKo02Hm4epibaO96XyM0kaqT/6GdbMFagQbt\n KMgZFZgZZVZz2c4vcK7nZQV9/RoZzq6ooDiNx5fGm1cGJs2DmnnvPvpCJtj9m2E/Zrj5Jwr\n FgtLUQEWBpsb/EO7HkmlIxbNxSsVLHyv99gebB8Wp35KqF2dpL4B9emtbyDJtiH8f9VG99S\n 1Hc1KSGx8pm4+e64+yc4ZmhX5LzMQ==", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>", "Date": "Wed, 11 Nov 2020 14:49:31 +0800", "Message-Id": "<20201111064936.768604-33-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.18.4", "In-Reply-To": "<20201111064936.768604-1-jiawenwu@trustnetic.com>", "References": "<20201111064936.768604-1-jiawenwu@trustnetic.com>", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign5", "X-QQ-Bgrelay": "1", "Subject": "[dpdk-dev] [PATCH v2 32/37] net/txgbe: add macsec setting", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add macsec register enable and setting reset operations.\nAdd macsec offload suuport.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n doc/guides/nics/features/txgbe.ini | 1 +\n drivers/net/txgbe/txgbe_ethdev.c | 87 ++++++++++++++++++++++++++++++\n drivers/net/txgbe/txgbe_ethdev.h | 17 ++++++\n drivers/net/txgbe/txgbe_rxtx.c | 3 ++\n 4 files changed, 108 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/txgbe.ini b/doc/guides/nics/features/txgbe.ini\nindex ffeecfd20..6f721ff1c 100644\n--- a/doc/guides/nics/features/txgbe.ini\n+++ b/doc/guides/nics/features/txgbe.ini\n@@ -33,6 +33,7 @@ VLAN offload = P\n QinQ offload = P\n L3 checksum offload = P\n L4 checksum offload = P\n+MACsec offload = P\n Inner L3 checksum = P\n Inner L4 checksum = P\n Packet type parsing = Y\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex 22bc2c004..5f7db6b7b 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -487,6 +487,8 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)\n \n \tPMD_INIT_FUNC_TRACE();\n \n+\ttxgbe_dev_macsec_setting_reset(eth_dev);\n+\n \teth_dev->dev_ops = &txgbe_eth_dev_ops;\n \teth_dev->rx_queue_count = txgbe_dev_rx_queue_count;\n \teth_dev->rx_descriptor_status = txgbe_dev_rx_descriptor_status;\n@@ -1549,6 +1551,8 @@ txgbe_dev_start(struct rte_eth_dev *dev)\n \tuint16_t vf, idx;\n \tuint32_t *link_speeds;\n \tstruct txgbe_tm_conf *tm_conf = TXGBE_DEV_TM_CONF(dev);\n+\tstruct txgbe_macsec_setting *macsec_setting =\n+\t\t\t\tTXGBE_DEV_MACSEC_SETTING(dev);\n \n \tPMD_INIT_FUNC_TRACE();\n \n@@ -1763,6 +1767,10 @@ txgbe_dev_start(struct rte_eth_dev *dev)\n \t */\n \ttxgbe_dev_link_update(dev, 0);\n \n+\t/* setup the macsec ctrl register */\n+\tif (macsec_setting->offload_en)\n+\t\ttxgbe_dev_macsec_register_enable(dev, macsec_setting);\n+\n \twr32m(hw, TXGBE_LEDCTL, 0xFFFFFFFF, TXGBE_LEDCTL_ORD_MASK);\n \n \ttxgbe_read_stats_registers(hw, hw_stats);\n@@ -5142,6 +5150,85 @@ txgbe_clear_all_l2_tn_filter(struct rte_eth_dev *dev)\n \treturn 0;\n }\n \n+void\n+txgbe_dev_macsec_setting_reset(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_macsec_setting *macsec = TXGBE_DEV_MACSEC_SETTING(dev);\n+\n+\tmacsec->offload_en = 0;\n+\tmacsec->encrypt_en = 0;\n+\tmacsec->replayprotect_en = 0;\n+}\n+\n+void\n+txgbe_dev_macsec_register_enable(struct rte_eth_dev *dev,\n+\t\t\t\tstruct txgbe_macsec_setting *macsec_setting)\n+{\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tuint32_t ctrl;\n+\tuint8_t en = macsec_setting->encrypt_en;\n+\tuint8_t rp = macsec_setting->replayprotect_en;\n+\n+\t/**\n+\t * Workaround:\n+\t * As no txgbe_disable_sec_rx_path equivalent is\n+\t * implemented for tx in the base code, and we are\n+\t * not allowed to modify the base code in DPDK, so\n+\t * just call the hand-written one directly for now.\n+\t * The hardware support has been checked by\n+\t * txgbe_disable_sec_rx_path().\n+\t */\n+\ttxgbe_disable_sec_tx_path(hw);\n+\n+\t/* Enable Ethernet CRC (required by MACsec offload) */\n+\tctrl = rd32(hw, TXGBE_SECRXCTL);\n+\tctrl |= TXGBE_SECRXCTL_CRCSTRIP;\n+\twr32(hw, TXGBE_SECRXCTL, ctrl);\n+\n+\t/* Enable the TX and RX crypto engines */\n+\tctrl = rd32(hw, TXGBE_SECTXCTL);\n+\tctrl &= ~TXGBE_SECTXCTL_XDSA;\n+\twr32(hw, TXGBE_SECTXCTL, ctrl);\n+\n+\tctrl = rd32(hw, TXGBE_SECRXCTL);\n+\tctrl &= ~TXGBE_SECRXCTL_XDSA;\n+\twr32(hw, TXGBE_SECRXCTL, ctrl);\n+\n+\tctrl = rd32(hw, TXGBE_SECTXIFG);\n+\tctrl &= ~TXGBE_SECTXIFG_MIN_MASK;\n+\tctrl |= TXGBE_SECTXIFG_MIN(0x3);\n+\twr32(hw, TXGBE_SECTXIFG, ctrl);\n+\n+\t/* Enable SA lookup */\n+\tctrl = rd32(hw, TXGBE_LSECTXCTL);\n+\tctrl &= ~TXGBE_LSECTXCTL_MODE_MASK;\n+\tctrl |= en ? TXGBE_LSECTXCTL_MODE_AENC : TXGBE_LSECTXCTL_MODE_AUTH;\n+\tctrl &= ~TXGBE_LSECTXCTL_PNTRH_MASK;\n+\tctrl |= TXGBE_LSECTXCTL_PNTRH(TXGBE_MACSEC_PNTHRSH);\n+\twr32(hw, TXGBE_LSECTXCTL, ctrl);\n+\n+\tctrl = rd32(hw, TXGBE_LSECRXCTL);\n+\tctrl &= ~TXGBE_LSECRXCTL_MODE_MASK;\n+\tctrl |= TXGBE_LSECRXCTL_MODE_STRICT;\n+\tctrl &= ~TXGBE_LSECRXCTL_POSTHDR;\n+\tif (rp)\n+\t\tctrl |= TXGBE_LSECRXCTL_REPLAY;\n+\telse\n+\t\tctrl &= ~TXGBE_LSECRXCTL_REPLAY;\n+\twr32(hw, TXGBE_LSECRXCTL, ctrl);\n+\n+\t/* Start the data paths */\n+\ttxgbe_enable_sec_rx_path(hw);\n+\t/**\n+\t * Workaround:\n+\t * As no txgbe_enable_sec_rx_path equivalent is\n+\t * implemented for tx in the base code, and we are\n+\t * not allowed to modify the base code in DPDK, so\n+\t * just call the hand-written one directly for now.\n+\t */\n+\ttxgbe_enable_sec_tx_path(hw);\n+}\n+\n static const struct eth_dev_ops txgbe_eth_dev_ops = {\n \t.dev_configure = txgbe_dev_configure,\n \t.dev_infos_get = txgbe_dev_info_get,\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h\nindex 5f988eead..73e3fe8da 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.h\n+++ b/drivers/net/txgbe/txgbe_ethdev.h\n@@ -62,6 +62,8 @@\n #define TXGBE_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET\n #define TXGBE_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET\n \n+#define TXGBE_MACSEC_PNTHRSH 0xFFFFFE00\n+\n #define TXGBE_MAX_FDIR_FILTER_NUM (1024 * 32)\n #define TXGBE_MAX_L2_TN_FILTER_NUM 128\n \n@@ -270,6 +272,12 @@ struct rte_flow {\n \tvoid *rule;\n };\n \n+struct txgbe_macsec_setting {\n+\tuint8_t offload_en;\n+\tuint8_t encrypt_en;\n+\tuint8_t replayprotect_en;\n+};\n+\n /* The configuration of bandwidth */\n struct txgbe_bw_conf {\n \tuint8_t tc_num; /* Number of TCs. */\n@@ -343,6 +351,7 @@ struct txgbe_tm_conf {\n struct txgbe_adapter {\n \tstruct txgbe_hw hw;\n \tstruct txgbe_hw_stats stats;\n+\tstruct txgbe_macsec_setting macsec_setting;\n \tstruct txgbe_hw_fdir_info fdir;\n \tstruct txgbe_interrupt intr;\n \tstruct txgbe_stat_mappings stat_mappings;\n@@ -374,6 +383,9 @@ struct txgbe_adapter {\n #define TXGBE_DEV_STATS(dev) \\\n \t(&((struct txgbe_adapter *)(dev)->data->dev_private)->stats)\n \n+#define TXGBE_DEV_MACSEC_SETTING(dev) \\\n+\t(&((struct txgbe_adapter *)(dev)->data->dev_private)->macsec_setting)\n+\n #define TXGBE_DEV_INTR(dev) \\\n \t(&((struct txgbe_adapter *)(dev)->data->dev_private)->intr)\n \n@@ -578,6 +590,11 @@ int txgbe_action_rss_same(const struct rte_flow_action_rss *comp,\n int txgbe_config_rss_filter(struct rte_eth_dev *dev,\n \t\tstruct txgbe_rte_flow_rss_conf *conf, bool add);\n \n+void txgbe_dev_macsec_register_enable(struct rte_eth_dev *dev,\n+\t\tstruct txgbe_macsec_setting *macsec_setting);\n+\n+void txgbe_dev_macsec_setting_reset(struct rte_eth_dev *dev);\n+\n static inline int\n txgbe_ethertype_filter_lookup(struct txgbe_filter_info *filter_info,\n \t\t\t uint16_t ethertype)\ndiff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c\nindex 209660656..857feba9b 100644\n--- a/drivers/net/txgbe/txgbe_rxtx.c\n+++ b/drivers/net/txgbe/txgbe_rxtx.c\n@@ -56,6 +56,9 @@ static const u64 TXGBE_TX_OFFLOAD_MASK = (PKT_TX_IP_CKSUM |\n \t\tPKT_TX_L4_MASK |\n \t\tPKT_TX_TCP_SEG |\n \t\tPKT_TX_TUNNEL_MASK |\n+#ifdef RTE_LIBRTE_MACSEC\n+\t\tPKT_TX_MACSEC |\n+#endif\n \t\tPKT_TX_OUTER_IP_CKSUM |\n \t\tTXGBE_TX_IEEE1588_TMST);\n \n", "prefixes": [ "v2", "32/37" ] }