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GET /api/patches/83969/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 83969,
    "url": "http://patches.dpdk.org/api/patches/83969/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201111064936.768604-29-jiawenwu@trustnetic.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201111064936.768604-29-jiawenwu@trustnetic.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201111064936.768604-29-jiawenwu@trustnetic.com",
    "date": "2020-11-11T06:49:27",
    "name": "[v2,28/37] net/txgbe: add TM capabilities get operation",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "5354bbfdc75b5eb8ba1021bfbac68d7c0cd0abed",
    "submitter": {
        "id": 1932,
        "url": "http://patches.dpdk.org/api/people/1932/?format=api",
        "name": "Jiawen Wu",
        "email": "jiawenwu@trustnetic.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201111064936.768604-29-jiawenwu@trustnetic.com/mbox/",
    "series": [
        {
            "id": 13798,
            "url": "http://patches.dpdk.org/api/series/13798/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13798",
            "date": "2020-11-11T06:49:00",
            "name": "net: add txgbe PMD part 2",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/13798/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/83969/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/83969/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 019ACA09D2;\n\tWed, 11 Nov 2020 07:57:10 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E285AC80A;\n\tWed, 11 Nov 2020 07:48:18 +0100 (CET)",
            "from smtpbg506.qq.com (smtpbg506.qq.com [203.205.250.33])\n by dpdk.org (Postfix) with ESMTP id E352C72F0\n for <dev@dpdk.org>; Wed, 11 Nov 2020 07:48:01 +0100 (CET)",
            "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp10.qq.com (ESMTP) with\n id ; Wed, 11 Nov 2020 14:47:56 +0800 (CST)"
        ],
        "X-QQ-mid": "bizesmtp27t1605077276txmv372c",
        "X-QQ-SSF": "01400000000000C0C000B00A0000000",
        "X-QQ-FEAT": "lRUSrEWtKQDazJCVcHrnKd3RrXVr1a0Hjw1LkPXD4wL3e5pxdbipNBKGmtmjZ\n qcD7J4UFcMduzrd5esbiRi4/vtzP65warYZmq7wIiIn0ySxpf4TOHFg3WxYpS1EElHNS/gc\n gIWHjl1hPiD3hhBd2oJSr/Tz2Csgmk5atwz43jgbACG6QecCV3xrHdoCNXcis71S0SUZjBO\n 7/TFU0hPIN+/bqsWZGd93gwGPhgCVgEPq4u/dWRhGZR/R807bf/TiTJDr5AzdwJxsiaX5+/\n azCjBDfOE86BgiMFB39AACV8WRGpiyjC7wgZJ4BxGNW5SU37CB/97WZ/onkrqURcj7OEaxj\n iZvj8qmmTwZs62DKbDUjOB/9/+o8w==",
        "X-QQ-GoodBg": "2",
        "From": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "To": "dev@dpdk.org",
        "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "Date": "Wed, 11 Nov 2020 14:49:27 +0800",
        "Message-Id": "<20201111064936.768604-29-jiawenwu@trustnetic.com>",
        "X-Mailer": "git-send-email 2.18.4",
        "In-Reply-To": "<20201111064936.768604-1-jiawenwu@trustnetic.com>",
        "References": "<20201111064936.768604-1-jiawenwu@trustnetic.com>",
        "X-QQ-SENDSIZE": "520",
        "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign6",
        "X-QQ-Bgrelay": "1",
        "Subject": "[dpdk-dev] [PATCH v2 28/37] net/txgbe: add TM capabilities get\n\toperation",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add support to get traffic manager capabilities.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n drivers/net/txgbe/txgbe_ethdev.c |   1 +\n drivers/net/txgbe/txgbe_ethdev.h |   9 +\n drivers/net/txgbe/txgbe_tm.c     | 278 +++++++++++++++++++++++++++++++\n 3 files changed, 288 insertions(+)",
    "diff": "diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex 6a4bff0e5..22bc2c004 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -5216,6 +5216,7 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {\n \t.timesync_write_time        = txgbe_timesync_write_time,\n \t.udp_tunnel_port_add        = txgbe_dev_udp_tunnel_port_add,\n \t.udp_tunnel_port_del        = txgbe_dev_udp_tunnel_port_del,\n+\t.tm_ops_get                 = txgbe_tm_ops_get,\n \t.tx_done_cleanup            = txgbe_dev_tx_done_cleanup,\n };\n \ndiff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h\nindex 828cdadc5..533d85617 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.h\n+++ b/drivers/net/txgbe/txgbe_ethdev.h\n@@ -284,6 +284,14 @@ struct txgbe_tm_shaper_profile {\n \n TAILQ_HEAD(txgbe_shaper_profile_list, txgbe_tm_shaper_profile);\n \n+/* node type of Traffic Manager */\n+enum txgbe_tm_node_type {\n+\tTXGBE_TM_NODE_TYPE_PORT,\n+\tTXGBE_TM_NODE_TYPE_TC,\n+\tTXGBE_TM_NODE_TYPE_QUEUE,\n+\tTXGBE_TM_NODE_TYPE_MAX,\n+};\n+\n /* Struct to store Traffic Manager node configuration. */\n struct txgbe_tm_node {\n \tTAILQ_ENTRY(txgbe_tm_node) node;\n@@ -557,6 +565,7 @@ int txgbe_clear_all_l2_tn_filter(struct rte_eth_dev *dev);\n \n int txgbe_set_vf_rate_limit(struct rte_eth_dev *dev, uint16_t vf,\n \t\t\t    uint16_t tx_rate, uint64_t q_msk);\n+int txgbe_tm_ops_get(struct rte_eth_dev *dev, void *ops);\n void txgbe_tm_conf_init(struct rte_eth_dev *dev);\n void txgbe_tm_conf_uninit(struct rte_eth_dev *dev);\n int txgbe_set_queue_rate_limit(struct rte_eth_dev *dev, uint16_t queue_idx,\ndiff --git a/drivers/net/txgbe/txgbe_tm.c b/drivers/net/txgbe/txgbe_tm.c\nindex 78f426964..545590ba2 100644\n--- a/drivers/net/txgbe/txgbe_tm.c\n+++ b/drivers/net/txgbe/txgbe_tm.c\n@@ -6,6 +6,36 @@\n \n #include \"txgbe_ethdev.h\"\n \n+static int txgbe_tm_capabilities_get(struct rte_eth_dev *dev,\n+\t\t\t\t     struct rte_tm_capabilities *cap,\n+\t\t\t\t     struct rte_tm_error *error);\n+static int txgbe_level_capabilities_get(struct rte_eth_dev *dev,\n+\t\t\t\t\tuint32_t level_id,\n+\t\t\t\t\tstruct rte_tm_level_capabilities *cap,\n+\t\t\t\t\tstruct rte_tm_error *error);\n+static int txgbe_node_capabilities_get(struct rte_eth_dev *dev,\n+\t\t\t\t       uint32_t node_id,\n+\t\t\t\t       struct rte_tm_node_capabilities *cap,\n+\t\t\t\t       struct rte_tm_error *error);\n+\n+const struct rte_tm_ops txgbe_tm_ops = {\n+\t.capabilities_get = txgbe_tm_capabilities_get,\n+\t.level_capabilities_get = txgbe_level_capabilities_get,\n+\t.node_capabilities_get = txgbe_node_capabilities_get,\n+};\n+\n+int\n+txgbe_tm_ops_get(struct rte_eth_dev *dev __rte_unused,\n+\t\t void *arg)\n+{\n+\tif (!arg)\n+\t\treturn -EINVAL;\n+\n+\t*(const void **)arg = &txgbe_tm_ops;\n+\n+\treturn 0;\n+}\n+\n void\n txgbe_tm_conf_init(struct rte_eth_dev *dev)\n {\n@@ -55,3 +85,251 @@ txgbe_tm_conf_uninit(struct rte_eth_dev *dev)\n \t}\n }\n \n+static inline uint8_t\n+txgbe_tc_nb_get(struct rte_eth_dev *dev)\n+{\n+\tstruct rte_eth_conf *eth_conf;\n+\tuint8_t nb_tcs = 0;\n+\n+\teth_conf = &dev->data->dev_conf;\n+\tif (eth_conf->txmode.mq_mode == ETH_MQ_TX_DCB) {\n+\t\tnb_tcs = eth_conf->tx_adv_conf.dcb_tx_conf.nb_tcs;\n+\t} else if (eth_conf->txmode.mq_mode == ETH_MQ_TX_VMDQ_DCB) {\n+\t\tif (eth_conf->tx_adv_conf.vmdq_dcb_tx_conf.nb_queue_pools ==\n+\t\t    ETH_32_POOLS)\n+\t\t\tnb_tcs = ETH_4_TCS;\n+\t\telse\n+\t\t\tnb_tcs = ETH_8_TCS;\n+\t} else {\n+\t\tnb_tcs = 1;\n+\t}\n+\n+\treturn nb_tcs;\n+}\n+\n+static int\n+txgbe_tm_capabilities_get(struct rte_eth_dev *dev,\n+\t\t\t  struct rte_tm_capabilities *cap,\n+\t\t\t  struct rte_tm_error *error)\n+{\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tuint8_t tc_nb = txgbe_tc_nb_get(dev);\n+\n+\tif (!cap || !error)\n+\t\treturn -EINVAL;\n+\n+\tif (tc_nb > hw->mac.max_tx_queues)\n+\t\treturn -EINVAL;\n+\n+\terror->type = RTE_TM_ERROR_TYPE_NONE;\n+\n+\t/* set all the parameters to 0 first. */\n+\tmemset(cap, 0, sizeof(struct rte_tm_capabilities));\n+\n+\t/**\n+\t * here is the max capability not the current configuration.\n+\t */\n+\t/* port + TCs + queues */\n+\tcap->n_nodes_max = 1 + TXGBE_DCB_TC_MAX +\n+\t\t\t   hw->mac.max_tx_queues;\n+\tcap->n_levels_max = 3;\n+\tcap->non_leaf_nodes_identical = 1;\n+\tcap->leaf_nodes_identical = 1;\n+\tcap->shaper_n_max = cap->n_nodes_max;\n+\tcap->shaper_private_n_max = cap->n_nodes_max;\n+\tcap->shaper_private_dual_rate_n_max = 0;\n+\tcap->shaper_private_rate_min = 0;\n+\t/* 10Gbps -> 1.25GBps */\n+\tcap->shaper_private_rate_max = 1250000000ull;\n+\tcap->shaper_shared_n_max = 0;\n+\tcap->shaper_shared_n_nodes_per_shaper_max = 0;\n+\tcap->shaper_shared_n_shapers_per_node_max = 0;\n+\tcap->shaper_shared_dual_rate_n_max = 0;\n+\tcap->shaper_shared_rate_min = 0;\n+\tcap->shaper_shared_rate_max = 0;\n+\tcap->sched_n_children_max = hw->mac.max_tx_queues;\n+\t/**\n+\t * HW supports SP. But no plan to support it now.\n+\t * So, all the nodes should have the same priority.\n+\t */\n+\tcap->sched_sp_n_priorities_max = 1;\n+\tcap->sched_wfq_n_children_per_group_max = 0;\n+\tcap->sched_wfq_n_groups_max = 0;\n+\t/**\n+\t * SW only supports fair round robin now.\n+\t * So, all the nodes should have the same weight.\n+\t */\n+\tcap->sched_wfq_weight_max = 1;\n+\tcap->cman_head_drop_supported = 0;\n+\tcap->dynamic_update_mask = 0;\n+\tcap->shaper_pkt_length_adjust_min = RTE_TM_ETH_FRAMING_OVERHEAD;\n+\tcap->shaper_pkt_length_adjust_max = RTE_TM_ETH_FRAMING_OVERHEAD_FCS;\n+\tcap->cman_wred_context_n_max = 0;\n+\tcap->cman_wred_context_private_n_max = 0;\n+\tcap->cman_wred_context_shared_n_max = 0;\n+\tcap->cman_wred_context_shared_n_nodes_per_context_max = 0;\n+\tcap->cman_wred_context_shared_n_contexts_per_node_max = 0;\n+\tcap->stats_mask = 0;\n+\n+\treturn 0;\n+}\n+\n+static inline struct txgbe_tm_node *\n+txgbe_tm_node_search(struct rte_eth_dev *dev, uint32_t node_id,\n+\t\t     enum txgbe_tm_node_type *node_type)\n+{\n+\tstruct txgbe_tm_conf *tm_conf = TXGBE_DEV_TM_CONF(dev);\n+\tstruct txgbe_tm_node *tm_node;\n+\n+\tif (tm_conf->root && tm_conf->root->id == node_id) {\n+\t\t*node_type = TXGBE_TM_NODE_TYPE_PORT;\n+\t\treturn tm_conf->root;\n+\t}\n+\n+\tTAILQ_FOREACH(tm_node, &tm_conf->tc_list, node) {\n+\t\tif (tm_node->id == node_id) {\n+\t\t\t*node_type = TXGBE_TM_NODE_TYPE_TC;\n+\t\t\treturn tm_node;\n+\t\t}\n+\t}\n+\n+\tTAILQ_FOREACH(tm_node, &tm_conf->queue_list, node) {\n+\t\tif (tm_node->id == node_id) {\n+\t\t\t*node_type = TXGBE_TM_NODE_TYPE_QUEUE;\n+\t\t\treturn tm_node;\n+\t\t}\n+\t}\n+\n+\treturn NULL;\n+}\n+\n+static int\n+txgbe_level_capabilities_get(struct rte_eth_dev *dev,\n+\t\t\t     uint32_t level_id,\n+\t\t\t     struct rte_tm_level_capabilities *cap,\n+\t\t\t     struct rte_tm_error *error)\n+{\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\n+\tif (!cap || !error)\n+\t\treturn -EINVAL;\n+\n+\tif (level_id >= TXGBE_TM_NODE_TYPE_MAX) {\n+\t\terror->type = RTE_TM_ERROR_TYPE_LEVEL_ID;\n+\t\terror->message = \"too deep level\";\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* root node */\n+\tif (level_id == TXGBE_TM_NODE_TYPE_PORT) {\n+\t\tcap->n_nodes_max = 1;\n+\t\tcap->n_nodes_nonleaf_max = 1;\n+\t\tcap->n_nodes_leaf_max = 0;\n+\t} else if (level_id == TXGBE_TM_NODE_TYPE_TC) {\n+\t\t/* TC */\n+\t\tcap->n_nodes_max = TXGBE_DCB_TC_MAX;\n+\t\tcap->n_nodes_nonleaf_max = TXGBE_DCB_TC_MAX;\n+\t\tcap->n_nodes_leaf_max = 0;\n+\t} else {\n+\t\t/* queue */\n+\t\tcap->n_nodes_max = hw->mac.max_tx_queues;\n+\t\tcap->n_nodes_nonleaf_max = 0;\n+\t\tcap->n_nodes_leaf_max = hw->mac.max_tx_queues;\n+\t}\n+\n+\tcap->non_leaf_nodes_identical = true;\n+\tcap->leaf_nodes_identical = true;\n+\n+\tif (level_id != TXGBE_TM_NODE_TYPE_QUEUE) {\n+\t\tcap->nonleaf.shaper_private_supported = true;\n+\t\tcap->nonleaf.shaper_private_dual_rate_supported = false;\n+\t\tcap->nonleaf.shaper_private_rate_min = 0;\n+\t\t/* 10Gbps -> 1.25GBps */\n+\t\tcap->nonleaf.shaper_private_rate_max = 1250000000ull;\n+\t\tcap->nonleaf.shaper_shared_n_max = 0;\n+\t\tif (level_id == TXGBE_TM_NODE_TYPE_PORT)\n+\t\t\tcap->nonleaf.sched_n_children_max =\n+\t\t\t\tTXGBE_DCB_TC_MAX;\n+\t\telse\n+\t\t\tcap->nonleaf.sched_n_children_max =\n+\t\t\t\thw->mac.max_tx_queues;\n+\t\tcap->nonleaf.sched_sp_n_priorities_max = 1;\n+\t\tcap->nonleaf.sched_wfq_n_children_per_group_max = 0;\n+\t\tcap->nonleaf.sched_wfq_n_groups_max = 0;\n+\t\tcap->nonleaf.sched_wfq_weight_max = 1;\n+\t\tcap->nonleaf.stats_mask = 0;\n+\n+\t\treturn 0;\n+\t}\n+\n+\t/* queue node */\n+\tcap->leaf.shaper_private_supported = true;\n+\tcap->leaf.shaper_private_dual_rate_supported = false;\n+\tcap->leaf.shaper_private_rate_min = 0;\n+\t/* 10Gbps -> 1.25GBps */\n+\tcap->leaf.shaper_private_rate_max = 1250000000ull;\n+\tcap->leaf.shaper_shared_n_max = 0;\n+\tcap->leaf.cman_head_drop_supported = false;\n+\tcap->leaf.cman_wred_context_private_supported = true;\n+\tcap->leaf.cman_wred_context_shared_n_max = 0;\n+\tcap->leaf.stats_mask = 0;\n+\n+\treturn 0;\n+}\n+\n+static int\n+txgbe_node_capabilities_get(struct rte_eth_dev *dev,\n+\t\t\t    uint32_t node_id,\n+\t\t\t    struct rte_tm_node_capabilities *cap,\n+\t\t\t    struct rte_tm_error *error)\n+{\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tenum txgbe_tm_node_type node_type = TXGBE_TM_NODE_TYPE_MAX;\n+\tstruct txgbe_tm_node *tm_node;\n+\n+\tif (!cap || !error)\n+\t\treturn -EINVAL;\n+\n+\tif (node_id == RTE_TM_NODE_ID_NULL) {\n+\t\terror->type = RTE_TM_ERROR_TYPE_NODE_ID;\n+\t\terror->message = \"invalid node id\";\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* check if the node id exists */\n+\ttm_node = txgbe_tm_node_search(dev, node_id, &node_type);\n+\tif (!tm_node) {\n+\t\terror->type = RTE_TM_ERROR_TYPE_NODE_ID;\n+\t\terror->message = \"no such node\";\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tcap->shaper_private_supported = true;\n+\tcap->shaper_private_dual_rate_supported = false;\n+\tcap->shaper_private_rate_min = 0;\n+\t/* 10Gbps -> 1.25GBps */\n+\tcap->shaper_private_rate_max = 1250000000ull;\n+\tcap->shaper_shared_n_max = 0;\n+\n+\tif (node_type == TXGBE_TM_NODE_TYPE_QUEUE) {\n+\t\tcap->leaf.cman_head_drop_supported = false;\n+\t\tcap->leaf.cman_wred_context_private_supported = true;\n+\t\tcap->leaf.cman_wred_context_shared_n_max = 0;\n+\t} else {\n+\t\tif (node_type == TXGBE_TM_NODE_TYPE_PORT)\n+\t\t\tcap->nonleaf.sched_n_children_max =\n+\t\t\t\tTXGBE_DCB_TC_MAX;\n+\t\telse\n+\t\t\tcap->nonleaf.sched_n_children_max =\n+\t\t\t\thw->mac.max_tx_queues;\n+\t\tcap->nonleaf.sched_sp_n_priorities_max = 1;\n+\t\tcap->nonleaf.sched_wfq_n_children_per_group_max = 0;\n+\t\tcap->nonleaf.sched_wfq_n_groups_max = 0;\n+\t\tcap->nonleaf.sched_wfq_weight_max = 1;\n+\t}\n+\n+\tcap->stats_mask = 0;\n+\n+\treturn 0;\n+}\n+\n",
    "prefixes": [
        "v2",
        "28/37"
    ]
}