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GET /api/patches/83966/?format=api
{ "id": 83966, "url": "http://patches.dpdk.org/api/patches/83966/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201111064936.768604-26-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201111064936.768604-26-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201111064936.768604-26-jiawenwu@trustnetic.com", "date": "2020-11-11T06:49:24", "name": "[v2,25/37] net/txgbe: add flow API flush function", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "b30a4b742a9d4ce0037d64d89520d2952ff67421", "submitter": { "id": 1932, "url": "http://patches.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201111064936.768604-26-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 13798, "url": "http://patches.dpdk.org/api/series/13798/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13798", "date": "2020-11-11T06:49:00", "name": "net: add txgbe PMD part 2", "version": 2, "mbox": "http://patches.dpdk.org/series/13798/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/83966/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/83966/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B00F9A09D2;\n\tWed, 11 Nov 2020 07:56:05 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 88B78C325;\n\tWed, 11 Nov 2020 07:48:13 +0100 (CET)", "from smtpbgau2.qq.com (smtpbgau2.qq.com [54.206.34.216])\n by dpdk.org (Postfix) with ESMTP id 6620DBBA4\n for <dev@dpdk.org>; Wed, 11 Nov 2020 07:47:58 +0100 (CET)", "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp10.qq.com (ESMTP) with\n id ; Wed, 11 Nov 2020 14:47:52 +0800 (CST)" ], "X-QQ-mid": "bizesmtp27t1605077272trkh1wdl", "X-QQ-SSF": "01400000000000C0C000B00A0000000", "X-QQ-FEAT": "mAJfWfDYrJO1Ye0yal8nyFgG/D8/6zQ/ohkNz7NopBu+5cZfFZ5GyrYLvO+j/\n 67VfP/iZTSqkl8Zrp591GIsGXHYdrxqeer9ygLODuMkTG1VV4C2uszigwBD9HXxtzqwNImt\n HwZw2pM2Cy6dFPM7uZIS9kROu92JvdZXLrqcWzNdqnCryh496qc+J7V6Csq0y1L14rNCj+/\n cGhgdcV64Q1xLs9yUNIvmFHnOG6aF+WmqNeRuzf8Du0FpEaIqlJuwt/GE3JzEZ6H31Vbb+z\n O2Pliiv9ybAcuFLHMA+KsocO6UN8sBeVJK93Bat3bkA7HBig8TkZKXHT1inRy+poSkd8TRs\n adhUnbiyrqKf9auVVYudTcYwIUYsQ==", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>", "Date": "Wed, 11 Nov 2020 14:49:24 +0800", "Message-Id": "<20201111064936.768604-26-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.18.4", "In-Reply-To": "<20201111064936.768604-1-jiawenwu@trustnetic.com>", "References": "<20201111064936.768604-1-jiawenwu@trustnetic.com>", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign7", "X-QQ-Bgrelay": "1", "Subject": "[dpdk-dev] [PATCH v2 25/37] net/txgbe: add flow API flush function", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add support to flush operation for flow API.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n drivers/net/txgbe/base/txgbe_hw.c | 87 +++++++++++++++++++++++++++++++\n drivers/net/txgbe/base/txgbe_hw.h | 1 +\n drivers/net/txgbe/txgbe_ethdev.c | 21 ++++++++\n drivers/net/txgbe/txgbe_ethdev.h | 2 +\n drivers/net/txgbe/txgbe_fdir.c | 47 +++++++++++++++++\n drivers/net/txgbe/txgbe_flow.c | 43 +++++++++++++++\n 6 files changed, 201 insertions(+)", "diff": "diff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c\nindex 5ee13b0f8..dc419d7d4 100644\n--- a/drivers/net/txgbe/base/txgbe_hw.c\n+++ b/drivers/net/txgbe/base/txgbe_hw.c\n@@ -3649,6 +3649,93 @@ s32 txgbe_reset_hw(struct txgbe_hw *hw)\n \treturn status;\n }\n \n+/**\n+ * txgbe_fdir_check_cmd_complete - poll to check whether FDIRPICMD is complete\n+ * @hw: pointer to hardware structure\n+ * @fdircmd: current value of FDIRCMD register\n+ */\n+static s32 txgbe_fdir_check_cmd_complete(struct txgbe_hw *hw, u32 *fdircmd)\n+{\n+\tint i;\n+\n+\tfor (i = 0; i < TXGBE_FDIRCMD_CMD_POLL; i++) {\n+\t\t*fdircmd = rd32(hw, TXGBE_FDIRPICMD);\n+\t\tif (!(*fdircmd & TXGBE_FDIRPICMD_OP_MASK))\n+\t\t\treturn 0;\n+\t\tusec_delay(10);\n+\t}\n+\n+\treturn TXGBE_ERR_FDIR_CMD_INCOMPLETE;\n+}\n+\n+/**\n+ * txgbe_reinit_fdir_tables - Reinitialize Flow Director tables.\n+ * @hw: pointer to hardware structure\n+ **/\n+s32 txgbe_reinit_fdir_tables(struct txgbe_hw *hw)\n+{\n+\ts32 err;\n+\tint i;\n+\tu32 fdirctrl = rd32(hw, TXGBE_FDIRCTL);\n+\tu32 fdircmd;\n+\tfdirctrl &= ~TXGBE_FDIRCTL_INITDONE;\n+\n+\tDEBUGFUNC(\"txgbe_reinit_fdir_tables\");\n+\n+\t/*\n+\t * Before starting reinitialization process,\n+\t * FDIRPICMD.OP must be zero.\n+\t */\n+\terr = txgbe_fdir_check_cmd_complete(hw, &fdircmd);\n+\tif (err) {\n+\t\tDEBUGOUT(\"Flow Director previous command did not complete, aborting table re-initialization.\\n\");\n+\t\treturn err;\n+\t}\n+\n+\twr32(hw, TXGBE_FDIRFREE, 0);\n+\ttxgbe_flush(hw);\n+\t/*\n+\t * adapters flow director init flow cannot be restarted,\n+\t * Workaround silicon errata by performing the following steps\n+\t * before re-writing the FDIRCTL control register with the same value.\n+\t * - write 1 to bit 8 of FDIRPICMD register &\n+\t * - write 0 to bit 8 of FDIRPICMD register\n+\t */\n+\twr32m(hw, TXGBE_FDIRPICMD, TXGBE_FDIRPICMD_CLR, TXGBE_FDIRPICMD_CLR);\n+\ttxgbe_flush(hw);\n+\twr32m(hw, TXGBE_FDIRPICMD, TXGBE_FDIRPICMD_CLR, 0);\n+\ttxgbe_flush(hw);\n+\t/*\n+\t * Clear FDIR Hash register to clear any leftover hashes\n+\t * waiting to be programmed.\n+\t */\n+\twr32(hw, TXGBE_FDIRPIHASH, 0x00);\n+\ttxgbe_flush(hw);\n+\n+\twr32(hw, TXGBE_FDIRCTL, fdirctrl);\n+\ttxgbe_flush(hw);\n+\n+\t/* Poll init-done after we write FDIRCTL register */\n+\tfor (i = 0; i < TXGBE_FDIR_INIT_DONE_POLL; i++) {\n+\t\tif (rd32m(hw, TXGBE_FDIRCTL, TXGBE_FDIRCTL_INITDONE))\n+\t\t\tbreak;\n+\t\tmsec_delay(1);\n+\t}\n+\tif (i >= TXGBE_FDIR_INIT_DONE_POLL) {\n+\t\tDEBUGOUT(\"Flow Director Signature poll time exceeded!\\n\");\n+\t\treturn TXGBE_ERR_FDIR_REINIT_FAILED;\n+\t}\n+\n+\t/* Clear FDIR statistics registers (read to clear) */\n+\trd32(hw, TXGBE_FDIRUSED);\n+\trd32(hw, TXGBE_FDIRFAIL);\n+\trd32(hw, TXGBE_FDIRMATCH);\n+\trd32(hw, TXGBE_FDIRMISS);\n+\trd32(hw, TXGBE_FDIRLEN);\n+\n+\treturn 0;\n+}\n+\n /**\n * txgbe_start_hw_raptor - Prepare hardware for Tx/Rx\n * @hw: pointer to hardware structure\ndiff --git a/drivers/net/txgbe/base/txgbe_hw.h b/drivers/net/txgbe/base/txgbe_hw.h\nindex 09298ea0c..a7473e7e5 100644\n--- a/drivers/net/txgbe/base/txgbe_hw.h\n+++ b/drivers/net/txgbe/base/txgbe_hw.h\n@@ -108,5 +108,6 @@ s32 txgbe_init_phy_raptor(struct txgbe_hw *hw);\n s32 txgbe_enable_rx_dma_raptor(struct txgbe_hw *hw, u32 regval);\n s32 txgbe_prot_autoc_read_raptor(struct txgbe_hw *hw, bool *locked, u64 *value);\n s32 txgbe_prot_autoc_write_raptor(struct txgbe_hw *hw, bool locked, u64 value);\n+s32 txgbe_reinit_fdir_tables(struct txgbe_hw *hw);\n bool txgbe_verify_lesm_fw_enabled_raptor(struct txgbe_hw *hw);\n #endif /* _TXGBE_HW_H_ */\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex 9a68e266f..881ccaa57 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -5002,6 +5002,27 @@ txgbe_clear_syn_filter(struct rte_eth_dev *dev)\n \t}\n }\n \n+/* remove all the L2 tunnel filters */\n+int\n+txgbe_clear_all_l2_tn_filter(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_l2_tn_info *l2_tn_info = TXGBE_DEV_L2_TN(dev);\n+\tstruct txgbe_l2_tn_filter *l2_tn_filter;\n+\tstruct txgbe_l2_tunnel_conf l2_tn_conf;\n+\tint ret = 0;\n+\n+\twhile ((l2_tn_filter = TAILQ_FIRST(&l2_tn_info->l2_tn_list))) {\n+\t\tl2_tn_conf.l2_tunnel_type = l2_tn_filter->key.l2_tn_type;\n+\t\tl2_tn_conf.tunnel_id = l2_tn_filter->key.tn_id;\n+\t\tl2_tn_conf.pool = l2_tn_filter->pool;\n+\t\tret = txgbe_dev_l2_tunnel_filter_del(dev, &l2_tn_conf);\n+\t\tif (ret < 0)\n+\t\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n static const struct eth_dev_ops txgbe_eth_dev_ops = {\n \t.dev_configure = txgbe_dev_configure,\n \t.dev_infos_get = txgbe_dev_info_get,\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h\nindex a0a18d254..e743a8129 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.h\n+++ b/drivers/net/txgbe/txgbe_ethdev.h\n@@ -488,12 +488,14 @@ int txgbe_pf_host_configure(struct rte_eth_dev *eth_dev);\n uint32_t txgbe_convert_vm_rx_mask_to_val(uint16_t rx_mask, uint32_t orig_val);\n \n void txgbe_fdir_filter_restore(struct rte_eth_dev *dev);\n+int txgbe_clear_all_fdir_filter(struct rte_eth_dev *dev);\n \n extern const struct rte_flow_ops txgbe_flow_ops;\n \n void txgbe_clear_all_ethertype_filter(struct rte_eth_dev *dev);\n void txgbe_clear_all_ntuple_filter(struct rte_eth_dev *dev);\n void txgbe_clear_syn_filter(struct rte_eth_dev *dev);\n+int txgbe_clear_all_l2_tn_filter(struct rte_eth_dev *dev);\n \n int txgbe_set_vf_rate_limit(struct rte_eth_dev *dev, uint16_t vf,\n \t\t\t uint16_t tx_rate, uint64_t q_msk);\ndiff --git a/drivers/net/txgbe/txgbe_fdir.c b/drivers/net/txgbe/txgbe_fdir.c\nindex 2342cf681..6ddb023c0 100644\n--- a/drivers/net/txgbe/txgbe_fdir.c\n+++ b/drivers/net/txgbe/txgbe_fdir.c\n@@ -902,6 +902,27 @@ txgbe_fdir_filter_program(struct rte_eth_dev *dev,\n \treturn err;\n }\n \n+static int\n+txgbe_fdir_flush(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tstruct txgbe_hw_fdir_info *info = TXGBE_DEV_FDIR(dev);\n+\tint ret;\n+\n+\tret = txgbe_reinit_fdir_tables(hw);\n+\tif (ret < 0) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to re-initialize FD table.\");\n+\t\treturn ret;\n+\t}\n+\n+\tinfo->f_add = 0;\n+\tinfo->f_remove = 0;\n+\tinfo->add = 0;\n+\tinfo->remove = 0;\n+\n+\treturn ret;\n+}\n+\n /* restore flow director filter */\n void\n txgbe_fdir_filter_restore(struct rte_eth_dev *dev)\n@@ -936,3 +957,29 @@ txgbe_fdir_filter_restore(struct rte_eth_dev *dev)\n \t}\n }\n \n+/* remove all the flow director filters */\n+int\n+txgbe_clear_all_fdir_filter(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_hw_fdir_info *fdir_info = TXGBE_DEV_FDIR(dev);\n+\tstruct txgbe_fdir_filter *fdir_filter;\n+\tstruct txgbe_fdir_filter *filter_flag;\n+\tint ret = 0;\n+\n+\t/* flush flow director */\n+\trte_hash_reset(fdir_info->hash_handle);\n+\tmemset(fdir_info->hash_map, 0,\n+\t sizeof(struct txgbe_fdir_filter *) * TXGBE_MAX_FDIR_FILTER_NUM);\n+\tfilter_flag = TAILQ_FIRST(&fdir_info->fdir_list);\n+\twhile ((fdir_filter = TAILQ_FIRST(&fdir_info->fdir_list))) {\n+\t\tTAILQ_REMOVE(&fdir_info->fdir_list,\n+\t\t\t fdir_filter,\n+\t\t\t entries);\n+\t\trte_free(fdir_filter);\n+\t}\n+\n+\tif (filter_flag != NULL)\n+\t\tret = txgbe_fdir_flush(dev);\n+\n+\treturn ret;\n+}\ndiff --git a/drivers/net/txgbe/txgbe_flow.c b/drivers/net/txgbe/txgbe_flow.c\nindex 8d5362175..b5f4073e2 100644\n--- a/drivers/net/txgbe/txgbe_flow.c\n+++ b/drivers/net/txgbe/txgbe_flow.c\n@@ -2555,6 +2555,16 @@ txgbe_parse_rss_filter(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+/* remove the rss filter */\n+static void\n+txgbe_clear_rss_filter(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_filter_info *filter_info = TXGBE_DEV_FILTER(dev);\n+\n+\tif (filter_info->rss_info.conf.queue_num)\n+\t\ttxgbe_config_rss_filter(dev, &filter_info->rss_info, FALSE);\n+}\n+\n void\n txgbe_filterlist_init(void)\n {\n@@ -3069,9 +3079,42 @@ txgbe_flow_destroy(struct rte_eth_dev *dev,\n \treturn ret;\n }\n \n+/* Destroy all flow rules associated with a port on txgbe. */\n+static int\n+txgbe_flow_flush(struct rte_eth_dev *dev,\n+\t\tstruct rte_flow_error *error)\n+{\n+\tint ret = 0;\n+\n+\ttxgbe_clear_all_ntuple_filter(dev);\n+\ttxgbe_clear_all_ethertype_filter(dev);\n+\ttxgbe_clear_syn_filter(dev);\n+\n+\tret = txgbe_clear_all_fdir_filter(dev);\n+\tif (ret < 0) {\n+\t\trte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_HANDLE,\n+\t\t\t\t\tNULL, \"Failed to flush rule\");\n+\t\treturn ret;\n+\t}\n+\n+\tret = txgbe_clear_all_l2_tn_filter(dev);\n+\tif (ret < 0) {\n+\t\trte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_HANDLE,\n+\t\t\t\t\tNULL, \"Failed to flush rule\");\n+\t\treturn ret;\n+\t}\n+\n+\ttxgbe_clear_rss_filter(dev);\n+\n+\ttxgbe_filterlist_flush();\n+\n+\treturn 0;\n+}\n+\n const struct rte_flow_ops txgbe_flow_ops = {\n \t.validate = txgbe_flow_validate,\n \t.create = txgbe_flow_create,\n \t.destroy = txgbe_flow_destroy,\n+\t.flush = txgbe_flow_flush,\n };\n \n", "prefixes": [ "v2", "25/37" ] }