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GET /api/patches/8342/?format=api
{ "id": 8342, "url": "http://patches.dpdk.org/api/patches/8342/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1446198204-9852-5-git-send-email-danielx.t.mrzyglod@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1446198204-9852-5-git-send-email-danielx.t.mrzyglod@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1446198204-9852-5-git-send-email-danielx.t.mrzyglod@intel.com", "date": "2015-10-30T09:43:22", "name": "[dpdk-dev,v2,4/6] i40e: add additional ieee1588 support functions", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "d0a423928855dc786ed286c8f32fe58caac3a7ad", "submitter": { "id": 23, "url": "http://patches.dpdk.org/api/people/23/?format=api", "name": "Daniel Mrzyglod", "email": "danielx.t.mrzyglod@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1446198204-9852-5-git-send-email-danielx.t.mrzyglod@intel.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/8342/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/8342/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 76FAA5A50;\n\tFri, 30 Oct 2015 10:47:36 +0100 (CET)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby dpdk.org (Postfix) with ESMTP id 5CEC2567C\n\tfor <dev@dpdk.org>; Fri, 30 Oct 2015 10:47:35 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby fmsmga102.fm.intel.com with ESMTP; 30 Oct 2015 02:47:34 -0700", "from unknown ([10.217.248.15])\n\tby orsmga002.jf.intel.com with SMTP; 30 Oct 2015 02:47:32 -0700", "by (sSMTP sendmail emulation); Fri, 30 Oct 2015 10:46:48 +0100" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.20,217,1444719600\"; d=\"scan'208\";a=\"838723492\"", "From": "Daniel Mrzyglod <danielx.t.mrzyglod@intel.com>", "To": "dev@dpdk.org", "Date": "Fri, 30 Oct 2015 10:43:22 +0100", "Message-Id": "<1446198204-9852-5-git-send-email-danielx.t.mrzyglod@intel.com>", "X-Mailer": "git-send-email 2.1.4", "In-Reply-To": "<1446198204-9852-1-git-send-email-danielx.t.mrzyglod@intel.com>", "References": "<1443799208-9408-1-git-send-email-danielx.t.mrzyglod@intel.com>\n\t<1446198204-9852-1-git-send-email-danielx.t.mrzyglod@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 4/6] i40e: add additional ieee1588 support\n\tfunctions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pablo de Lara <pablo.de.lara.guarch@intel.com>\n\nAdd additional functions to support the existing IEEE1588\nfunctionality and to enable getting, setting and adjusting\nthe device time.\n\nSigned-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>\nSigned-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.c | 214 +++++++++++++++++++++++++++++++++++++----\n drivers/net/i40e/i40e_ethdev.h | 18 ++++\n 2 files changed, 212 insertions(+), 20 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 2dd9fdc..985ab24 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -107,11 +107,14 @@\n \t(1UL << RTE_ETH_FLOW_NONFRAG_IPV6_OTHER) | \\\n \t(1UL << RTE_ETH_FLOW_L2_PAYLOAD))\n \n-#define I40E_PTP_40GB_INCVAL 0x0199999999ULL\n-#define I40E_PTP_10GB_INCVAL 0x0333333333ULL\n-#define I40E_PTP_1GB_INCVAL 0x2000000000ULL\n-#define I40E_PRTTSYN_TSYNENA 0x80000000\n-#define I40E_PRTTSYN_TSYNTYPE 0x0e000000\n+/* Additional timesync values. */\n+#define NSEC_PER_SEC 1000000000L\n+#define I40E_PTP_40GB_INCVAL 0x0199999999ULL\n+#define I40E_PTP_10GB_INCVAL 0x0333333333ULL\n+#define I40E_PTP_1GB_INCVAL 0x2000000000ULL\n+#define I40E_PRTTSYN_TSYNENA 0x80000000\n+#define I40E_PRTTSYN_TSYNTYPE 0x0e000000\n+#define I40E_CYCLECOUNTER_MASK 0xffffffffffffffff\n \n static int eth_i40e_dev_init(struct rte_eth_dev *eth_dev);\n static int eth_i40e_dev_uninit(struct rte_eth_dev *eth_dev);\n@@ -232,6 +235,11 @@ static int i40e_timesync_read_rx_timestamp(struct rte_eth_dev *dev,\n \t\t\t\t\t uint32_t flags);\n static int i40e_timesync_read_tx_timestamp(struct rte_eth_dev *dev,\n \t\t\t\t\t struct timespec *timestamp);\n+static int i40e_timesync_time_adjust(struct rte_eth_dev *dev, int64_t delta);\n+static int i40e_timesync_time_get(struct rte_eth_dev *dev,\n+\t\tstruct timespec *timestamp);\n+static int i40e_timesync_time_set(struct rte_eth_dev *dev,\n+\t\tstruct timespec *timestamp);\n \n static const struct rte_pci_id pci_id_i40e_map[] = {\n #define RTE_PCI_DEV_ID_DECL_I40E(vend, dev) {RTE_PCI_DEVICE(vend, dev)},\n@@ -289,6 +297,9 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {\n \t.timesync_disable = i40e_timesync_disable,\n \t.timesync_read_rx_timestamp = i40e_timesync_read_rx_timestamp,\n \t.timesync_read_tx_timestamp = i40e_timesync_read_tx_timestamp,\n+\t.timesync_time_adjust = i40e_timesync_time_adjust,\n+\t.timesync_time_get = i40e_timesync_time_get,\n+\t.timesync_time_set = i40e_timesync_time_set,\n };\n \n static struct eth_driver rte_i40e_pmd = {\n@@ -6175,17 +6186,116 @@ i40e_mirror_rule_reset(struct rte_eth_dev *dev, uint8_t sw_id)\n \treturn 0;\n }\n \n-static int\n-i40e_timesync_enable(struct rte_eth_dev *dev)\n+static inline uint64_t\n+timespec_to_ns(const struct timespec *ts)\n+{\n+\treturn ((uint64_t) ts->tv_sec * NSEC_PER_SEC) + ts->tv_nsec;\n+}\n+\n+static struct timespec\n+ns_to_timespec(uint64_t nsec)\n+{\n+\tstruct timespec ts = {0, 0};\n+\n+\tif (nsec == 0)\n+\t\treturn ts;\n+\n+\tts.tv_sec = nsec / NSEC_PER_SEC;\n+\tts.tv_nsec = nsec % NSEC_PER_SEC;\n+\n+\treturn ts;\n+}\n+\n+/*\n+ * Adds the new cycles (in nanoseconds) to the previous time stored.\n+ */\n+static uint64_t\n+timecounter_cycles_to_ns_time(struct timecounter *tc, uint64_t cycle_tstamp)\n+{\n+\tuint64_t delta = (cycle_tstamp - tc->cycle_last);\n+\tuint64_t nsec = tc->nsec;\n+\n+\tnsec += delta;\n+\n+\treturn nsec;\n+}\n+\n+static uint64_t\n+i40e_read_timesync_cyclecounter(struct rte_eth_dev *dev)\n {\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tstruct rte_eth_link *link = &dev->data->dev_link;\n-\tuint32_t tsync_ctl_l;\n-\tuint32_t tsync_ctl_h;\n+\tuint64_t systim_cycles = 0;\n+\n+\tsystim_cycles |= (uint64_t)I40E_READ_REG(hw, I40E_PRTTSYN_TIME_L);\n+\tsystim_cycles |= (uint64_t)I40E_READ_REG(hw, I40E_PRTTSYN_TIME_H)\n+\t\t\t<< 32;\n+\n+\treturn systim_cycles;\n+}\n+\n+static uint64_t\n+timecounter_read_ns_delta(struct rte_eth_dev *dev)\n+{\n+\tuint64_t cycle_now, cycle_delta;\n+\tstruct i40e_adapter *adapter =\n+\t\t\t(struct i40e_adapter *)dev->data->dev_private;\n+\n+\t/* Read cycle counter. */\n+\tcycle_now = adapter->tc.cc->read(dev);\n+\n+\t/* Calculate the delta since the last timecounter_read_delta(). */\n+\tcycle_delta = (cycle_now - adapter->tc.cycle_last);\n+\n+\t/* Update time stamp of timecounter_read_delta() call. */\n+\tadapter->tc.cycle_last = cycle_now;\n+\n+\t/* Delta already in nanoseconds. */\n+\treturn cycle_delta;\n+}\n+\n+static uint64_t\n+timecounter_read(struct rte_eth_dev *dev)\n+{\n+\tuint64_t nsec;\n+\tstruct i40e_adapter *adapter =\n+\t\t\t(struct i40e_adapter *)dev->data->dev_private;\n+\n+\t/* Increment time by nanoseconds since last call. */\n+\tnsec = timecounter_read_ns_delta(dev);\n+\tnsec += adapter->tc.nsec;\n+\tadapter->tc.nsec = nsec;\n+\n+\treturn nsec;\n+}\n+\n+\n+static void\n+timecounter_init(struct rte_eth_dev *dev,\n+\t\t uint64_t start_time)\n+{\n+\tstruct i40e_adapter *adapter =\n+\t\t\t(struct i40e_adapter *)dev->data->dev_private;\n+\tadapter->tc.cc = &adapter->cc;\n+\tadapter->tc.cycle_last = adapter->tc.cc->read(dev);\n+\tadapter->tc.nsec = start_time;\n+}\n+\n+static void\n+i40e_start_cyclecounter(struct rte_eth_dev *dev)\n+{\n+\tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct i40e_adapter *adapter =\n+\t\t\t(struct i40e_adapter *)dev->data->dev_private;\n+\tstruct rte_eth_link link;\n \tuint32_t tsync_inc_l;\n \tuint32_t tsync_inc_h;\n \n-\tswitch (link->link_speed) {\n+\t/* Get current link speed. */\n+\tmemset(&link, 0, sizeof(link));\n+\ti40e_dev_link_update(dev, 1);\n+\trte_i40e_dev_atomic_read_link_status(dev, &link);\n+\n+\tswitch (link.link_speed) {\n \tcase ETH_LINK_SPEED_40G:\n \t\ttsync_inc_l = I40E_PTP_40GB_INCVAL & 0xFFFFFFFF;\n \t\ttsync_inc_h = I40E_PTP_40GB_INCVAL >> 32;\n@@ -6203,6 +6313,63 @@ i40e_timesync_enable(struct rte_eth_dev *dev)\n \t\ttsync_inc_h = 0x0;\n \t}\n \n+\t/* Set the timesync increment value. */\n+\tI40E_WRITE_REG(hw, I40E_PRTTSYN_INC_L, tsync_inc_l);\n+\tI40E_WRITE_REG(hw, I40E_PRTTSYN_INC_H, tsync_inc_h);\n+\n+\tmemset(&adapter->cc, 0, sizeof(struct cyclecounter));\n+\tadapter->cc.read = i40e_read_timesync_cyclecounter;\n+}\n+\n+static int\n+i40e_timesync_time_adjust(struct rte_eth_dev *dev, int64_t delta)\n+{\n+\tstruct i40e_adapter *adapter =\n+\t\t\t(struct i40e_adapter *)dev->data->dev_private;\n+\n+\tadapter->tc.nsec += delta;\n+\n+\treturn 0;\n+}\n+\n+static int\n+i40e_timesync_time_set(struct rte_eth_dev *dev, struct timespec *ts)\n+{\n+\tuint64_t ns;\n+\n+\tns = timespec_to_ns(ts);\n+\n+\t/* Reset the timecounter. */\n+\ttimecounter_init(dev, ns);\n+\n+\treturn 0;\n+}\n+\n+static int\n+i40e_timesync_time_get(struct rte_eth_dev *dev, struct timespec *ts)\n+{\n+\tuint64_t ns;\n+\n+\tns = timecounter_read(dev);\n+\t*ts = ns_to_timespec(ns);\n+\n+\treturn 0;\n+}\n+\n+static int\n+i40e_timesync_enable(struct rte_eth_dev *dev)\n+{\n+\tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tuint32_t tsync_ctl_l;\n+\tuint32_t tsync_ctl_h;\n+\tuint64_t ns;\n+\tstruct timespec zerotime = {0, 0};\n+\n+\t/* Set 0.0 epoch time to initialize timecounter. */\n+\tns = timespec_to_ns(&zerotime);\n+\ti40e_start_cyclecounter(dev);\n+\ttimecounter_init(dev, ns);\n+\n \t/* Clear timesync registers. */\n \tI40E_READ_REG(hw, I40E_PRTTSYN_STAT_0);\n \tI40E_READ_REG(hw, I40E_PRTTSYN_TXTIME_H);\n@@ -6212,10 +6379,6 @@ i40e_timesync_enable(struct rte_eth_dev *dev)\n \tI40E_READ_REG(hw, I40E_PRTTSYN_RXTIME_L(3));\n \tI40E_READ_REG(hw, I40E_PRTTSYN_TXTIME_H);\n \n-\t/* Set the timesync increment value. */\n-\tI40E_WRITE_REG(hw, I40E_PRTTSYN_INC_L, tsync_inc_l);\n-\tI40E_WRITE_REG(hw, I40E_PRTTSYN_INC_H, tsync_inc_h);\n-\n \t/* Enable timestamping of PTP packets. */\n \ttsync_ctl_l = I40E_READ_REG(hw, I40E_PRTTSYN_CTL0);\n \ttsync_ctl_l |= I40E_PRTTSYN_TSYNENA;\n@@ -6247,7 +6410,7 @@ i40e_timesync_disable(struct rte_eth_dev *dev)\n \tI40E_WRITE_REG(hw, I40E_PRTTSYN_CTL0, tsync_ctl_l);\n \tI40E_WRITE_REG(hw, I40E_PRTTSYN_CTL1, tsync_ctl_h);\n \n-\t/* Set the timesync increment value. */\n+\t/* Reset the timesync increment value. */\n \tI40E_WRITE_REG(hw, I40E_PRTTSYN_INC_L, 0x0);\n \tI40E_WRITE_REG(hw, I40E_PRTTSYN_INC_H, 0x0);\n \n@@ -6259,10 +6422,14 @@ i40e_timesync_read_rx_timestamp(struct rte_eth_dev *dev,\n \t\t\t\tstruct timespec *timestamp, uint32_t flags)\n {\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct i40e_adapter *adapter =\n+\t\t(struct i40e_adapter *)dev->data->dev_private;\n+\n \tuint32_t sync_status;\n \tuint32_t rx_stmpl;\n \tuint32_t rx_stmph;\n \tuint32_t index = flags & 0x03;\n+\tuint64_t regival = 0;\n \n \tsync_status = I40E_READ_REG(hw, I40E_PRTTSYN_STAT_1);\n \tif ((sync_status & (1 << index)) == 0)\n@@ -6270,9 +6437,11 @@ i40e_timesync_read_rx_timestamp(struct rte_eth_dev *dev,\n \n \trx_stmpl = I40E_READ_REG(hw, I40E_PRTTSYN_RXTIME_L(index));\n \trx_stmph = I40E_READ_REG(hw, I40E_PRTTSYN_RXTIME_H(index));\n+\ttimecounter_read(dev);\n \n-\ttimestamp->tv_sec = (uint64_t)(((uint64_t)rx_stmph << 32) | rx_stmpl);\n-\ttimestamp->tv_nsec = 0;\n+\tregival = (uint64_t)(((uint64_t)rx_stmph << 32) | rx_stmpl);\n+\tregival = timecounter_cycles_to_ns_time(&adapter->tc, regival);\n+\t*timestamp = ns_to_timespec(regival);\n \n \treturn 0;\n }\n@@ -6282,9 +6451,13 @@ i40e_timesync_read_tx_timestamp(struct rte_eth_dev *dev,\n \t\t\t\tstruct timespec *timestamp)\n {\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct i40e_adapter *adapter =\n+\t\t(struct i40e_adapter *)dev->data->dev_private;\n+\n \tuint32_t sync_status;\n \tuint32_t tx_stmpl;\n \tuint32_t tx_stmph;\n+\tuint64_t regival = 0;\n \n \tsync_status = I40E_READ_REG(hw, I40E_PRTTSYN_STAT_0);\n \tif ((sync_status & I40E_PRTTSYN_STAT_0_TXTIME_MASK) == 0)\n@@ -6293,8 +6466,9 @@ i40e_timesync_read_tx_timestamp(struct rte_eth_dev *dev,\n \ttx_stmpl = I40E_READ_REG(hw, I40E_PRTTSYN_TXTIME_L);\n \ttx_stmph = I40E_READ_REG(hw, I40E_PRTTSYN_TXTIME_H);\n \n-\ttimestamp->tv_sec = (uint64_t)(((uint64_t)tx_stmph << 32) | tx_stmpl);\n-\ttimestamp->tv_nsec = 0;\n+\tregival = (uint64_t)(((uint64_t)tx_stmph << 32) | tx_stmpl);\n+\tregival = timecounter_cycles_to_ns_time(&adapter->tc, regival);\n+\t*timestamp = ns_to_timespec(regival);\n \n \treturn 0;\n }\ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex 6185657..7f2d79b 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -450,6 +450,22 @@ struct i40e_vf {\n };\n \n /*\n+ * Structure for cyclecounter IEEE1588 functionality.\n+ */\n+struct cyclecounter {\n+\tuint64_t (*read)(struct rte_eth_dev *dev);\n+};\n+\n+/*\n+ * Structure to hold and calculate Unix epoch time.\n+ */\n+struct timecounter {\n+\tstruct cyclecounter *cc;\n+\tuint64_t cycle_last;\n+\tuint64_t nsec;\n+};\n+\n+/*\n * Structure to store private data for each PF/VF instance.\n */\n struct i40e_adapter {\n@@ -462,6 +478,8 @@ struct i40e_adapter {\n \t\tstruct i40e_pf pf;\n \t\tstruct i40e_vf vf;\n \t};\n+\tstruct cyclecounter cc;\n+\tstruct timecounter tc;\n };\n \n int i40e_dev_switch_queues(struct i40e_pf *pf, bool on);\n", "prefixes": [ "dpdk-dev", "v2", "4/6" ] }