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GET /api/patches/82038/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 82038,
    "url": "http://patches.dpdk.org/api/patches/82038/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1603496027-33918-4-git-send-email-nicolas.chautru@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1603496027-33918-4-git-send-email-nicolas.chautru@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1603496027-33918-4-git-send-email-nicolas.chautru@intel.com",
    "date": "2020-10-23T23:33:43",
    "name": "[v4,3/7] app/bbdev: include explict HARQ preloading",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "5d3328290cd3b295a6c458b7a8b01fe5befd889d",
    "submitter": {
        "id": 1314,
        "url": "http://patches.dpdk.org/api/people/1314/?format=api",
        "name": "Chautru, Nicolas",
        "email": "nicolas.chautru@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1603496027-33918-4-git-send-email-nicolas.chautru@intel.com/mbox/",
    "series": [
        {
            "id": 13291,
            "url": "http://patches.dpdk.org/api/series/13291/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13291",
            "date": "2020-10-23T23:33:40",
            "name": "BBDEV test updates",
            "version": 4,
            "mbox": "http://patches.dpdk.org/series/13291/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/82038/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/82038/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A826AA04B0;\n\tSat, 24 Oct 2020 01:35:15 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BCE586A80;\n\tSat, 24 Oct 2020 01:34:12 +0200 (CEST)",
            "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by dpdk.org (Postfix) with ESMTP id E9536685C\n for <dev@dpdk.org>; Sat, 24 Oct 2020 01:34:02 +0200 (CEST)",
            "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Oct 2020 16:33:58 -0700",
            "from skx-5gnr-sc12-4.sc.intel.com ([172.25.69.210])\n by fmsmga005.fm.intel.com with ESMTP; 23 Oct 2020 16:33:57 -0700"
        ],
        "IronPort-SDR": [
            "\n YV5mLLGq0jimwQ9A5AJtF5VjMjBr108EdlT/NlXm4RLnw/WGoJRrMPU7fJT4UECtz98AHYMXLp\n DIizZEWh+dPA==",
            "\n SISgNMuVp/wbdFtxsiHxKTJFzb7qPyj1WRVK0xBu8p3WnUwx7twwFWd/11ooOgfpakfaTB01YZ\n OLO1LlGmLFUA=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9783\"; a=\"231935034\"",
            "E=Sophos;i=\"5.77,410,1596524400\"; d=\"scan'208\";a=\"231935034\"",
            "E=Sophos;i=\"5.77,410,1596524400\"; d=\"scan'208\";a=\"524841050\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Nicolas Chautru <nicolas.chautru@intel.com>",
        "To": "dev@dpdk.org,\n\takhil.goyal@nxp.com,\n\ttrix@redhat.com",
        "Cc": "david.marchand@redhat.com,\n\tNicolas Chautru <nicolas.chautru@intel.com>",
        "Date": "Fri, 23 Oct 2020 16:33:43 -0700",
        "Message-Id": "<1603496027-33918-4-git-send-email-nicolas.chautru@intel.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1603496027-33918-1-git-send-email-nicolas.chautru@intel.com>",
        "References": "<1603496027-33918-1-git-send-email-nicolas.chautru@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v4 3/7] app/bbdev: include explict HARQ preloading",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Run preloading explictly for unit tests. Load each code block\nby reusing existing input op then restore for the actual test.\n\nSigned-off-by: Nicolas Chautru <nicolas.chautru@intel.com>\nAcked-by: Liu Tianjiao <tianjiao.liu@intel.com>\n---\n app/test-bbdev/main.h            |  1 +\n app/test-bbdev/test_bbdev_perf.c | 51 +++++++++++++++++++++-------------------\n 2 files changed, 28 insertions(+), 24 deletions(-)",
    "diff": "diff --git a/app/test-bbdev/main.h b/app/test-bbdev/main.h\nindex fb3dec8..dc10a50 100644\n--- a/app/test-bbdev/main.h\n+++ b/app/test-bbdev/main.h\n@@ -17,6 +17,7 @@\n #define TEST_SKIPPED    1\n \n #define MAX_BURST 512U\n+#define MAX_OPS 1024U\n #define DEFAULT_BURST 32U\n #define DEFAULT_OPS 64U\n #define DEFAULT_ITER 6U\ndiff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c\nindex b62848e..f30cbdb 100644\n--- a/app/test-bbdev/test_bbdev_perf.c\n+++ b/app/test-bbdev/test_bbdev_perf.c\n@@ -2513,20 +2513,20 @@ typedef int (test_case_function)(struct active_device *ad,\n \t\tbool preload)\n {\n \tuint16_t j;\n-\tint ret;\n-\tuint32_t harq_offset = (uint32_t) queue_id * HARQ_INCR * 1024;\n-\tstruct rte_bbdev_op_data save_hc_in, save_hc_out;\n-\tstruct rte_bbdev_dec_op *ops_deq[MAX_BURST];\n+\tint deq;\n+\tuint32_t harq_offset = (uint32_t) queue_id * HARQ_INCR * MAX_OPS;\n+\tstruct rte_bbdev_op_data save_hc_in[MAX_OPS], save_hc_out[MAX_OPS];\n+\tstruct rte_bbdev_dec_op *ops_deq[MAX_OPS];\n \tuint32_t flags = ops[0]->ldpc_dec.op_flags;\n \tbool mem_in = flags & RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE;\n \tbool hc_in = flags & RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;\n \tbool mem_out = flags & RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE;\n \tbool hc_out = flags & RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE;\n \tbool h_comp = flags & RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION;\n-\tfor (j = 0; j < n; ++j) {\n-\t\tif ((mem_in || hc_in) && preload) {\n-\t\t\tsave_hc_in = ops[j]->ldpc_dec.harq_combined_input;\n-\t\t\tsave_hc_out = ops[j]->ldpc_dec.harq_combined_output;\n+\tif ((mem_in || hc_in) && preload) {\n+\t\tfor (j = 0; j < n; ++j) {\n+\t\t\tsave_hc_in[j] = ops[j]->ldpc_dec.harq_combined_input;\n+\t\t\tsave_hc_out[j] = ops[j]->ldpc_dec.harq_combined_output;\n \t\t\tops[j]->ldpc_dec.op_flags =\n \t\t\t\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK +\n \t\t\t\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE;\n@@ -2536,16 +2536,23 @@ typedef int (test_case_function)(struct active_device *ad,\n \t\t\tops[j]->ldpc_dec.harq_combined_output.offset =\n \t\t\t\t\tharq_offset;\n \t\t\tops[j]->ldpc_dec.harq_combined_input.offset = 0;\n-\t\t\trte_bbdev_enqueue_ldpc_dec_ops(dev_id, queue_id,\n-\t\t\t\t\t&ops[j], 1);\n-\t\t\tret = 0;\n-\t\t\twhile (ret == 0)\n-\t\t\t\tret = rte_bbdev_dequeue_ldpc_dec_ops(\n-\t\t\t\t\tdev_id, queue_id, &ops_deq[j], 1);\n+\t\t\tharq_offset += HARQ_INCR;\n+\t\t}\n+\t\trte_bbdev_enqueue_ldpc_dec_ops(dev_id, queue_id, &ops[0], n);\n+\t\tdeq = 0;\n+\t\twhile (deq != n)\n+\t\t\tdeq += rte_bbdev_dequeue_ldpc_dec_ops(\n+\t\t\t\t\tdev_id, queue_id, &ops_deq[deq],\n+\t\t\t\t\tn - deq);\n+\t\t/* Restore the operations */\n+\t\tfor (j = 0; j < n; ++j) {\n \t\t\tops[j]->ldpc_dec.op_flags = flags;\n-\t\t\tops[j]->ldpc_dec.harq_combined_input = save_hc_in;\n-\t\t\tops[j]->ldpc_dec.harq_combined_output = save_hc_out;\n+\t\t\tops[j]->ldpc_dec.harq_combined_input = save_hc_in[j];\n+\t\t\tops[j]->ldpc_dec.harq_combined_output = save_hc_out[j];\n \t\t}\n+\t}\n+\tharq_offset = (uint32_t) queue_id * HARQ_INCR * MAX_OPS;\n+\tfor (j = 0; j < n; ++j) {\n \t\t/* Adjust HARQ offset when we reach external DDR */\n \t\tif (mem_in || hc_in)\n \t\t\tops[j]->ldpc_dec.harq_combined_input.offset\n@@ -3231,11 +3238,9 @@ typedef int (test_case_function)(struct active_device *ad,\n \t\t\t\tmbuf_reset(\n \t\t\t\tops_enq[j]->ldpc_dec.harq_combined_output.data);\n \t\t}\n-\t\tif (extDdr) {\n-\t\t\tbool preload = i == (TEST_REPETITIONS - 1);\n+\t\tif (extDdr)\n \t\t\tpreload_harq_ddr(tp->dev_id, queue_id, ops_enq,\n-\t\t\t\t\tnum_ops, preload);\n-\t\t}\n+\t\t\t\t\tnum_ops, true);\n \t\tstart_time = rte_rdtsc_precise();\n \n \t\tfor (enq = 0, deq = 0; enq < num_ops;) {\n@@ -3362,11 +3367,9 @@ typedef int (test_case_function)(struct active_device *ad,\n \t\t\t\tmbuf_reset(\n \t\t\t\tops_enq[j]->ldpc_dec.harq_combined_output.data);\n \t\t}\n-\t\tif (extDdr) {\n-\t\t\tbool preload = i == (TEST_REPETITIONS - 1);\n+\t\tif (extDdr)\n \t\t\tpreload_harq_ddr(tp->dev_id, queue_id, ops_enq,\n-\t\t\t\t\tnum_ops, preload);\n-\t\t}\n+\t\t\t\t\tnum_ops, true);\n \t\tstart_time = rte_rdtsc_precise();\n \n \t\tfor (enq = 0, deq = 0; enq < num_ops;) {\n",
    "prefixes": [
        "v4",
        "3/7"
    ]
}