Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/81881/?format=api
{ "id": 81881, "url": "http://patches.dpdk.org/api/patches/81881/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1603437295-119083-14-git-send-email-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1603437295-119083-14-git-send-email-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1603437295-119083-14-git-send-email-suanmingm@nvidia.com", "date": "2020-10-23T07:14:43", "name": "[v2,13/25] net/mlx5: make flow table cache thread safe", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9a6246307fc5be316390bfb81ee44eddb3068e7d", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1603437295-119083-14-git-send-email-suanmingm@nvidia.com/mbox/", "series": [ { "id": 13250, "url": "http://patches.dpdk.org/api/series/13250/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13250", "date": "2020-10-23T07:14:30", "name": "*net/mlx5: support multiple-thread flow operations", "version": 2, "mbox": "http://patches.dpdk.org/series/13250/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81881/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/81881/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 04EDDA04DE;\n\tFri, 23 Oct 2020 09:20:14 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A3E49A904;\n\tFri, 23 Oct 2020 09:15:57 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 5D9B672E7\n for <dev@dpdk.org>; Fri, 23 Oct 2020 09:15:30 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n suanmingm@nvidia.com) with SMTP; 23 Oct 2020 10:15:27 +0300", "from nvidia.com (mtbc-r640-04.mtbc.labs.mlnx [10.75.70.9])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 09N7F2LW026736;\n Fri, 23 Oct 2020 10:15:26 +0300" ], "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "Matan Azrad <matan@nvidia.com>, Shahaf Shuler <shahafs@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "Cc": "dev@dpdk.org, Xueming Li <xuemingl@nvidia.com>", "Date": "Fri, 23 Oct 2020 15:14:43 +0800", "Message-Id": "<1603437295-119083-14-git-send-email-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1603437295-119083-1-git-send-email-suanmingm@nvidia.com>", "References": "<1601984948-313027-1-git-send-email-suanmingm@nvidia.com>\n <1603437295-119083-1-git-send-email-suanmingm@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v2 13/25] net/mlx5: make flow table cache thread\n\tsafe", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Xueming Li <xuemingl@nvidia.com>\n\nTo support multi-thread flow insertion/removal, this patch uses thread\nsafe hash list API for flow table cache hash list.\n\nSigned-off-by: Xueming Li <xuemingl@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/mlx5.c | 102 ++++---------------------\n drivers/net/mlx5/mlx5.h | 2 +-\n drivers/net/mlx5/mlx5_flow.h | 17 +++++\n drivers/net/mlx5/mlx5_flow_dv.c | 164 ++++++++++++++++++++--------------------\n 4 files changed, 116 insertions(+), 169 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex da043e2..fa769cd 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -1003,7 +1003,7 @@ struct mlx5_dev_ctx_shared *\n }\n \n /**\n- * Destroy table hash list and all the root entries per domain.\n+ * Destroy table hash list.\n *\n * @param[in] priv\n * Pointer to the private device data structure.\n@@ -1012,46 +1012,9 @@ struct mlx5_dev_ctx_shared *\n mlx5_free_table_hash_list(struct mlx5_priv *priv)\n {\n \tstruct mlx5_dev_ctx_shared *sh = priv->sh;\n-\tstruct mlx5_flow_tbl_data_entry *tbl_data;\n-\tunion mlx5_flow_tbl_key table_key = {\n-\t\t{\n-\t\t\t.table_id = 0,\n-\t\t\t.reserved = 0,\n-\t\t\t.domain = 0,\n-\t\t\t.direction = 0,\n-\t\t}\n-\t};\n-\tstruct mlx5_hlist_entry *pos;\n \n \tif (!sh->flow_tbls)\n \t\treturn;\n-\tpos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);\n-\tif (pos) {\n-\t\ttbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,\n-\t\t\t\t\tentry);\n-\t\tMLX5_ASSERT(tbl_data);\n-\t\tmlx5_hlist_remove(sh->flow_tbls, pos);\n-\t\tmlx5_free(tbl_data);\n-\t}\n-\ttable_key.direction = 1;\n-\tpos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);\n-\tif (pos) {\n-\t\ttbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,\n-\t\t\t\t\tentry);\n-\t\tMLX5_ASSERT(tbl_data);\n-\t\tmlx5_hlist_remove(sh->flow_tbls, pos);\n-\t\tmlx5_free(tbl_data);\n-\t}\n-\ttable_key.direction = 0;\n-\ttable_key.domain = 1;\n-\tpos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);\n-\tif (pos) {\n-\t\ttbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,\n-\t\t\t\t\tentry);\n-\t\tMLX5_ASSERT(tbl_data);\n-\t\tmlx5_hlist_remove(sh->flow_tbls, pos);\n-\t\tmlx5_free(tbl_data);\n-\t}\n \tmlx5_hlist_destroy(sh->flow_tbls);\n }\n \n@@ -1066,80 +1029,45 @@ struct mlx5_dev_ctx_shared *\n * Zero on success, positive error code otherwise.\n */\n int\n-mlx5_alloc_table_hash_list(struct mlx5_priv *priv)\n+mlx5_alloc_table_hash_list(struct mlx5_priv *priv __rte_unused)\n {\n+\tint err = 0;\n+\t/* Tables are only used in DV and DR modes. */\n+#ifdef HAVE_IBV_FLOW_DV_SUPPORT\n \tstruct mlx5_dev_ctx_shared *sh = priv->sh;\n \tchar s[MLX5_HLIST_NAMESIZE];\n-\tint err = 0;\n \n \tMLX5_ASSERT(sh);\n \tsnprintf(s, sizeof(s), \"%s_flow_table\", priv->sh->ibdev_name);\n \tsh->flow_tbls = mlx5_hlist_create(s, MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE,\n-\t\t\t\t\t 0, 0, NULL, NULL, NULL);\n+\t\t\t\t\t 0, 0, flow_dv_tbl_create_cb, NULL,\n+\t\t\t\t\t flow_dv_tbl_remove_cb);\n \tif (!sh->flow_tbls) {\n \t\tDRV_LOG(ERR, \"flow tables with hash creation failed.\");\n \t\terr = ENOMEM;\n \t\treturn err;\n \t}\n+\tsh->flow_tbls->ctx = sh;\n #ifndef HAVE_MLX5DV_DR\n+\tstruct rte_flow_error error;\n+\tstruct rte_eth_dev *dev = &rte_eth_devices[priv->dev_data->port_id];\n+\n \t/*\n \t * In case we have not DR support, the zero tables should be created\n \t * because DV expect to see them even if they cannot be created by\n \t * RDMA-CORE.\n \t */\n-\tunion mlx5_flow_tbl_key table_key = {\n-\t\t{\n-\t\t\t.table_id = 0,\n-\t\t\t.reserved = 0,\n-\t\t\t.domain = 0,\n-\t\t\t.direction = 0,\n-\t\t}\n-\t};\n-\tstruct mlx5_flow_tbl_data_entry *tbl_data = mlx5_malloc(MLX5_MEM_ZERO,\n-\t\t\t\t\t\t\t sizeof(*tbl_data), 0,\n-\t\t\t\t\t\t\t SOCKET_ID_ANY);\n-\n-\tif (!tbl_data) {\n-\t\terr = ENOMEM;\n-\t\tgoto error;\n-\t}\n-\ttbl_data->entry.key = table_key.v64;\n-\terr = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);\n-\tif (err)\n-\t\tgoto error;\n-\trte_atomic32_init(&tbl_data->tbl.refcnt);\n-\trte_atomic32_inc(&tbl_data->tbl.refcnt);\n-\ttable_key.direction = 1;\n-\ttbl_data = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*tbl_data), 0,\n-\t\t\t SOCKET_ID_ANY);\n-\tif (!tbl_data) {\n+\tif (!flow_dv_tbl_resource_get(dev, 0, 0, 0, 1, &error) ||\n+\t !flow_dv_tbl_resource_get(dev, 0, 1, 0, 1, &error) ||\n+\t !flow_dv_tbl_resource_get(dev, 0, 0, 1, 1, &error)) {\n \t\terr = ENOMEM;\n \t\tgoto error;\n \t}\n-\ttbl_data->entry.key = table_key.v64;\n-\terr = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);\n-\tif (err)\n-\t\tgoto error;\n-\trte_atomic32_init(&tbl_data->tbl.refcnt);\n-\trte_atomic32_inc(&tbl_data->tbl.refcnt);\n-\ttable_key.direction = 0;\n-\ttable_key.domain = 1;\n-\ttbl_data = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*tbl_data), 0,\n-\t\t\t SOCKET_ID_ANY);\n-\tif (!tbl_data) {\n-\t\terr = ENOMEM;\n-\t\tgoto error;\n-\t}\n-\ttbl_data->entry.key = table_key.v64;\n-\terr = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);\n-\tif (err)\n-\t\tgoto error;\n-\trte_atomic32_init(&tbl_data->tbl.refcnt);\n-\trte_atomic32_inc(&tbl_data->tbl.refcnt);\n \treturn err;\n error:\n \tmlx5_free_table_hash_list(priv);\n #endif /* HAVE_MLX5DV_DR */\n+#endif\n \treturn err;\n }\n \ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex ed16b0d..ae6d37d 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -496,7 +496,7 @@ struct mlx5_dev_shared_port {\n \tstruct {\n \t\t/* Table ID should be at the lowest address. */\n \t\tuint32_t table_id;\t/**< ID of the table. */\n-\t\tuint16_t reserved;\t/**< must be zero for comparison. */\n+\t\tuint16_t dummy;\t\t/**< Dummy table for DV API. */\n \t\tuint8_t domain;\t\t/**< 1 - FDB, 0 - NIC TX/RX. */\n \t\tuint8_t direction;\t/**< 1 - egress, 0 - ingress. */\n \t};\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 3d325b2..8d12b5d 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -381,6 +381,13 @@ enum mlx5_flow_fate_type {\n \tMLX5_FLOW_FATE_MAX,\n };\n \n+/* Hash list callback context */\n+struct mlx5_flow_cb_ctx {\n+\tstruct rte_eth_dev *dev;\n+\tstruct rte_flow_error *error;\n+\tvoid *data;\n+};\n+\n /* Matcher PRM representation */\n struct mlx5_flow_dv_match_params {\n \tsize_t size;\n@@ -1149,4 +1156,14 @@ int mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,\n int mlx5_flow_meter_flush(struct rte_eth_dev *dev,\n \t\t\t struct rte_mtr_error *error);\n int mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev);\n+\n+/* Hash list callbacks for flow tables: */\n+struct mlx5_hlist_entry *flow_dv_tbl_create_cb(struct mlx5_hlist *list,\n+\t\t\t\t\t uint64_t key, void *entry_ctx);\n+void flow_dv_tbl_remove_cb(struct mlx5_hlist *list,\n+\t\t\t struct mlx5_hlist_entry *entry);\n+struct mlx5_flow_tbl_resource *flow_dv_tbl_resource_get(struct rte_eth_dev *dev,\n+\t\tuint32_t table_id, uint8_t egress, uint8_t transfer,\n+\t\tuint8_t dummy, struct rte_flow_error *error);\n+\n #endif /* RTE_PMD_MLX5_FLOW_H_ */\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 43d16b4..18a52b0 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -7800,54 +7800,18 @@ struct field_modify_info modify_tcp[] = {\n }\n \n \n-/**\n- * Get a flow table.\n- *\n- * @param[in, out] dev\n- * Pointer to rte_eth_dev structure.\n- * @param[in] table_id\n- * Table id to use.\n- * @param[in] egress\n- * Direction of the table.\n- * @param[in] transfer\n- * E-Switch or NIC flow.\n- * @param[out] error\n- * pointer to error structure.\n- *\n- * @return\n- * Returns tables resource based on the index, NULL in case of failed.\n- */\n-static struct mlx5_flow_tbl_resource *\n-flow_dv_tbl_resource_get(struct rte_eth_dev *dev,\n-\t\t\t uint32_t table_id, uint8_t egress,\n-\t\t\t uint8_t transfer,\n-\t\t\t struct rte_flow_error *error)\n+struct mlx5_hlist_entry *\n+flow_dv_tbl_create_cb(struct mlx5_hlist *list, uint64_t key64, void *ctx)\n {\n-\tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_ctx_shared *sh = priv->sh;\n-\tstruct mlx5_flow_tbl_resource *tbl;\n-\tunion mlx5_flow_tbl_key table_key = {\n-\t\t{\n-\t\t\t.table_id = table_id,\n-\t\t\t.reserved = 0,\n-\t\t\t.domain = !!transfer,\n-\t\t\t.direction = !!egress,\n-\t\t}\n-\t};\n-\tstruct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,\n-\t\t\t\t\t\t\t table_key.v64, NULL);\n+\tstruct mlx5_dev_ctx_shared *sh = list->ctx;\n \tstruct mlx5_flow_tbl_data_entry *tbl_data;\n+\tstruct rte_flow_error *error = ctx;\n+\tunion mlx5_flow_tbl_key key = { .v64 = key64 };\n+\tstruct mlx5_flow_tbl_resource *tbl;\n+\tvoid *domain;\n \tuint32_t idx = 0;\n \tint ret;\n-\tvoid *domain;\n \n-\tif (pos) {\n-\t\ttbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,\n-\t\t\t\t\tentry);\n-\t\ttbl = &tbl_data->tbl;\n-\t\trte_atomic32_inc(&tbl->refcnt);\n-\t\treturn tbl;\n-\t}\n \ttbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);\n \tif (!tbl_data) {\n \t\trte_flow_error_set(error, ENOMEM,\n@@ -7858,14 +7822,15 @@ struct field_modify_info modify_tcp[] = {\n \t}\n \ttbl_data->idx = idx;\n \ttbl = &tbl_data->tbl;\n-\tpos = &tbl_data->entry;\n-\tif (transfer)\n+\tif (key.dummy)\n+\t\treturn &tbl_data->entry;\n+\tif (key.domain)\n \t\tdomain = sh->fdb_domain;\n-\telse if (egress)\n+\telse if (key.direction)\n \t\tdomain = sh->tx_domain;\n \telse\n \t\tdomain = sh->rx_domain;\n-\tret = mlx5_flow_os_create_flow_tbl(domain, table_id, &tbl->obj);\n+\tret = mlx5_flow_os_create_flow_tbl(domain, key.table_id, &tbl->obj);\n \tif (ret) {\n \t\trte_flow_error_set(error, ENOMEM,\n \t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n@@ -7873,12 +7838,7 @@ struct field_modify_info modify_tcp[] = {\n \t\tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);\n \t\treturn NULL;\n \t}\n-\t/*\n-\t * No multi-threads now, but still better to initialize the reference\n-\t * count before insert it into the hash list.\n-\t */\n-\trte_atomic32_init(&tbl->refcnt);\n-\tif (table_id) {\n+\tif (key.table_id) {\n \t\tret = mlx5_flow_os_create_flow_action_dest_flow_tbl\n \t\t\t\t\t(tbl->obj, &tbl_data->jump.action);\n \t\tif (ret) {\n@@ -7891,17 +7851,69 @@ struct field_modify_info modify_tcp[] = {\n \t\t\treturn NULL;\n \t\t}\n \t}\n-\tpos->key = table_key.v64;\n-\tret = !mlx5_hlist_insert(sh->flow_tbls, pos);\n-\tif (ret < 0) {\n-\t\trte_flow_error_set(error, -ret,\n+\treturn &tbl_data->entry;\n+}\n+\n+/**\n+ * Get a flow table.\n+ *\n+ * @param[in, out] dev\n+ * Pointer to rte_eth_dev structure.\n+ * @param[in] table_id\n+ * Table id to use.\n+ * @param[in] egress\n+ * Direction of the table.\n+ * @param[in] transfer\n+ * E-Switch or NIC flow.\n+ * @param[in] dummy\n+ * Dummy entry for dv API.\n+ * @param[out] error\n+ * pointer to error structure.\n+ *\n+ * @return\n+ * Returns tables resource based on the index, NULL in case of failed.\n+ */\n+struct mlx5_flow_tbl_resource *\n+flow_dv_tbl_resource_get(struct rte_eth_dev *dev,\n+\t\t\t uint32_t table_id, uint8_t egress,\n+\t\t\t uint8_t transfer, uint8_t dummy,\n+\t\t\t struct rte_flow_error *error)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tunion mlx5_flow_tbl_key table_key = {\n+\t\t{\n+\t\t\t.table_id = table_id,\n+\t\t\t.dummy = dummy,\n+\t\t\t.domain = !!transfer,\n+\t\t\t.direction = !!egress,\n+\t\t}\n+\t};\n+\tstruct mlx5_hlist_entry *entry;\n+\tstruct mlx5_flow_tbl_data_entry *tbl_data;\n+\n+\tentry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, NULL);\n+\tif (!entry) {\n+\t\trte_flow_error_set(error, ENOMEM,\n \t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,\n-\t\t\t\t \"cannot insert flow table data entry\");\n-\t\tmlx5_flow_os_destroy_flow_tbl(tbl->obj);\n-\t\tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);\n+\t\t\t\t \"cannot get table\");\n+\t\treturn NULL;\n \t}\n-\trte_atomic32_inc(&tbl->refcnt);\n-\treturn tbl;\n+\ttbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);\n+\treturn &tbl_data->tbl;\n+}\n+\n+void\n+flow_dv_tbl_remove_cb(struct mlx5_hlist *list,\n+\t\t struct mlx5_hlist_entry *entry)\n+{\n+\tstruct mlx5_dev_ctx_shared *sh = list->ctx;\n+\tstruct mlx5_flow_tbl_data_entry *tbl_data =\n+\t\tcontainer_of(entry, struct mlx5_flow_tbl_data_entry, entry);\n+\n+\tMLX5_ASSERT(entry && sh);\n+\tif (tbl_data->tbl.obj)\n+\t\tmlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);\n+\tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);\n }\n \n /**\n@@ -7926,18 +7938,7 @@ struct field_modify_info modify_tcp[] = {\n \n \tif (!tbl)\n \t\treturn 0;\n-\tif (rte_atomic32_dec_and_test(&tbl->refcnt)) {\n-\t\tstruct mlx5_hlist_entry *pos = &tbl_data->entry;\n-\n-\t\tmlx5_flow_os_destroy_flow_tbl(tbl->obj);\n-\t\ttbl->obj = NULL;\n-\t\t/* remove the entry from the hash list and free memory. */\n-\t\tmlx5_hlist_remove(sh->flow_tbls, pos);\n-\t\tmlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_JUMP],\n-\t\t\t\ttbl_data->idx);\n-\t\treturn 0;\n-\t}\n-\treturn 1;\n+\treturn mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);\n }\n \n /**\n@@ -7976,7 +7977,7 @@ struct field_modify_info modify_tcp[] = {\n \tint ret;\n \n \ttbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,\n-\t\t\t\t key->domain, error);\n+\t\t\t\t key->domain, 0, error);\n \tif (!tbl)\n \t\treturn -rte_errno;\t/* No need to refill the error info */\n \ttbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);\n@@ -8471,7 +8472,7 @@ struct field_modify_info modify_tcp[] = {\n \t*cache_resource = *resource;\n \t/* Create normal path table level */\n \ttbl = flow_dv_tbl_resource_get(dev, next_ft_id,\n-\t\t\t\t\tattr->egress, attr->transfer, error);\n+\t\t\t\t attr->egress, attr->transfer, 0, error);\n \tif (!tbl) {\n \t\trte_flow_error_set(error, ENOMEM,\n \t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n@@ -9377,7 +9378,8 @@ struct field_modify_info modify_tcp[] = {\n \t\t\t\treturn ret;\n \t\t\ttbl = flow_dv_tbl_resource_get(dev, table,\n \t\t\t\t\t\t attr->egress,\n-\t\t\t\t\t\t attr->transfer, error);\n+\t\t\t\t\t\t attr->transfer, 0,\n+\t\t\t\t\t\t error);\n \t\t\tif (!tbl)\n \t\t\t\treturn rte_flow_error_set\n \t\t\t\t\t\t(error, errno,\n@@ -10771,7 +10773,7 @@ struct field_modify_info modify_tcp[] = {\n \t\tdtb = &mtb->ingress;\n \t/* Create the meter table with METER level. */\n \tdtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,\n-\t\t\t\t\t egress, transfer, &error);\n+\t\t\t\t\t egress, transfer, 0, &error);\n \tif (!dtb->tbl) {\n \t\tDRV_LOG(ERR, \"Failed to create meter policer table.\");\n \t\treturn -1;\n@@ -10779,7 +10781,7 @@ struct field_modify_info modify_tcp[] = {\n \t/* Create the meter suffix table with SUFFIX level. */\n \tdtb->sfx_tbl = flow_dv_tbl_resource_get(dev,\n \t\t\t\t\t MLX5_FLOW_TABLE_LEVEL_SUFFIX,\n-\t\t\t\t\t egress, transfer, &error);\n+\t\t\t\t\t egress, transfer, 0, &error);\n \tif (!dtb->sfx_tbl) {\n \t\tDRV_LOG(ERR, \"Failed to create meter suffix table.\");\n \t\treturn -1;\n@@ -11098,10 +11100,10 @@ struct field_modify_info modify_tcp[] = {\n \tvoid *flow = NULL;\n \tint i, ret = -1;\n \n-\ttbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, NULL);\n+\ttbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, 0, NULL);\n \tif (!tbl)\n \t\tgoto err;\n-\tdest_tbl = flow_dv_tbl_resource_get(dev, 1, 0, 0, NULL);\n+\tdest_tbl = flow_dv_tbl_resource_get(dev, 1, 0, 0, 0, NULL);\n \tif (!dest_tbl)\n \t\tgoto err;\n \tdcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);\n", "prefixes": [ "v2", "13/25" ] }