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GET /api/patches/8163/?format=api
{ "id": 8163, "url": "http://patches.dpdk.org/api/patches/8163/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1446108827-7907-2-git-send-email-jingjing.wu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1446108827-7907-2-git-send-email-jingjing.wu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1446108827-7907-2-git-send-email-jingjing.wu@intel.com", "date": "2015-10-29T08:53:38", "name": "[dpdk-dev,v2,01/10] ethdev: rename dcb_queue to dcb_tc in dcb config struct", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9d8a92469bacd327b3aaa0e289fff4e19cc057ba", "submitter": { "id": 47, "url": "http://patches.dpdk.org/api/people/47/?format=api", "name": "Jingjing Wu", "email": "jingjing.wu@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1446108827-7907-2-git-send-email-jingjing.wu@intel.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/8163/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/8163/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 1AAE68DA1;\n\tThu, 29 Oct 2015 09:54:00 +0100 (CET)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby dpdk.org (Postfix) with ESMTP id 02DC85A69\n\tfor <dev@dpdk.org>; Thu, 29 Oct 2015 09:53:57 +0100 (CET)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga101.jf.intel.com with ESMTP; 29 Oct 2015 01:53:56 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga001.jf.intel.com with ESMTP; 29 Oct 2015 01:53:55 -0700", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t9T8rrT3015566;\n\tThu, 29 Oct 2015 16:53:53 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t9T8rpGL007948; Thu, 29 Oct 2015 16:53:53 +0800", "(from wujingji@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9T8rpx8007944; \n\tThu, 29 Oct 2015 16:53:51 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.20,213,1444719600\"; d=\"scan'208\";a=\"806306786\"", "From": "Jingjing Wu <jingjing.wu@intel.com>", "To": "dev@dpdk.org", "Date": "Thu, 29 Oct 2015 16:53:38 +0800", "Message-Id": "<1446108827-7907-2-git-send-email-jingjing.wu@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1446108827-7907-1-git-send-email-jingjing.wu@intel.com>", "References": "<1443074591-19803-1-git-send-email-jingjing.wu@intel.com>\n\t<1446108827-7907-1-git-send-email-jingjing.wu@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 01/10] ethdev: rename dcb_queue to dcb_tc in\n\tdcb config struct", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>\n---\n app/test-pmd/testpmd.c | 8 ++++----\n drivers/net/ixgbe/ixgbe_rxtx.c | 10 +++++-----\n examples/vmdq_dcb/main.c | 4 ++--\n lib/librte_ether/rte_ethdev.h | 14 +++++++-------\n 4 files changed, 18 insertions(+), 18 deletions(-)", "diff": "diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c\nindex 2578b6b..8b8eb7d 100644\n--- a/app/test-pmd/testpmd.c\n+++ b/app/test-pmd/testpmd.c\n@@ -1875,8 +1875,8 @@ get_eth_dcb_conf(struct rte_eth_conf *eth_conf, struct dcb_config *dcb_conf)\n \t\t\tvmdq_rx_conf.pool_map[i].pools = 1 << (i % vmdq_rx_conf.nb_queue_pools);\n \t\t}\n \t\tfor (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {\n-\t\t\tvmdq_rx_conf.dcb_queue[i] = i;\n-\t\t\tvmdq_tx_conf.dcb_queue[i] = i;\n+\t\t\tvmdq_rx_conf.dcb_tc[i] = i;\n+\t\t\tvmdq_tx_conf.dcb_tc[i] = i;\n \t\t}\n \n \t\t/*set DCB mode of RX and TX of multiple queues*/\n@@ -1906,8 +1906,8 @@ get_eth_dcb_conf(struct rte_eth_conf *eth_conf, struct dcb_config *dcb_conf)\n \t\ttx_conf.nb_tcs = dcb_conf->num_tcs;\n \n \t\tfor (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++){\n-\t\t\trx_conf.dcb_queue[i] = i;\n-\t\t\ttx_conf.dcb_queue[i] = i;\n+\t\t\trx_conf.dcb_tc[i] = i;\n+\t\t\ttx_conf.dcb_tc[i] = i;\n \t\t}\n \t\teth_conf->rxmode.mq_mode = ETH_MQ_RX_DCB;\n \t\teth_conf->txmode.mq_mode = ETH_MQ_TX_DCB;\ndiff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c\nindex a598a72..d331ef5 100644\n--- a/drivers/net/ixgbe/ixgbe_rxtx.c\n+++ b/drivers/net/ixgbe/ixgbe_rxtx.c\n@@ -2903,7 +2903,7 @@ ixgbe_vmdq_dcb_configure(struct rte_eth_dev *dev)\n \t\t * mapping is done with 3 bits per priority,\n \t\t * so shift by i*3 each time\n \t\t */\n-\t\tqueue_mapping |= ((cfg->dcb_queue[i] & 0x07) << (i * 3));\n+\t\tqueue_mapping |= ((cfg->dcb_tc[i] & 0x07) << (i * 3));\n \n \tIXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, queue_mapping);\n \n@@ -3038,7 +3038,7 @@ ixgbe_vmdq_dcb_rx_config(struct rte_eth_dev *dev,\n \t}\n \t/* User Priority to Traffic Class mapping */\n \tfor (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {\n-\t\tj = vmdq_rx_conf->dcb_queue[i];\n+\t\tj = vmdq_rx_conf->dcb_tc[i];\n \t\ttc = &dcb_config->tc_config[j];\n \t\ttc->path[IXGBE_DCB_RX_CONFIG].up_to_tc_bitmap =\n \t\t\t\t\t\t(uint8_t)(1 << j);\n@@ -3066,7 +3066,7 @@ ixgbe_dcb_vt_tx_config(struct rte_eth_dev *dev,\n \n \t/* User Priority to Traffic Class mapping */\n \tfor (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {\n-\t\tj = vmdq_tx_conf->dcb_queue[i];\n+\t\tj = vmdq_tx_conf->dcb_tc[i];\n \t\ttc = &dcb_config->tc_config[j];\n \t\ttc->path[IXGBE_DCB_TX_CONFIG].up_to_tc_bitmap =\n \t\t\t\t\t\t(uint8_t)(1 << j);\n@@ -3088,7 +3088,7 @@ ixgbe_dcb_rx_config(struct rte_eth_dev *dev,\n \n \t/* User Priority to Traffic Class mapping */\n \tfor (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {\n-\t\tj = rx_conf->dcb_queue[i];\n+\t\tj = rx_conf->dcb_tc[i];\n \t\ttc = &dcb_config->tc_config[j];\n \t\ttc->path[IXGBE_DCB_RX_CONFIG].up_to_tc_bitmap =\n \t\t\t\t\t\t(uint8_t)(1 << j);\n@@ -3109,7 +3109,7 @@ ixgbe_dcb_tx_config(struct rte_eth_dev *dev,\n \n \t/* User Priority to Traffic Class mapping */\n \tfor (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {\n-\t\tj = tx_conf->dcb_queue[i];\n+\t\tj = tx_conf->dcb_tc[i];\n \t\ttc = &dcb_config->tc_config[j];\n \t\ttc->path[IXGBE_DCB_TX_CONFIG].up_to_tc_bitmap =\n \t\t\t\t\t\t(uint8_t)(1 << j);\ndiff --git a/examples/vmdq_dcb/main.c b/examples/vmdq_dcb/main.c\nindex c31c2ce..b90ac28 100644\n--- a/examples/vmdq_dcb/main.c\n+++ b/examples/vmdq_dcb/main.c\n@@ -107,7 +107,7 @@ static const struct rte_eth_conf vmdq_dcb_conf_default = {\n \t\t\t.default_pool = 0,\n \t\t\t.nb_pool_maps = 0,\n \t\t\t.pool_map = {{0, 0},},\n-\t\t\t.dcb_queue = {0},\n+\t\t\t.dcb_tc = {0},\n \t\t},\n \t},\n };\n@@ -144,7 +144,7 @@ get_eth_conf(struct rte_eth_conf *eth_conf, enum rte_eth_nb_pools num_pools)\n \t\tconf.pool_map[i].pools = 1 << (i % num_pools);\n \t}\n \tfor (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++){\n-\t\tconf.dcb_queue[i] = (uint8_t)(i % (NUM_QUEUES/num_pools));\n+\t\tconf.dcb_tc[i] = (uint8_t)(i % (NUM_QUEUES/num_pools));\n \t}\n \t(void)(rte_memcpy(eth_conf, &vmdq_dcb_conf_default, sizeof(*eth_conf)));\n \t(void)(rte_memcpy(ð_conf->rx_adv_conf.vmdq_dcb_conf, &conf,\ndiff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h\nindex 8a8c82b..377da6a 100644\n--- a/lib/librte_ether/rte_ethdev.h\n+++ b/lib/librte_ether/rte_ethdev.h\n@@ -543,20 +543,20 @@ enum rte_eth_nb_pools {\n /* This structure may be extended in future. */\n struct rte_eth_dcb_rx_conf {\n \tenum rte_eth_nb_tcs nb_tcs; /**< Possible DCB TCs, 4 or 8 TCs */\n-\tuint8_t dcb_queue[ETH_DCB_NUM_USER_PRIORITIES];\n-\t/**< Possible DCB queue,4 or 8. */\n+\t/** Traffic class each UP mapped to. */\n+\tuint8_t dcb_tc[ETH_DCB_NUM_USER_PRIORITIES];\n };\n \n struct rte_eth_vmdq_dcb_tx_conf {\n \tenum rte_eth_nb_pools nb_queue_pools; /**< With DCB, 16 or 32 pools. */\n-\tuint8_t dcb_queue[ETH_DCB_NUM_USER_PRIORITIES];\n-\t/**< Possible DCB queue,4 or 8. */\n+\t/** Traffic class each UP mapped to. */\n+\tuint8_t dcb_tc[ETH_DCB_NUM_USER_PRIORITIES];\n };\n \n struct rte_eth_dcb_tx_conf {\n \tenum rte_eth_nb_tcs nb_tcs; /**< Possible DCB TCs, 4 or 8 TCs. */\n-\tuint8_t dcb_queue[ETH_DCB_NUM_USER_PRIORITIES];\n-\t/**< Possible DCB queue,4 or 8. */\n+\t/** Traffic class each UP mapped to. */\n+\tuint8_t dcb_tc[ETH_DCB_NUM_USER_PRIORITIES];\n };\n \n struct rte_eth_vmdq_tx_conf {\n@@ -583,7 +583,7 @@ struct rte_eth_vmdq_dcb_conf {\n \t\tuint16_t vlan_id; /**< The vlan id of the received frame */\n \t\tuint64_t pools; /**< Bitmask of pools for packet rx */\n \t} pool_map[ETH_VMDQ_MAX_VLAN_FILTERS]; /**< VMDq vlan pool maps. */\n-\tuint8_t dcb_queue[ETH_DCB_NUM_USER_PRIORITIES];\n+\tuint8_t dcb_tc[ETH_DCB_NUM_USER_PRIORITIES];\n \t/**< Selects a queue in a pool */\n };\n \n", "prefixes": [ "dpdk-dev", "v2", "01/10" ] }