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GET /api/patches/81418/?format=api
{ "id": 81418, "url": "http://patches.dpdk.org/api/patches/81418/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1603162949-150001-6-git-send-email-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1603162949-150001-6-git-send-email-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1603162949-150001-6-git-send-email-suanmingm@nvidia.com", "date": "2020-10-20T03:02:25", "name": "[v2,5/8] net/mlx5: make three level table thread safe", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ab9766cf2e8c5e4525c8350bdd5339c8d5985112", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1603162949-150001-6-git-send-email-suanmingm@nvidia.com/mbox/", "series": [ { "id": 13118, "url": "http://patches.dpdk.org/api/series/13118/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13118", "date": "2020-10-20T03:02:20", "name": "net/mlx5: make counter thread safe", "version": 2, "mbox": "http://patches.dpdk.org/series/13118/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81418/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/81418/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C564FA04DC;\n\tTue, 20 Oct 2020 05:03:46 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 7E6B1BC7A;\n\tTue, 20 Oct 2020 05:02:58 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 17184BC4E\n for <dev@dpdk.org>; Tue, 20 Oct 2020 05:02:43 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n suanmingm@nvidia.com) with SMTP; 20 Oct 2020 06:02:41 +0300", "from nvidia.com (mtbc-r640-04.mtbc.labs.mlnx [10.75.70.9])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 09K32V2r009619;\n Tue, 20 Oct 2020 06:02:40 +0300" ], "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "Matan Azrad <matan@nvidia.com>, Shahaf Shuler <shahafs@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "Cc": "dev@dpdk.org", "Date": "Tue, 20 Oct 2020 11:02:25 +0800", "Message-Id": "<1603162949-150001-6-git-send-email-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1603162949-150001-1-git-send-email-suanmingm@nvidia.com>", "References": "<1601984333-304464-1-git-send-email-suanmingm@nvidia.com>\n <1603162949-150001-1-git-send-email-suanmingm@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v2 5/8] net/mlx5: make three level table thread\n\tsafe", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This commit adds thread safety support in three level table using\nspinlock and reference counter for each table entry.\n\nAn new mlx5_l3t_prepare_entry() function is added in order to support\nmultiple-thread operation.\n\nSigned-off-by: Suanming Mou <suanmingm@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/mlx5_utils.c | 191 ++++++++++++++++++++++++++++++++++--------\n drivers/net/mlx5/mlx5_utils.h | 81 ++++++++++++++----\n 2 files changed, 224 insertions(+), 48 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_utils.c b/drivers/net/mlx5/mlx5_utils.c\nindex fefe833..9a54fda 100644\n--- a/drivers/net/mlx5/mlx5_utils.c\n+++ b/drivers/net/mlx5/mlx5_utils.c\n@@ -551,26 +551,23 @@ struct mlx5_l3t_tbl *\n \ttbl->type = type;\n \tswitch (type) {\n \tcase MLX5_L3T_TYPE_WORD:\n-\t\tl3t_ip_cfg.size = sizeof(struct mlx5_l3t_entry_word) +\n-\t\t\t\t sizeof(uint16_t) * MLX5_L3T_ET_SIZE;\n+\t\tl3t_ip_cfg.size = sizeof(struct mlx5_l3t_entry_word);\n \t\tl3t_ip_cfg.type = \"mlx5_l3t_e_tbl_w\";\n \t\tbreak;\n \tcase MLX5_L3T_TYPE_DWORD:\n-\t\tl3t_ip_cfg.size = sizeof(struct mlx5_l3t_entry_dword) +\n-\t\t\t\t sizeof(uint32_t) * MLX5_L3T_ET_SIZE;\n+\t\tl3t_ip_cfg.size = sizeof(struct mlx5_l3t_entry_dword);\n \t\tl3t_ip_cfg.type = \"mlx5_l3t_e_tbl_dw\";\n \t\tbreak;\n \tcase MLX5_L3T_TYPE_QWORD:\n-\t\tl3t_ip_cfg.size = sizeof(struct mlx5_l3t_entry_qword) +\n-\t\t\t\t sizeof(uint64_t) * MLX5_L3T_ET_SIZE;\n+\t\tl3t_ip_cfg.size = sizeof(struct mlx5_l3t_entry_qword);\n \t\tl3t_ip_cfg.type = \"mlx5_l3t_e_tbl_qw\";\n \t\tbreak;\n \tdefault:\n-\t\tl3t_ip_cfg.size = sizeof(struct mlx5_l3t_entry_ptr) +\n-\t\t\t\t sizeof(void *) * MLX5_L3T_ET_SIZE;\n+\t\tl3t_ip_cfg.size = sizeof(struct mlx5_l3t_entry_ptr);\n \t\tl3t_ip_cfg.type = \"mlx5_l3t_e_tbl_tpr\";\n \t\tbreak;\n \t}\n+\trte_spinlock_init(&tbl->sl);\n \ttbl->eip = mlx5_ipool_create(&l3t_ip_cfg);\n \tif (!tbl->eip) {\n \t\trte_errno = ENOMEM;\n@@ -620,11 +617,15 @@ struct mlx5_l3t_tbl *\n \tmlx5_free(tbl);\n }\n \n-uint32_t\n-mlx5_l3t_get_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n-\t\t union mlx5_l3t_data *data)\n+static int32_t\n+__l3t_get_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n+\t\tunion mlx5_l3t_data *data)\n {\n \tstruct mlx5_l3t_level_tbl *g_tbl, *m_tbl;\n+\tstruct mlx5_l3t_entry_word *w_e_tbl;\n+\tstruct mlx5_l3t_entry_dword *dw_e_tbl;\n+\tstruct mlx5_l3t_entry_qword *qw_e_tbl;\n+\tstruct mlx5_l3t_entry_ptr *ptr_e_tbl;\n \tvoid *e_tbl;\n \tuint32_t entry_idx;\n \n@@ -640,26 +641,46 @@ struct mlx5_l3t_tbl *\n \tentry_idx = idx & MLX5_L3T_ET_MASK;\n \tswitch (tbl->type) {\n \tcase MLX5_L3T_TYPE_WORD:\n-\t\tdata->word = ((struct mlx5_l3t_entry_word *)e_tbl)->entry\n-\t\t\t [entry_idx];\n+\t\tw_e_tbl = (struct mlx5_l3t_entry_word *)e_tbl;\n+\t\tdata->word = w_e_tbl->entry[entry_idx].data;\n+\t\tif (w_e_tbl->entry[entry_idx].data)\n+\t\t\tw_e_tbl->entry[entry_idx].ref_cnt++;\n \t\tbreak;\n \tcase MLX5_L3T_TYPE_DWORD:\n-\t\tdata->dword = ((struct mlx5_l3t_entry_dword *)e_tbl)->entry\n-\t\t\t [entry_idx];\n+\t\tdw_e_tbl = (struct mlx5_l3t_entry_dword *)e_tbl;\n+\t\tdata->dword = dw_e_tbl->entry[entry_idx].data;\n+\t\tif (dw_e_tbl->entry[entry_idx].data)\n+\t\t\tdw_e_tbl->entry[entry_idx].ref_cnt++;\n \t\tbreak;\n \tcase MLX5_L3T_TYPE_QWORD:\n-\t\tdata->qword = ((struct mlx5_l3t_entry_qword *)e_tbl)->entry\n-\t\t\t [entry_idx];\n+\t\tqw_e_tbl = (struct mlx5_l3t_entry_qword *)e_tbl;\n+\t\tdata->qword = qw_e_tbl->entry[entry_idx].data;\n+\t\tif (qw_e_tbl->entry[entry_idx].data)\n+\t\t\tqw_e_tbl->entry[entry_idx].ref_cnt++;\n \t\tbreak;\n \tdefault:\n-\t\tdata->ptr = ((struct mlx5_l3t_entry_ptr *)e_tbl)->entry\n-\t\t\t [entry_idx];\n+\t\tptr_e_tbl = (struct mlx5_l3t_entry_ptr *)e_tbl;\n+\t\tdata->ptr = ptr_e_tbl->entry[entry_idx].data;\n+\t\tif (ptr_e_tbl->entry[entry_idx].data)\n+\t\t\tptr_e_tbl->entry[entry_idx].ref_cnt++;\n \t\tbreak;\n \t}\n \treturn 0;\n }\n \n-void\n+int32_t\n+mlx5_l3t_get_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n+\t\t union mlx5_l3t_data *data)\n+{\n+\tint ret;\n+\n+\trte_spinlock_lock(&tbl->sl);\n+\tret = __l3t_get_entry(tbl, idx, data);\n+\trte_spinlock_unlock(&tbl->sl);\n+\treturn ret;\n+}\n+\n+int32_t\n mlx5_l3t_clear_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx)\n {\n \tstruct mlx5_l3t_level_tbl *g_tbl, *m_tbl;\n@@ -670,36 +691,54 @@ struct mlx5_l3t_tbl *\n \tvoid *e_tbl;\n \tuint32_t entry_idx;\n \tuint64_t ref_cnt;\n+\tint32_t ret = -1;\n \n+\trte_spinlock_lock(&tbl->sl);\n \tg_tbl = tbl->tbl;\n \tif (!g_tbl)\n-\t\treturn;\n+\t\tgoto out;\n \tm_tbl = g_tbl->tbl[(idx >> MLX5_L3T_GT_OFFSET) & MLX5_L3T_GT_MASK];\n \tif (!m_tbl)\n-\t\treturn;\n+\t\tgoto out;\n \te_tbl = m_tbl->tbl[(idx >> MLX5_L3T_MT_OFFSET) & MLX5_L3T_MT_MASK];\n \tif (!e_tbl)\n-\t\treturn;\n+\t\tgoto out;\n \tentry_idx = idx & MLX5_L3T_ET_MASK;\n \tswitch (tbl->type) {\n \tcase MLX5_L3T_TYPE_WORD:\n \t\tw_e_tbl = (struct mlx5_l3t_entry_word *)e_tbl;\n-\t\tw_e_tbl->entry[entry_idx] = 0;\n+\t\tMLX5_ASSERT(w_e_tbl->entry[entry_idx].ref_cnt);\n+\t\tret = --w_e_tbl->entry[entry_idx].ref_cnt;\n+\t\tif (ret)\n+\t\t\tgoto out;\n+\t\tw_e_tbl->entry[entry_idx].data = 0;\n \t\tref_cnt = --w_e_tbl->ref_cnt;\n \t\tbreak;\n \tcase MLX5_L3T_TYPE_DWORD:\n \t\tdw_e_tbl = (struct mlx5_l3t_entry_dword *)e_tbl;\n-\t\tdw_e_tbl->entry[entry_idx] = 0;\n+\t\tMLX5_ASSERT(dw_e_tbl->entry[entry_idx].ref_cnt);\n+\t\tret = --dw_e_tbl->entry[entry_idx].ref_cnt;\n+\t\tif (ret)\n+\t\t\tgoto out;\n+\t\tdw_e_tbl->entry[entry_idx].data = 0;\n \t\tref_cnt = --dw_e_tbl->ref_cnt;\n \t\tbreak;\n \tcase MLX5_L3T_TYPE_QWORD:\n \t\tqw_e_tbl = (struct mlx5_l3t_entry_qword *)e_tbl;\n-\t\tqw_e_tbl->entry[entry_idx] = 0;\n+\t\tMLX5_ASSERT(qw_e_tbl->entry[entry_idx].ref_cnt);\n+\t\tret = --qw_e_tbl->entry[entry_idx].ref_cnt;\n+\t\tif (ret)\n+\t\t\tgoto out;\n+\t\tqw_e_tbl->entry[entry_idx].data = 0;\n \t\tref_cnt = --qw_e_tbl->ref_cnt;\n \t\tbreak;\n \tdefault:\n \t\tptr_e_tbl = (struct mlx5_l3t_entry_ptr *)e_tbl;\n-\t\tptr_e_tbl->entry[entry_idx] = NULL;\n+\t\tMLX5_ASSERT(ptr_e_tbl->entry[entry_idx].ref_cnt);\n+\t\tret = --ptr_e_tbl->entry[entry_idx].ref_cnt;\n+\t\tif (ret)\n+\t\t\tgoto out;\n+\t\tptr_e_tbl->entry[entry_idx].data = NULL;\n \t\tref_cnt = --ptr_e_tbl->ref_cnt;\n \t\tbreak;\n \t}\n@@ -718,11 +757,14 @@ struct mlx5_l3t_tbl *\n \t\t\t}\n \t\t}\n \t}\n+out:\n+\trte_spinlock_unlock(&tbl->sl);\n+\treturn ret;\n }\n \n-uint32_t\n-mlx5_l3t_set_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n-\t\t union mlx5_l3t_data *data)\n+static int32_t\n+__l3t_set_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n+\t\tunion mlx5_l3t_data *data)\n {\n \tstruct mlx5_l3t_level_tbl *g_tbl, *m_tbl;\n \tstruct mlx5_l3t_entry_word *w_e_tbl;\n@@ -783,24 +825,105 @@ struct mlx5_l3t_tbl *\n \tswitch (tbl->type) {\n \tcase MLX5_L3T_TYPE_WORD:\n \t\tw_e_tbl = (struct mlx5_l3t_entry_word *)e_tbl;\n-\t\tw_e_tbl->entry[entry_idx] = data->word;\n+\t\tif (w_e_tbl->entry[entry_idx].data) {\n+\t\t\tdata->word = w_e_tbl->entry[entry_idx].data;\n+\t\t\tw_e_tbl->entry[entry_idx].ref_cnt++;\n+\t\t\trte_errno = EEXIST;\n+\t\t\treturn -1;\n+\t\t}\n+\t\tw_e_tbl->entry[entry_idx].data = data->word;\n+\t\tw_e_tbl->entry[entry_idx].ref_cnt = 1;\n \t\tw_e_tbl->ref_cnt++;\n \t\tbreak;\n \tcase MLX5_L3T_TYPE_DWORD:\n \t\tdw_e_tbl = (struct mlx5_l3t_entry_dword *)e_tbl;\n-\t\tdw_e_tbl->entry[entry_idx] = data->dword;\n+\t\tif (dw_e_tbl->entry[entry_idx].data) {\n+\t\t\tdata->dword = dw_e_tbl->entry[entry_idx].data;\n+\t\t\tdw_e_tbl->entry[entry_idx].ref_cnt++;\n+\t\t\trte_errno = EEXIST;\n+\t\t\treturn -1;\n+\t\t}\n+\t\tdw_e_tbl->entry[entry_idx].data = data->dword;\n+\t\tdw_e_tbl->entry[entry_idx].ref_cnt = 1;\n \t\tdw_e_tbl->ref_cnt++;\n \t\tbreak;\n \tcase MLX5_L3T_TYPE_QWORD:\n \t\tqw_e_tbl = (struct mlx5_l3t_entry_qword *)e_tbl;\n-\t\tqw_e_tbl->entry[entry_idx] = data->qword;\n+\t\tif (qw_e_tbl->entry[entry_idx].data) {\n+\t\t\tdata->qword = qw_e_tbl->entry[entry_idx].data;\n+\t\t\tqw_e_tbl->entry[entry_idx].ref_cnt++;\n+\t\t\trte_errno = EEXIST;\n+\t\t\treturn -1;\n+\t\t}\n+\t\tqw_e_tbl->entry[entry_idx].data = data->qword;\n+\t\tqw_e_tbl->entry[entry_idx].ref_cnt = 1;\n \t\tqw_e_tbl->ref_cnt++;\n \t\tbreak;\n \tdefault:\n \t\tptr_e_tbl = (struct mlx5_l3t_entry_ptr *)e_tbl;\n-\t\tptr_e_tbl->entry[entry_idx] = data->ptr;\n+\t\tif (ptr_e_tbl->entry[entry_idx].data) {\n+\t\t\tdata->ptr = ptr_e_tbl->entry[entry_idx].data;\n+\t\t\tptr_e_tbl->entry[entry_idx].ref_cnt++;\n+\t\t\trte_errno = EEXIST;\n+\t\t\treturn -1;\n+\t\t}\n+\t\tptr_e_tbl->entry[entry_idx].data = data->ptr;\n+\t\tptr_e_tbl->entry[entry_idx].ref_cnt = 1;\n \t\tptr_e_tbl->ref_cnt++;\n \t\tbreak;\n \t}\n \treturn 0;\n }\n+\n+int32_t\n+mlx5_l3t_set_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n+\t\t union mlx5_l3t_data *data)\n+{\n+\tint ret;\n+\n+\trte_spinlock_lock(&tbl->sl);\n+\tret = __l3t_set_entry(tbl, idx, data);\n+\trte_spinlock_unlock(&tbl->sl);\n+\treturn ret;\n+}\n+\n+int32_t\n+mlx5_l3t_prepare_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n+\t\t union mlx5_l3t_data *data,\n+\t\t mlx5_l3t_alloc_callback_fn cb, void *ctx)\n+{\n+\tint32_t ret;\n+\n+\trte_spinlock_lock(&tbl->sl);\n+\t/* Check if entry data is ready. */\n+\tret = __l3t_get_entry(tbl, idx, data);\n+\tif (!ret) {\n+\t\tswitch (tbl->type) {\n+\t\tcase MLX5_L3T_TYPE_WORD:\n+\t\t\tif (data->word)\n+\t\t\t\tgoto out;\n+\t\t\tbreak;\n+\t\tcase MLX5_L3T_TYPE_DWORD:\n+\t\t\tif (data->dword)\n+\t\t\t\tgoto out;\n+\t\t\tbreak;\n+\t\tcase MLX5_L3T_TYPE_QWORD:\n+\t\t\tif (data->qword)\n+\t\t\t\tgoto out;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tif (data->ptr)\n+\t\t\t\tgoto out;\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\t/* Entry data is not ready, use user callback to create it. */\n+\tret = cb(ctx, data);\n+\tif (ret)\n+\t\tgoto out;\n+\t/* Save the new allocated data to entry. */\n+\tret = __l3t_set_entry(tbl, idx, data);\n+out:\n+\trte_spinlock_unlock(&tbl->sl);\n+\treturn ret;\n+}\ndiff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.h\nindex f078bdc..ca9bb76 100644\n--- a/drivers/net/mlx5/mlx5_utils.h\n+++ b/drivers/net/mlx5/mlx5_utils.h\n@@ -118,29 +118,41 @@ struct mlx5_l3t_level_tbl {\n struct mlx5_l3t_entry_word {\n \tuint32_t idx; /* Table index. */\n \tuint64_t ref_cnt; /* Table ref_cnt. */\n-\tuint16_t entry[]; /* Entry array. */\n-};\n+\tstruct {\n+\t\tuint16_t data;\n+\t\tuint32_t ref_cnt;\n+\t} entry[MLX5_L3T_ET_SIZE]; /* Entry array */\n+} __rte_packed;\n \n /* L3 double word entry table data structure. */\n struct mlx5_l3t_entry_dword {\n \tuint32_t idx; /* Table index. */\n \tuint64_t ref_cnt; /* Table ref_cnt. */\n-\tuint32_t entry[]; /* Entry array. */\n-};\n+\tstruct {\n+\t\tuint32_t data;\n+\t\tint32_t ref_cnt;\n+\t} entry[MLX5_L3T_ET_SIZE]; /* Entry array */\n+} __rte_packed;\n \n /* L3 quad word entry table data structure. */\n struct mlx5_l3t_entry_qword {\n \tuint32_t idx; /* Table index. */\n \tuint64_t ref_cnt; /* Table ref_cnt. */\n-\tuint64_t entry[]; /* Entry array. */\n-};\n+\tstruct {\n+\t\tuint64_t data;\n+\t\tuint32_t ref_cnt;\n+\t} entry[MLX5_L3T_ET_SIZE]; /* Entry array */\n+} __rte_packed;\n \n /* L3 pointer entry table data structure. */\n struct mlx5_l3t_entry_ptr {\n \tuint32_t idx; /* Table index. */\n \tuint64_t ref_cnt; /* Table ref_cnt. */\n-\tvoid *entry[]; /* Entry array. */\n-};\n+\tstruct {\n+\t\tvoid *data;\n+\t\tuint32_t ref_cnt;\n+\t} entry[MLX5_L3T_ET_SIZE]; /* Entry array */\n+} __rte_packed;\n \n /* L3 table data structure. */\n struct mlx5_l3t_tbl {\n@@ -148,8 +160,13 @@ struct mlx5_l3t_tbl {\n \tstruct mlx5_indexed_pool *eip;\n \t/* Table index pool handles. */\n \tstruct mlx5_l3t_level_tbl *tbl; /* Global table index. */\n+\trte_spinlock_t sl; /* The table lock. */\n };\n \n+/** Type of function that is used to handle the data before freeing. */\n+typedef int32_t (*mlx5_l3t_alloc_callback_fn)(void *ctx,\n+\t\t\t\t\t union mlx5_l3t_data *data);\n+\n /*\n * The indexed memory entry index is made up of trunk index and offset of\n * the entry in the trunk. Since the entry index is 32 bits, in case user\n@@ -535,32 +552,68 @@ struct mlx5_indexed_pool *\n * 0 if success, -1 on error.\n */\n \n-uint32_t mlx5_l3t_get_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n+int32_t mlx5_l3t_get_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n \t\t\t union mlx5_l3t_data *data);\n+\n /**\n- * This function clears the index entry from Three-level table.\n+ * This function gets the index entry from Three-level table.\n+ *\n+ * If the index entry is not available, allocate new one by callback\n+ * function and fill in the entry.\n *\n * @param tbl\n * Pointer to the l3t.\n * @param idx\n * Index to the entry.\n+ * @param data\n+ * Pointer to the memory which saves the entry data.\n+ * When function call returns 0, data contains the entry data get from\n+ * l3t.\n+ * When function call returns -1, data is not modified.\n+ * @param cb\n+ * Callback function to allocate new data.\n+ * @param ctx\n+ * Context for callback function.\n+ *\n+ * @return\n+ * 0 if success, -1 on error.\n */\n-void mlx5_l3t_clear_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx);\n+\n+int32_t mlx5_l3t_prepare_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n+\t\t\t union mlx5_l3t_data *data,\n+\t\t\t mlx5_l3t_alloc_callback_fn cb, void *ctx);\n \n /**\n- * This function gets the index entry from Three-level table.\n+ * This function decreases and clear index entry if reference\n+ * counter is 0 from Three-level table.\n *\n * @param tbl\n * Pointer to the l3t.\n * @param idx\n * Index to the entry.\n- * @param data\n+ *\n+ * @return\n+ * The remaining reference count, 0 means entry be cleared, -1 on error.\n+ */\n+int32_t mlx5_l3t_clear_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx);\n+\n+/**\n+ * This function sets the index entry to Three-level table.\n+ * If the entry is already set, the EEXIST errno will be given, and\n+ * the set data will be filled to the data.\n+ *\n+ * @param tbl[in]\n+ * Pointer to the l3t.\n+ * @param idx[in]\n+ * Index to the entry.\n+ * @param data[in/out]\n * Pointer to the memory which contains the entry data save to l3t.\n+ * If the entry is already set, the set data will be filled.\n *\n * @return\n * 0 if success, -1 on error.\n */\n-uint32_t mlx5_l3t_set_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n+int32_t mlx5_l3t_set_entry(struct mlx5_l3t_tbl *tbl, uint32_t idx,\n \t\t\t union mlx5_l3t_data *data);\n \n /*\n", "prefixes": [ "v2", "5/8" ] }