Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/81319/?format=api
{ "id": 81319, "url": "http://patches.dpdk.org/api/patches/81319/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201019085415.82207-35-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201019085415.82207-35-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201019085415.82207-35-jiawenwu@trustnetic.com", "date": "2020-10-19T08:53:51", "name": "[v4,34/58] net/txgbe: add device xstats get", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f6f82ed8252a88337a55fa7628e901d1d5e729de", "submitter": { "id": 1932, "url": "http://patches.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201019085415.82207-35-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 13094, "url": "http://patches.dpdk.org/api/series/13094/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13094", "date": "2020-10-19T08:53:17", "name": "net: txgbe PMD", "version": 4, "mbox": "http://patches.dpdk.org/series/13094/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81319/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/81319/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 841D7A04DC;\n\tMon, 19 Oct 2020 11:07:21 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 13D2BCFE7;\n\tMon, 19 Oct 2020 10:53:49 +0200 (CEST)", "from smtpproxy21.qq.com (smtpbg702.qq.com [203.205.195.102])\n by dpdk.org (Postfix) with ESMTP id 98AB7C862\n for <dev@dpdk.org>; Mon, 19 Oct 2020 10:53:14 +0200 (CEST)", "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Mon, 19 Oct 2020 16:53:11 +0800 (CST)" ], "X-QQ-mid": "bizesmtp6t1603097591thsmfr45d", "X-QQ-SSF": "01400000002000C0C000B00A0000000", "X-QQ-FEAT": "lm51M56XDGxsE3K6KpjGdvMQ2c4JGRwenWoWgzXGtQHnzcTGUSkPKgKl8RQMk\n +xMKYE4x2ZB2eHjIeNOL5IX6QOqMDT0zWpdfYhDqikPN2BIVibtQJe/63+FyQf9y7B3FNA2\n Jkef52WbQRs6ubR+WIirSvpEKY10b4qEhCasbg7h4Y9sKhEqkfR5ljZUSaviBTRdubVIlwJ\n SsFrpeNFPO7hjmWsyQZVW/Qbh6fHWnAxBY9QC1J58OxKIAsy3k1lMnvybRuz2FensUjc6M2\n KeohJqcXJmZLJKdE8TnwjWasTRDn/0h4lAt2rYBfdVR0CcMyaL3oDKlRDgk9v0HUzFiwgGS\n vQroyldh4nh5caCr0U=", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>", "Date": "Mon, 19 Oct 2020 16:53:51 +0800", "Message-Id": "<20201019085415.82207-35-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.18.4", "In-Reply-To": "<20201019085415.82207-1-jiawenwu@trustnetic.com>", "References": "<20201019085415.82207-1-jiawenwu@trustnetic.com>", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign7", "X-QQ-Bgrelay": "1", "Subject": "[dpdk-dev] [PATCH v4 34/58] net/txgbe: add device xstats get", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add device extended stats get from reading hardware registers.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n doc/guides/nics/features/txgbe.ini | 1 +\n drivers/net/txgbe/txgbe_ethdev.c | 378 +++++++++++++++++++++++++++++\n drivers/net/txgbe/txgbe_ethdev.h | 6 +\n 3 files changed, 385 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/txgbe.ini b/doc/guides/nics/features/txgbe.ini\nindex 32df33dfc..e18632205 100644\n--- a/doc/guides/nics/features/txgbe.ini\n+++ b/doc/guides/nics/features/txgbe.ini\n@@ -24,6 +24,7 @@ Inner L3 checksum = P\n Inner L4 checksum = P\n Packet type parsing = Y\n Basic stats = Y\n+Extended stats = Y\n Multiprocess aware = Y\n Linux UIO = Y\n Linux VFIO = Y\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex f299fae29..9ead046e1 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -65,6 +65,144 @@ static const struct rte_eth_desc_lim tx_desc_lim = {\n \n static const struct eth_dev_ops txgbe_eth_dev_ops;\n \n+#define HW_XSTAT(m) {#m, offsetof(struct txgbe_hw_stats, m)}\n+#define HW_XSTAT_NAME(m, n) {n, offsetof(struct txgbe_hw_stats, m)}\n+static const struct rte_txgbe_xstats_name_off rte_txgbe_stats_strings[] = {\n+\t/* MNG RxTx */\n+\tHW_XSTAT(mng_bmc2host_packets),\n+\tHW_XSTAT(mng_host2bmc_packets),\n+\t/* Basic RxTx */\n+\tHW_XSTAT(rx_packets),\n+\tHW_XSTAT(tx_packets),\n+\tHW_XSTAT(rx_bytes),\n+\tHW_XSTAT(tx_bytes),\n+\tHW_XSTAT(rx_total_bytes),\n+\tHW_XSTAT(rx_total_packets),\n+\tHW_XSTAT(tx_total_packets),\n+\tHW_XSTAT(rx_total_missed_packets),\n+\tHW_XSTAT(rx_broadcast_packets),\n+\tHW_XSTAT(rx_multicast_packets),\n+\tHW_XSTAT(rx_management_packets),\n+\tHW_XSTAT(tx_management_packets),\n+\tHW_XSTAT(rx_management_dropped),\n+\n+\t/* Basic Error */\n+\tHW_XSTAT(rx_crc_errors),\n+\tHW_XSTAT(rx_illegal_byte_errors),\n+\tHW_XSTAT(rx_error_bytes),\n+\tHW_XSTAT(rx_mac_short_packet_dropped),\n+\tHW_XSTAT(rx_length_errors),\n+\tHW_XSTAT(rx_undersize_errors),\n+\tHW_XSTAT(rx_fragment_errors),\n+\tHW_XSTAT(rx_oversize_errors),\n+\tHW_XSTAT(rx_jabber_errors),\n+\tHW_XSTAT(rx_l3_l4_xsum_error),\n+\tHW_XSTAT(mac_local_errors),\n+\tHW_XSTAT(mac_remote_errors),\n+\n+\t/* Flow Director */\n+\tHW_XSTAT(flow_director_added_filters),\n+\tHW_XSTAT(flow_director_removed_filters),\n+\tHW_XSTAT(flow_director_filter_add_errors),\n+\tHW_XSTAT(flow_director_filter_remove_errors),\n+\tHW_XSTAT(flow_director_matched_filters),\n+\tHW_XSTAT(flow_director_missed_filters),\n+\n+\t/* FCoE */\n+\tHW_XSTAT(rx_fcoe_crc_errors),\n+\tHW_XSTAT(rx_fcoe_mbuf_allocation_errors),\n+\tHW_XSTAT(rx_fcoe_dropped),\n+\tHW_XSTAT(rx_fcoe_packets),\n+\tHW_XSTAT(tx_fcoe_packets),\n+\tHW_XSTAT(rx_fcoe_bytes),\n+\tHW_XSTAT(tx_fcoe_bytes),\n+\tHW_XSTAT(rx_fcoe_no_ddp),\n+\tHW_XSTAT(rx_fcoe_no_ddp_ext_buff),\n+\n+\t/* MACSEC */\n+\tHW_XSTAT(tx_macsec_pkts_untagged),\n+\tHW_XSTAT(tx_macsec_pkts_encrypted),\n+\tHW_XSTAT(tx_macsec_pkts_protected),\n+\tHW_XSTAT(tx_macsec_octets_encrypted),\n+\tHW_XSTAT(tx_macsec_octets_protected),\n+\tHW_XSTAT(rx_macsec_pkts_untagged),\n+\tHW_XSTAT(rx_macsec_pkts_badtag),\n+\tHW_XSTAT(rx_macsec_pkts_nosci),\n+\tHW_XSTAT(rx_macsec_pkts_unknownsci),\n+\tHW_XSTAT(rx_macsec_octets_decrypted),\n+\tHW_XSTAT(rx_macsec_octets_validated),\n+\tHW_XSTAT(rx_macsec_sc_pkts_unchecked),\n+\tHW_XSTAT(rx_macsec_sc_pkts_delayed),\n+\tHW_XSTAT(rx_macsec_sc_pkts_late),\n+\tHW_XSTAT(rx_macsec_sa_pkts_ok),\n+\tHW_XSTAT(rx_macsec_sa_pkts_invalid),\n+\tHW_XSTAT(rx_macsec_sa_pkts_notvalid),\n+\tHW_XSTAT(rx_macsec_sa_pkts_unusedsa),\n+\tHW_XSTAT(rx_macsec_sa_pkts_notusingsa),\n+\n+\t/* MAC RxTx */\n+\tHW_XSTAT(rx_size_64_packets),\n+\tHW_XSTAT(rx_size_65_to_127_packets),\n+\tHW_XSTAT(rx_size_128_to_255_packets),\n+\tHW_XSTAT(rx_size_256_to_511_packets),\n+\tHW_XSTAT(rx_size_512_to_1023_packets),\n+\tHW_XSTAT(rx_size_1024_to_max_packets),\n+\tHW_XSTAT(tx_size_64_packets),\n+\tHW_XSTAT(tx_size_65_to_127_packets),\n+\tHW_XSTAT(tx_size_128_to_255_packets),\n+\tHW_XSTAT(tx_size_256_to_511_packets),\n+\tHW_XSTAT(tx_size_512_to_1023_packets),\n+\tHW_XSTAT(tx_size_1024_to_max_packets),\n+\n+\t/* Flow Control */\n+\tHW_XSTAT(tx_xon_packets),\n+\tHW_XSTAT(rx_xon_packets),\n+\tHW_XSTAT(tx_xoff_packets),\n+\tHW_XSTAT(rx_xoff_packets),\n+\n+\tHW_XSTAT_NAME(tx_xon_packets, \"tx_flow_control_xon_packets\"),\n+\tHW_XSTAT_NAME(rx_xon_packets, \"rx_flow_control_xon_packets\"),\n+\tHW_XSTAT_NAME(tx_xoff_packets, \"tx_flow_control_xoff_packets\"),\n+\tHW_XSTAT_NAME(rx_xoff_packets, \"rx_flow_control_xoff_packets\"),\n+};\n+\n+#define TXGBE_NB_HW_STATS (sizeof(rte_txgbe_stats_strings) / \\\n+\t\t\t sizeof(rte_txgbe_stats_strings[0]))\n+\n+/* Per-priority statistics */\n+#define UP_XSTAT(m) {#m, offsetof(struct txgbe_hw_stats, up[0].m)}\n+static const struct rte_txgbe_xstats_name_off rte_txgbe_up_strings[] = {\n+\tUP_XSTAT(rx_up_packets),\n+\tUP_XSTAT(tx_up_packets),\n+\tUP_XSTAT(rx_up_bytes),\n+\tUP_XSTAT(tx_up_bytes),\n+\tUP_XSTAT(rx_up_drop_packets),\n+\n+\tUP_XSTAT(tx_up_xon_packets),\n+\tUP_XSTAT(rx_up_xon_packets),\n+\tUP_XSTAT(tx_up_xoff_packets),\n+\tUP_XSTAT(rx_up_xoff_packets),\n+\tUP_XSTAT(rx_up_dropped),\n+\tUP_XSTAT(rx_up_mbuf_alloc_errors),\n+\tUP_XSTAT(tx_up_xon2off_packets),\n+};\n+\n+#define TXGBE_NB_UP_STATS (sizeof(rte_txgbe_up_strings) / \\\n+\t\t\t sizeof(rte_txgbe_up_strings[0]))\n+\n+/* Per-queue statistics */\n+#define QP_XSTAT(m) {#m, offsetof(struct txgbe_hw_stats, qp[0].m)}\n+static const struct rte_txgbe_xstats_name_off rte_txgbe_qp_strings[] = {\n+\tQP_XSTAT(rx_qp_packets),\n+\tQP_XSTAT(tx_qp_packets),\n+\tQP_XSTAT(rx_qp_bytes),\n+\tQP_XSTAT(tx_qp_bytes),\n+\tQP_XSTAT(rx_qp_mc_packets),\n+};\n+\n+#define TXGBE_NB_QP_STATS (sizeof(rte_txgbe_qp_strings) / \\\n+\t\t\t sizeof(rte_txgbe_qp_strings[0]))\n+\n static inline int\n txgbe_is_sfp(struct txgbe_hw *hw)\n {\n@@ -1211,6 +1349,241 @@ txgbe_dev_stats_reset(struct rte_eth_dev *dev)\n \treturn 0;\n }\n \n+/* This function calculates the number of xstats based on the current config */\n+static unsigned\n+txgbe_xstats_calc_num(struct rte_eth_dev *dev)\n+{\n+\tint nb_queues = max(dev->data->nb_rx_queues, dev->data->nb_tx_queues);\n+\treturn TXGBE_NB_HW_STATS +\n+\t TXGBE_NB_UP_STATS * TXGBE_MAX_UP +\n+\t TXGBE_NB_QP_STATS * nb_queues;\n+}\n+\n+static inline int\n+txgbe_get_name_by_id(uint32_t id, char *name, uint32_t size)\n+{\n+\tint nb, st;\n+\n+\t/* Extended stats from txgbe_hw_stats */\n+\tif (id < TXGBE_NB_HW_STATS) {\n+\t\tsnprintf(name, size, \"[hw]%s\",\n+\t\t\trte_txgbe_stats_strings[id].name);\n+\t\treturn 0;\n+\t}\n+\tid -= TXGBE_NB_HW_STATS;\n+\n+\t/* Priority Stats */\n+\tif (id < TXGBE_NB_UP_STATS * TXGBE_MAX_UP) {\n+\t\tnb = id / TXGBE_NB_UP_STATS;\n+\t\tst = id % TXGBE_NB_UP_STATS;\n+\t\tsnprintf(name, size, \"[p%u]%s\", nb,\n+\t\t\trte_txgbe_up_strings[st].name);\n+\t\treturn 0;\n+\t}\n+\tid -= TXGBE_NB_UP_STATS * TXGBE_MAX_UP;\n+\n+\t/* Queue Stats */\n+\tif (id < TXGBE_NB_QP_STATS * TXGBE_MAX_QP) {\n+\t\tnb = id / TXGBE_NB_QP_STATS;\n+\t\tst = id % TXGBE_NB_QP_STATS;\n+\t\tsnprintf(name, size, \"[q%u]%s\", nb,\n+\t\t\trte_txgbe_qp_strings[st].name);\n+\t\treturn 0;\n+\t}\n+\tid -= TXGBE_NB_QP_STATS * TXGBE_MAX_QP;\n+\n+\treturn -(int)(id + 1);\n+}\n+\n+static inline int\n+txgbe_get_offset_by_id(uint32_t id, uint32_t *offset)\n+{\n+\tint nb, st;\n+\n+\t/* Extended stats from txgbe_hw_stats */\n+\tif (id < TXGBE_NB_HW_STATS) {\n+\t\t*offset = rte_txgbe_stats_strings[id].offset;\n+\t\treturn 0;\n+\t}\n+\tid -= TXGBE_NB_HW_STATS;\n+\n+\t/* Priority Stats */\n+\tif (id < TXGBE_NB_UP_STATS * TXGBE_MAX_UP) {\n+\t\tnb = id / TXGBE_NB_UP_STATS;\n+\t\tst = id % TXGBE_NB_UP_STATS;\n+\t\t*offset = rte_txgbe_up_strings[st].offset +\n+\t\t\tnb * (TXGBE_NB_UP_STATS * sizeof(uint64_t));\n+\t\treturn 0;\n+\t}\n+\tid -= TXGBE_NB_UP_STATS * TXGBE_MAX_UP;\n+\n+\t/* Queue Stats */\n+\tif (id < TXGBE_NB_QP_STATS * TXGBE_MAX_QP) {\n+\t\tnb = id / TXGBE_NB_QP_STATS;\n+\t\tst = id % TXGBE_NB_QP_STATS;\n+\t\t*offset = rte_txgbe_qp_strings[st].offset +\n+\t\t\tnb * (TXGBE_NB_QP_STATS * sizeof(uint64_t));\n+\t\treturn 0;\n+\t}\n+\tid -= TXGBE_NB_QP_STATS * TXGBE_MAX_QP;\n+\n+\treturn -(int)(id + 1);\n+}\n+\n+static int txgbe_dev_xstats_get_names(struct rte_eth_dev *dev,\n+\tstruct rte_eth_xstat_name *xstats_names, unsigned int limit)\n+{\n+\tunsigned int i, count;\n+\n+\tcount = txgbe_xstats_calc_num(dev);\n+\tif (xstats_names == NULL)\n+\t\treturn count;\n+\n+\t/* Note: limit >= cnt_stats checked upstream\n+\t * in rte_eth_xstats_names()\n+\t */\n+\tlimit = min(limit, count);\n+\n+\t/* Extended stats from txgbe_hw_stats */\n+\tfor (i = 0; i < limit; i++) {\n+\t\tif (txgbe_get_name_by_id(i, xstats_names[i].name,\n+\t\t\tsizeof(xstats_names[i].name))) {\n+\t\t\tPMD_INIT_LOG(WARNING, \"id value %d isn't valid\", i);\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\n+\treturn i;\n+}\n+\n+static int txgbe_dev_xstats_get_names_by_id(struct rte_eth_dev *dev,\n+\tstruct rte_eth_xstat_name *xstats_names,\n+\tconst uint64_t *ids,\n+\tunsigned int limit)\n+{\n+\tunsigned int i;\n+\n+\tif (ids == NULL)\n+\t\treturn txgbe_dev_xstats_get_names(dev, xstats_names, limit);\n+\n+\tfor (i = 0; i < limit; i++) {\n+\t\tif (txgbe_get_name_by_id(ids[i], xstats_names[i].name,\n+\t\t\t\tsizeof(xstats_names[i].name))) {\n+\t\t\tPMD_INIT_LOG(WARNING, \"id value %d isn't valid\", i);\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\n+\treturn i;\n+}\n+\n+static int\n+txgbe_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,\n+\t\t\t\t\t unsigned int limit)\n+{\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tstruct txgbe_hw_stats *hw_stats = TXGBE_DEV_STATS(dev);\n+\tunsigned int i, count;\n+\n+\ttxgbe_read_stats_registers(hw, hw_stats);\n+\n+\t/* If this is a reset xstats is NULL, and we have cleared the\n+\t * registers by reading them.\n+\t */\n+\tcount = txgbe_xstats_calc_num(dev);\n+\tif (xstats == NULL)\n+\t\treturn count;\n+\n+\tlimit = min(limit, txgbe_xstats_calc_num(dev));\n+\n+\t/* Extended stats from txgbe_hw_stats */\n+\tfor (i = 0; i < limit; i++) {\n+\t\tuint32_t offset = 0;\n+\n+\t\tif (txgbe_get_offset_by_id(i, &offset)) {\n+\t\t\tPMD_INIT_LOG(WARNING, \"id value %d isn't valid\", i);\n+\t\t\tbreak;\n+\t\t}\n+\t\txstats[i].value = *(uint64_t *)(((char *)hw_stats) + offset);\n+\t\txstats[i].id = i;\n+\t}\n+\n+\treturn i;\n+}\n+\n+static int\n+txgbe_dev_xstats_get_(struct rte_eth_dev *dev, uint64_t *values,\n+\t\t\t\t\t unsigned int limit)\n+{\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tstruct txgbe_hw_stats *hw_stats = TXGBE_DEV_STATS(dev);\n+\tunsigned int i, count;\n+\n+\ttxgbe_read_stats_registers(hw, hw_stats);\n+\n+\t/* If this is a reset xstats is NULL, and we have cleared the\n+\t * registers by reading them.\n+\t */\n+\tcount = txgbe_xstats_calc_num(dev);\n+\tif (values == NULL)\n+\t\treturn count;\n+\n+\tlimit = min(limit, txgbe_xstats_calc_num(dev));\n+\n+\t/* Extended stats from txgbe_hw_stats */\n+\tfor (i = 0; i < limit; i++) {\n+\t\tuint32_t offset;\n+\n+\t\tif (txgbe_get_offset_by_id(i, &offset)) {\n+\t\t\tPMD_INIT_LOG(WARNING, \"id value %d isn't valid\", i);\n+\t\t\tbreak;\n+\t\t}\n+\t\tvalues[i] = *(uint64_t *)(((char *)hw_stats) + offset);\n+\t}\n+\n+\treturn i;\n+}\n+\n+static int\n+txgbe_dev_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,\n+\t\tuint64_t *values, unsigned int limit)\n+{\n+\tstruct txgbe_hw_stats *hw_stats = TXGBE_DEV_STATS(dev);\n+\tunsigned int i;\n+\n+\tif (ids == NULL)\n+\t\treturn txgbe_dev_xstats_get_(dev, values, limit);\n+\n+\tfor (i = 0; i < limit; i++) {\n+\t\tuint32_t offset;\n+\n+\t\tif (txgbe_get_offset_by_id(ids[i], &offset)) {\n+\t\t\tPMD_INIT_LOG(WARNING, \"id value %d isn't valid\", i);\n+\t\t\tbreak;\n+\t\t}\n+\t\tvalues[i] = *(uint64_t *)(((char *)hw_stats) + offset);\n+\t}\n+\n+\treturn i;\n+}\n+\n+static int\n+txgbe_dev_xstats_reset(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tstruct txgbe_hw_stats *hw_stats = TXGBE_DEV_STATS(dev);\n+\n+\t/* HW registers are cleared on read */\n+\thw->offset_loaded = 0;\n+\ttxgbe_read_stats_registers(hw, hw_stats);\n+\thw->offset_loaded = 1;\n+\n+\t/* Reset software totals */\n+\tmemset(hw_stats, 0, sizeof(*hw_stats));\n+\n+\treturn 0;\n+}\n+\n static int\n txgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n {\n@@ -1996,7 +2369,12 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {\n \t.dev_reset = txgbe_dev_reset,\n \t.link_update = txgbe_dev_link_update,\n \t.stats_get = txgbe_dev_stats_get,\n+\t.xstats_get = txgbe_dev_xstats_get,\n+\t.xstats_get_by_id = txgbe_dev_xstats_get_by_id,\n \t.stats_reset = txgbe_dev_stats_reset,\n+\t.xstats_reset = txgbe_dev_xstats_reset,\n+\t.xstats_get_names = txgbe_dev_xstats_get_names,\n+\t.xstats_get_names_by_id = txgbe_dev_xstats_get_names_by_id,\n \t.dev_supported_ptypes_get = txgbe_dev_supported_ptypes_get,\n \t.rx_queue_start\t = txgbe_dev_rx_queue_start,\n \t.rx_queue_stop = txgbe_dev_rx_queue_stop,\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h\nindex f82b400f6..e18ddc1c5 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.h\n+++ b/drivers/net/txgbe/txgbe_ethdev.h\n@@ -184,6 +184,12 @@ txgbe_dev_link_update_share(struct rte_eth_dev *dev,\n #define TXGBE_DEFAULT_TX_HTHRESH 0\n #define TXGBE_DEFAULT_TX_WTHRESH 0\n \n+/* store statistics names and its offset in stats structure */\n+struct rte_txgbe_xstats_name_off {\n+\tchar name[RTE_ETH_XSTATS_NAME_SIZE];\n+\tunsigned int offset;\n+};\n+\n const uint32_t *txgbe_dev_supported_ptypes_get(struct rte_eth_dev *dev);\n int txgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,\n \t\t\t\t struct rte_ether_addr *mc_addr_set,\n", "prefixes": [ "v4", "34/58" ] }