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GET /api/patches/81296/?format=api
{ "id": 81296, "url": "http://patches.dpdk.org/api/patches/81296/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201019085415.82207-15-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201019085415.82207-15-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201019085415.82207-15-jiawenwu@trustnetic.com", "date": "2020-10-19T08:53:31", "name": "[v4,14/58] net/txgbe: add device configure operation", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f0deb11cf4dbe90a471fb007c146b9af822ba906", "submitter": { "id": 1932, "url": "http://patches.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201019085415.82207-15-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 13094, "url": "http://patches.dpdk.org/api/series/13094/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13094", "date": "2020-10-19T08:53:17", "name": "net: txgbe PMD", "version": 4, "mbox": "http://patches.dpdk.org/series/13094/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81296/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/81296/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D11D5A04DC;\n\tMon, 19 Oct 2020 10:57:05 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D25ADC8E2;\n\tMon, 19 Oct 2020 10:53:07 +0200 (CEST)", "from smtpproxy21.qq.com (smtpbg702.qq.com [203.205.195.102])\n by dpdk.org (Postfix) with ESMTP id CB50EC82C\n for <dev@dpdk.org>; Mon, 19 Oct 2020 10:52:50 +0200 (CEST)", "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Mon, 19 Oct 2020 16:52:45 +0800 (CST)" ], "X-QQ-mid": "bizesmtp6t1603097565t8jy3kz3x", "X-QQ-SSF": "01400000002000C0C000B00A0000000", "X-QQ-FEAT": "cTSAXDkpFsaQgT2gHHiMvC1jUEBekzyct2UtyxWrnCYOV8+eNXdvD6OSAP+qa\n 8+TYceMYolVaJp+7i+C2yp6uMPCDpkTTotYSi1PdDpjeqmqoqTediLcnM06442ti8LGjNjD\n u0YDkHJfC3LVDwSBEXmVtqVDY7W9wcrAiS546bys4pR5G1IF6a+AHUa9DA5qsvSyQjUwIyf\n QacCFPHtJ8aNL/JZBnB+6DDREA5bR8MhyYU6PyeU4zjHIX3PomC3aMFMfQGabfgRXVrK19a\n ggNk/0sJb1lUJxMOJJ5kZX+xdaIKfpUQfyf+d9efvwvqYS69olVEXylGaGJ10jFM5i32rIj\n 2CRDpINtXeyCKi0u0P8GbN155t5XA==", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>", "Date": "Mon, 19 Oct 2020 16:53:31 +0800", "Message-Id": "<20201019085415.82207-15-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.18.4", "In-Reply-To": "<20201019085415.82207-1-jiawenwu@trustnetic.com>", "References": "<20201019085415.82207-1-jiawenwu@trustnetic.com>", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign5", "X-QQ-Bgrelay": "1", "Subject": "[dpdk-dev] [PATCH v4 14/58] net/txgbe: add device configure\n\toperation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add device configure operation.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n doc/guides/nics/txgbe.rst | 1 +\n drivers/net/txgbe/txgbe_ethdev.c | 195 +++++++++++++++++++++++++++++++\n drivers/net/txgbe/txgbe_ethdev.h | 7 ++\n 3 files changed, 203 insertions(+)", "diff": "diff --git a/doc/guides/nics/txgbe.rst b/doc/guides/nics/txgbe.rst\nindex 994ea0583..78cb611c2 100644\n--- a/doc/guides/nics/txgbe.rst\n+++ b/doc/guides/nics/txgbe.rst\n@@ -10,6 +10,7 @@ for Wangxun 10 Gigabit Ethernet NICs.\n Features\n --------\n \n+- Multiple queues for TX and RX\n - Link state information\n \n Prerequisites\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex 2c4f17cce..5e866461f 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -299,6 +299,200 @@ static struct rte_pci_driver rte_txgbe_pmd = {\n \t.remove = eth_txgbe_pci_remove,\n };\n \n+static int\n+txgbe_check_vf_rss_rxq_num(struct rte_eth_dev *dev, uint16_t nb_rx_q)\n+{\n+\tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n+\n+\tswitch (nb_rx_q) {\n+\tcase 1:\n+\tcase 2:\n+\t\tRTE_ETH_DEV_SRIOV(dev).active = ETH_64_POOLS;\n+\t\tbreak;\n+\tcase 4:\n+\t\tRTE_ETH_DEV_SRIOV(dev).active = ETH_32_POOLS;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tRTE_ETH_DEV_SRIOV(dev).nb_q_per_pool =\n+\t\tTXGBE_MAX_RX_QUEUE_NUM / RTE_ETH_DEV_SRIOV(dev).active;\n+\tRTE_ETH_DEV_SRIOV(dev).def_pool_q_idx =\n+\t\tpci_dev->max_vfs * RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool;\n+\treturn 0;\n+}\n+\n+static int\n+txgbe_check_mq_mode(struct rte_eth_dev *dev)\n+{\n+\tstruct rte_eth_conf *dev_conf = &dev->data->dev_conf;\n+\tuint16_t nb_rx_q = dev->data->nb_rx_queues;\n+\tuint16_t nb_tx_q = dev->data->nb_tx_queues;\n+\n+\tif (RTE_ETH_DEV_SRIOV(dev).active != 0) {\n+\t\t/* check multi-queue mode */\n+\t\tswitch (dev_conf->rxmode.mq_mode) {\n+\t\tcase ETH_MQ_RX_VMDQ_DCB:\n+\t\t\tPMD_INIT_LOG(INFO, \"ETH_MQ_RX_VMDQ_DCB mode supported in SRIOV\");\n+\t\t\tbreak;\n+\t\tcase ETH_MQ_RX_VMDQ_DCB_RSS:\n+\t\t\t/* DCB/RSS VMDQ in SRIOV mode, not implement yet */\n+\t\t\tPMD_INIT_LOG(ERR, \"SRIOV active,\"\n+\t\t\t\t\t\" unsupported mq_mode rx %d.\",\n+\t\t\t\t\tdev_conf->rxmode.mq_mode);\n+\t\t\treturn -EINVAL;\n+\t\tcase ETH_MQ_RX_RSS:\n+\t\tcase ETH_MQ_RX_VMDQ_RSS:\n+\t\t\tdev->data->dev_conf.rxmode.mq_mode = ETH_MQ_RX_VMDQ_RSS;\n+\t\t\tif (nb_rx_q <= RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool)\n+\t\t\t\tif (txgbe_check_vf_rss_rxq_num(dev, nb_rx_q)) {\n+\t\t\t\t\tPMD_INIT_LOG(ERR, \"SRIOV is active,\"\n+\t\t\t\t\t\t\" invalid queue number\"\n+\t\t\t\t\t\t\" for VMDQ RSS, allowed\"\n+\t\t\t\t\t\t\" value are 1, 2 or 4.\");\n+\t\t\t\t\treturn -EINVAL;\n+\t\t\t\t}\n+\t\t\tbreak;\n+\t\tcase ETH_MQ_RX_VMDQ_ONLY:\n+\t\tcase ETH_MQ_RX_NONE:\n+\t\t\t/* if nothing mq mode configure, use default scheme */\n+\t\t\tdev->data->dev_conf.rxmode.mq_mode =\n+\t\t\t\tETH_MQ_RX_VMDQ_ONLY;\n+\t\t\tbreak;\n+\t\tdefault: /* ETH_MQ_RX_DCB, ETH_MQ_RX_DCB_RSS or ETH_MQ_TX_DCB*/\n+\t\t\t/* SRIOV only works in VMDq enable mode */\n+\t\t\tPMD_INIT_LOG(ERR, \"SRIOV is active,\"\n+\t\t\t\t\t\" wrong mq_mode rx %d.\",\n+\t\t\t\t\tdev_conf->rxmode.mq_mode);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tswitch (dev_conf->txmode.mq_mode) {\n+\t\tcase ETH_MQ_TX_VMDQ_DCB:\n+\t\t\tPMD_INIT_LOG(INFO, \"ETH_MQ_TX_VMDQ_DCB mode supported in SRIOV\");\n+\t\t\tdev->data->dev_conf.txmode.mq_mode = ETH_MQ_TX_VMDQ_DCB;\n+\t\t\tbreak;\n+\t\tdefault: /* ETH_MQ_TX_VMDQ_ONLY or ETH_MQ_TX_NONE */\n+\t\t\tdev->data->dev_conf.txmode.mq_mode =\n+\t\t\t\tETH_MQ_TX_VMDQ_ONLY;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\t/* check valid queue number */\n+\t\tif ((nb_rx_q > RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool) ||\n+\t\t (nb_tx_q > RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool)) {\n+\t\t\tPMD_INIT_LOG(ERR, \"SRIOV is active,\"\n+\t\t\t\t\t\" nb_rx_q=%d nb_tx_q=%d queue number\"\n+\t\t\t\t\t\" must be less than or equal to %d.\",\n+\t\t\t\t\tnb_rx_q, nb_tx_q,\n+\t\t\t\t\tRTE_ETH_DEV_SRIOV(dev).nb_q_per_pool);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t} else {\n+\t\tif (dev_conf->rxmode.mq_mode == ETH_MQ_RX_VMDQ_DCB_RSS) {\n+\t\t\tPMD_INIT_LOG(ERR, \"VMDQ+DCB+RSS mq_mode is\"\n+\t\t\t\t\t \" not supported.\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\t/* check configuration for vmdb+dcb mode */\n+\t\tif (dev_conf->rxmode.mq_mode == ETH_MQ_RX_VMDQ_DCB) {\n+\t\t\tconst struct rte_eth_vmdq_dcb_conf *conf;\n+\n+\t\t\tif (nb_rx_q != TXGBE_VMDQ_DCB_NB_QUEUES) {\n+\t\t\t\tPMD_INIT_LOG(ERR, \"VMDQ+DCB, nb_rx_q != %d.\",\n+\t\t\t\t\t\tTXGBE_VMDQ_DCB_NB_QUEUES);\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t\tconf = &dev_conf->rx_adv_conf.vmdq_dcb_conf;\n+\t\t\tif (!(conf->nb_queue_pools == ETH_16_POOLS ||\n+\t\t\t conf->nb_queue_pools == ETH_32_POOLS)) {\n+\t\t\t\tPMD_INIT_LOG(ERR, \"VMDQ+DCB selected,\"\n+\t\t\t\t\t\t\" nb_queue_pools must be %d or %d.\",\n+\t\t\t\t\t\tETH_16_POOLS, ETH_32_POOLS);\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t}\n+\t\tif (dev_conf->txmode.mq_mode == ETH_MQ_TX_VMDQ_DCB) {\n+\t\t\tconst struct rte_eth_vmdq_dcb_tx_conf *conf;\n+\n+\t\t\tif (nb_tx_q != TXGBE_VMDQ_DCB_NB_QUEUES) {\n+\t\t\t\tPMD_INIT_LOG(ERR, \"VMDQ+DCB, nb_tx_q != %d\",\n+\t\t\t\t\t\t TXGBE_VMDQ_DCB_NB_QUEUES);\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t\tconf = &dev_conf->tx_adv_conf.vmdq_dcb_tx_conf;\n+\t\t\tif (!(conf->nb_queue_pools == ETH_16_POOLS ||\n+\t\t\t conf->nb_queue_pools == ETH_32_POOLS)) {\n+\t\t\t\tPMD_INIT_LOG(ERR, \"VMDQ+DCB selected,\"\n+\t\t\t\t\t\t\" nb_queue_pools != %d and\"\n+\t\t\t\t\t\t\" nb_queue_pools != %d.\",\n+\t\t\t\t\t\tETH_16_POOLS, ETH_32_POOLS);\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t}\n+\n+\t\t/* For DCB mode check our configuration before we go further */\n+\t\tif (dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB) {\n+\t\t\tconst struct rte_eth_dcb_rx_conf *conf;\n+\n+\t\t\tconf = &dev_conf->rx_adv_conf.dcb_rx_conf;\n+\t\t\tif (!(conf->nb_tcs == ETH_4_TCS ||\n+\t\t\t conf->nb_tcs == ETH_8_TCS)) {\n+\t\t\t\tPMD_INIT_LOG(ERR, \"DCB selected, nb_tcs != %d\"\n+\t\t\t\t\t\t\" and nb_tcs != %d.\",\n+\t\t\t\t\t\tETH_4_TCS, ETH_8_TCS);\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (dev_conf->txmode.mq_mode == ETH_MQ_TX_DCB) {\n+\t\t\tconst struct rte_eth_dcb_tx_conf *conf;\n+\n+\t\t\tconf = &dev_conf->tx_adv_conf.dcb_tx_conf;\n+\t\t\tif (!(conf->nb_tcs == ETH_4_TCS ||\n+\t\t\t conf->nb_tcs == ETH_8_TCS)) {\n+\t\t\t\tPMD_INIT_LOG(ERR, \"DCB selected, nb_tcs != %d\"\n+\t\t\t\t\t\t\" and nb_tcs != %d.\",\n+\t\t\t\t\t\tETH_4_TCS, ETH_8_TCS);\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n+static int\n+txgbe_dev_configure(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);\n+\tstruct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);\n+\tint ret;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tif (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)\n+\t\tdev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;\n+\n+\t/* multiple queue mode checking */\n+\tret = txgbe_check_mq_mode(dev);\n+\tif (ret != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"txgbe_check_mq_mode fails with %d.\",\n+\t\t\t ret);\n+\t\treturn ret;\n+\t}\n+\n+\t/* set flag to update link status after init */\n+\tintr->flags |= TXGBE_FLAG_NEED_LINK_UPDATE;\n+\n+\t/*\n+\t * Initialize to TRUE. If any of Rx queues doesn't meet the bulk\n+\t * allocation Rx preconditions we will reset it.\n+\t */\n+\tadapter->rx_bulk_alloc_allowed = true;\n+\n+\treturn 0;\n+}\n \n static void\n txgbe_dev_phy_intr_setup(struct rte_eth_dev *dev)\n@@ -808,6 +1002,7 @@ txgbe_configure_msix(struct rte_eth_dev *dev)\n }\n \n static const struct eth_dev_ops txgbe_eth_dev_ops = {\n+\t.dev_configure = txgbe_dev_configure,\n \t.dev_infos_get = txgbe_dev_info_get,\n };\n \ndiff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h\nindex 2c13da38f..8dd6c36c2 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.h\n+++ b/drivers/net/txgbe/txgbe_ethdev.h\n@@ -19,6 +19,9 @@\n * FreeBSD driver.\n */\n #define TXGBE_HKEY_MAX_INDEX 10\n+/*Default value of Max Rx Queue*/\n+#define TXGBE_MAX_RX_QUEUE_NUM\t128\n+#define TXGBE_VMDQ_DCB_NB_QUEUES TXGBE_MAX_RX_QUEUE_NUM\n \n #define TXGBE_QUEUE_ITR_INTERVAL_DEFAULT\t500 /* 500us */\n \n@@ -51,8 +54,12 @@ struct txgbe_interrupt {\n struct txgbe_adapter {\n \tstruct txgbe_hw hw;\n \tstruct txgbe_interrupt intr;\n+\tbool rx_bulk_alloc_allowed;\n };\n \n+#define TXGBE_DEV_ADAPTER(dev) \\\n+\t\t((struct txgbe_adapter *)(dev)->data->dev_private)\n+\n #define TXGBE_DEV_HW(dev) \\\n \t(&((struct txgbe_adapter *)(dev)->data->dev_private)->hw)\n \n", "prefixes": [ "v4", "14/58" ] }