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GET /api/patches/81251/?format=api
{ "id": 81251, "url": "http://patches.dpdk.org/api/patches/81251/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201018103430.30997-6-ting.xu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201018103430.30997-6-ting.xu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201018103430.30997-6-ting.xu@intel.com", "date": "2020-10-18T10:34:29", "name": "[v7,5/6] net/iavf: enable IRQ mapping configuration for large VF", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e792426bbbaafe170a8aa60b7524ec8ec57edf8b", "submitter": { "id": 1363, "url": "http://patches.dpdk.org/api/people/1363/?format=api", "name": "Xu, Ting", "email": "ting.xu@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201018103430.30997-6-ting.xu@intel.com/mbox/", "series": [ { "id": 13079, "url": "http://patches.dpdk.org/api/series/13079/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13079", "date": "2020-10-18T10:34:24", "name": "enable large VF configuration", "version": 7, "mbox": "http://patches.dpdk.org/series/13079/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81251/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/81251/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C69B0A04B0;\n\tSun, 18 Oct 2020 12:46:38 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 19A13D041;\n\tSun, 18 Oct 2020 12:45:05 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by dpdk.org (Postfix) with ESMTP id 17499CFC3\n for <dev@dpdk.org>; Sun, 18 Oct 2020 12:44:54 +0200 (CEST)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 Oct 2020 03:44:54 -0700", "from dpdk-xuting-second.sh.intel.com ([10.67.116.154])\n by fmsmga004.fm.intel.com with ESMTP; 18 Oct 2020 03:44:53 -0700" ], "IronPort-SDR": [ "\n 03JEe4Ckd73mv1ER4pliPuHlbnq5dLv5OwVFdL1es7zbuQBAuwOMN89nIeE8MjvjtjemlDlJwQ\n 2XAfHvdndfzw==", "\n OGQqNartwne45QRYdqgBA/e/IaWhmqFEWC5w6MCnSodpnz798R1dR3BFYROhReV6sVamOKG/Bx\n s0T5w4xfyS6w==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9777\"; a=\"153826032\"", "E=Sophos;i=\"5.77,390,1596524400\"; d=\"scan'208\";a=\"153826032\"", "E=Sophos;i=\"5.77,390,1596524400\"; d=\"scan'208\";a=\"347087283\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Ting Xu <ting.xu@intel.com>", "To": "dev@dpdk.org", "Cc": "qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com,\n Ting Xu <ting.xu@intel.com>", "Date": "Sun, 18 Oct 2020 18:34:29 +0800", "Message-Id": "<20201018103430.30997-6-ting.xu@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20201018103430.30997-1-ting.xu@intel.com>", "References": "<20200909072028.16726-1-ting.xu@intel.com>\n <20201018103430.30997-1-ting.xu@intel.com>", "Subject": "[dpdk-dev] [PATCH v7 5/6] net/iavf: enable IRQ mapping\n\tconfiguration for large VF", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The current IRQ mapping configuration only supports max 16 queues and\n16 MSIX vectors. Change the queue vector mapping structure to indicate\nup to 256 queues. A new opcode is used to handle the case with large\nnumber of queues. To avoid adminq buffer size limitation, we support\nto send the virtchnl message multiple times if needed.\n\nSigned-off-by: Ting Xu <ting.xu@intel.com>\n---\n drivers/net/iavf/iavf.h | 12 +++++---\n drivers/net/iavf/iavf_ethdev.c | 52 +++++++++++++++++++++++++++++-----\n drivers/net/iavf/iavf_vchnl.c | 50 +++++++++++++++++++++++++++++---\n 3 files changed, 99 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/net/iavf/iavf.h b/drivers/net/iavf/iavf.h\nindex 1cdac1b10..5e330b215 100644\n--- a/drivers/net/iavf/iavf.h\n+++ b/drivers/net/iavf/iavf.h\n@@ -22,6 +22,7 @@\n #define IAVF_MAX_NUM_QUEUES_DFLT\t 16\n #define IAVF_MAX_NUM_QUEUES_LV\t\t 256\n #define IAVF_CFG_Q_NUM_PER_BUF\t\t 32\n+#define IAVF_IRQ_MAP_NUM_PER_BUF\t 128\n \n #define IAVF_NUM_MACADDR_MAX 64\n \n@@ -106,8 +107,10 @@ struct iavf_fdir_info {\n \tstruct iavf_fdir_conf conf;\n };\n \n-/* TODO: is that correct to assume the max number to be 16 ?*/\n-#define IAVF_MAX_MSIX_VECTORS 16\n+struct iavf_qv_map {\n+\tuint16_t queue_id;\n+\tuint16_t vector_id;\n+};\n \n /* Message type read in admin queue from PF */\n enum iavf_aq_result {\n@@ -152,8 +155,7 @@ struct iavf_info {\n \tuint16_t nb_msix; /* number of MSI-X interrupts on Rx */\n \tuint16_t msix_base; /* msix vector base from */\n \tuint16_t max_rss_qregion; /* max RSS queue region supported by PF */\n-\t/* queue bitmask for each vector */\n-\tuint16_t rxq_map[IAVF_MAX_MSIX_VECTORS];\n+\tstruct iavf_qv_map *qv_map; /* queue vector mapping */\n \tstruct iavf_flow_list flow_list;\n \trte_spinlock_t flow_ops_lock;\n \tstruct iavf_parser_list rss_parser_list;\n@@ -274,6 +276,8 @@ int iavf_configure_queues(struct iavf_adapter *adapter,\n \t\t\tuint16_t num_queue_pairs, uint16_t index);\n int iavf_get_supported_rxdid(struct iavf_adapter *adapter);\n int iavf_config_irq_map(struct iavf_adapter *adapter);\n+int iavf_config_irq_map_lv(struct iavf_adapter *adapter, uint16_t num,\n+\t\t\tuint16_t index);\n void iavf_add_del_all_mac_addr(struct iavf_adapter *adapter, bool add);\n int iavf_dev_link_update(struct rte_eth_dev *dev,\n \t\t\t__rte_unused int wait_to_complete);\ndiff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c\nindex db334b390..77c49ed03 100644\n--- a/drivers/net/iavf/iavf_ethdev.c\n+++ b/drivers/net/iavf/iavf_ethdev.c\n@@ -423,6 +423,7 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,\n \t\tIAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n \tstruct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);\n \tstruct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter);\n+\tstruct iavf_qv_map *qv_map;\n \tuint16_t interval, i;\n \tint vec;\n \n@@ -443,6 +444,14 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,\n \t\t}\n \t}\n \n+\tqv_map = rte_zmalloc(\"qv_map\",\n+\t\tdev->data->nb_rx_queues * sizeof(struct iavf_qv_map), 0);\n+\tif (!qv_map) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to allocate %d queue-vector map\",\n+\t\t\t\tdev->data->nb_rx_queues);\n+\t\treturn -1;\n+\t}\n+\n \tif (!dev->data->dev_conf.intr_conf.rxq ||\n \t !rte_intr_dp_is_en(intr_handle)) {\n \t\t/* Rx interrupt disabled, Map interrupt only for writeback */\n@@ -473,16 +482,21 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,\n \t\t}\n \t\tIAVF_WRITE_FLUSH(hw);\n \t\t/* map all queues to the same interrupt */\n-\t\tfor (i = 0; i < dev->data->nb_rx_queues; i++)\n-\t\t\tvf->rxq_map[vf->msix_base] |= 1 << i;\n+\t\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n+\t\t\tqv_map[i].queue_id = i;\n+\t\t\tqv_map[i].vector_id = vf->msix_base;\n+\t\t}\n+\t\tvf->qv_map = qv_map;\n \t} else {\n \t\tif (!rte_intr_allow_others(intr_handle)) {\n \t\t\tvf->nb_msix = 1;\n \t\t\tvf->msix_base = IAVF_MISC_VEC_ID;\n \t\t\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n-\t\t\t\tvf->rxq_map[vf->msix_base] |= 1 << i;\n+\t\t\t\tqv_map[i].queue_id = i;\n+\t\t\t\tqv_map[i].vector_id = vf->msix_base;\n \t\t\t\tintr_handle->intr_vec[i] = IAVF_MISC_VEC_ID;\n \t\t\t}\n+\t\t\tvf->qv_map = qv_map;\n \t\t\tPMD_DRV_LOG(DEBUG,\n \t\t\t\t \"vector %u are mapping to all Rx queues\",\n \t\t\t\t vf->msix_base);\n@@ -495,20 +509,44 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,\n \t\t\tvf->msix_base = IAVF_RX_VEC_START;\n \t\t\tvec = IAVF_RX_VEC_START;\n \t\t\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n-\t\t\t\tvf->rxq_map[vec] |= 1 << i;\n+\t\t\t\tqv_map[i].queue_id = i;\n+\t\t\t\tqv_map[i].vector_id = vec;\n \t\t\t\tintr_handle->intr_vec[i] = vec++;\n \t\t\t\tif (vec >= vf->nb_msix)\n \t\t\t\t\tvec = IAVF_RX_VEC_START;\n \t\t\t}\n+\t\t\tvf->qv_map = qv_map;\n \t\t\tPMD_DRV_LOG(DEBUG,\n \t\t\t\t \"%u vectors are mapping to %u Rx queues\",\n \t\t\t\t vf->nb_msix, dev->data->nb_rx_queues);\n \t\t}\n \t}\n \n-\tif (iavf_config_irq_map(adapter)) {\n-\t\tPMD_DRV_LOG(ERR, \"config interrupt mapping failed\");\n-\t\treturn -1;\n+\tif (!vf->lv_enabled) {\n+\t\tif (iavf_config_irq_map(adapter)) {\n+\t\t\tPMD_DRV_LOG(ERR, \"config interrupt mapping failed\");\n+\t\t\treturn -1;\n+\t\t}\n+\t} else {\n+\t\tuint16_t num_qv_maps = dev->data->nb_rx_queues;\n+\t\tuint16_t index = 0;\n+\n+\t\twhile (num_qv_maps > IAVF_IRQ_MAP_NUM_PER_BUF) {\n+\t\t\tif (iavf_config_irq_map_lv(adapter,\n+\t\t\t\t\tIAVF_IRQ_MAP_NUM_PER_BUF, index)) {\n+\t\t\t\tPMD_DRV_LOG(ERR, \"config interrupt mapping \"\n+\t\t\t\t\t\"for large VF failed\");\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t\tnum_qv_maps -= IAVF_IRQ_MAP_NUM_PER_BUF;\n+\t\t\tindex += IAVF_IRQ_MAP_NUM_PER_BUF;\n+\t\t}\n+\n+\t\tif (iavf_config_irq_map_lv(adapter, num_qv_maps, index)) {\n+\t\t\tPMD_DRV_LOG(ERR, \"config interrupt mapping \"\n+\t\t\t\t\"for large VF failed\");\n+\t\t\treturn -1;\n+\t\t}\n \t}\n \treturn 0;\n }\ndiff --git a/drivers/net/iavf/iavf_vchnl.c b/drivers/net/iavf/iavf_vchnl.c\nindex 829963434..bc7e4f83f 100644\n--- a/drivers/net/iavf/iavf_vchnl.c\n+++ b/drivers/net/iavf/iavf_vchnl.c\n@@ -775,13 +775,14 @@ iavf_config_irq_map(struct iavf_adapter *adapter)\n \t\treturn -ENOMEM;\n \n \tmap_info->num_vectors = vf->nb_msix;\n-\tfor (i = 0; i < vf->nb_msix; i++) {\n-\t\tvecmap = &map_info->vecmap[i];\n+\tfor (i = 0; i < adapter->eth_dev->data->nb_rx_queues; i++) {\n+\t\tvecmap =\n+\t\t &map_info->vecmap[vf->qv_map[i].vector_id - vf->msix_base];\n \t\tvecmap->vsi_id = vf->vsi_res->vsi_id;\n \t\tvecmap->rxitr_idx = IAVF_ITR_INDEX_DEFAULT;\n-\t\tvecmap->vector_id = vf->msix_base + i;\n+\t\tvecmap->vector_id = vf->qv_map[i].vector_id;\n \t\tvecmap->txq_map = 0;\n-\t\tvecmap->rxq_map = vf->rxq_map[vf->msix_base + i];\n+\t\tvecmap->rxq_map |= 1 << vf->qv_map[i].queue_id;\n \t}\n \n \targs.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;\n@@ -797,6 +798,47 @@ iavf_config_irq_map(struct iavf_adapter *adapter)\n \treturn err;\n }\n \n+int\n+iavf_config_irq_map_lv(struct iavf_adapter *adapter, uint16_t num,\n+\t\tuint16_t index)\n+{\n+\tstruct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);\n+\tstruct virtchnl_queue_vector_maps *map_info;\n+\tstruct virtchnl_queue_vector *qv_maps;\n+\tstruct iavf_cmd_info args;\n+\tint len, i, err;\n+\tint count = 0;\n+\n+\tlen = sizeof(struct virtchnl_queue_vector_maps) +\n+\t sizeof(struct virtchnl_queue_vector) * (num - 1);\n+\n+\tmap_info = rte_zmalloc(\"map_info\", len, 0);\n+\tif (!map_info)\n+\t\treturn -ENOMEM;\n+\n+\tmap_info->vport_id = vf->vsi_res->vsi_id;\n+\tmap_info->num_qv_maps = num;\n+\tfor (i = index; i < index + map_info->num_qv_maps; i++) {\n+\t\tqv_maps = &map_info->qv_maps[count++];\n+\t\tqv_maps->itr_idx = VIRTCHNL_ITR_IDX_0;\n+\t\tqv_maps->queue_type = VIRTCHNL_QUEUE_TYPE_RX;\n+\t\tqv_maps->queue_id = vf->qv_map[i].queue_id;\n+\t\tqv_maps->vector_id = vf->qv_map[i].vector_id;\n+\t}\n+\n+\targs.ops = VIRTCHNL_OP_MAP_QUEUE_VECTOR;\n+\targs.in_args = (u8 *)map_info;\n+\targs.in_args_size = len;\n+\targs.out_buffer = vf->aq_resp;\n+\targs.out_size = IAVF_AQ_BUF_SZ;\n+\terr = iavf_execute_vf_cmd(adapter, &args);\n+\tif (err)\n+\t\tPMD_DRV_LOG(ERR, \"fail to execute command OP_MAP_QUEUE_VECTOR\");\n+\n+\trte_free(map_info);\n+\treturn err;\n+}\n+\n void\n iavf_add_del_all_mac_addr(struct iavf_adapter *adapter, bool add)\n {\n", "prefixes": [ "v7", "5/6" ] }