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GET /api/patches/81125/?format=api
{ "id": 81125, "url": "http://patches.dpdk.org/api/patches/81125/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201016142742.87297-2-ciara.power@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201016142742.87297-2-ciara.power@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201016142742.87297-2-ciara.power@intel.com", "date": "2020-10-16T14:27:25", "name": "[v9,01/18] eal: add max SIMD bitwidth", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "46d0ac78bccb75c0d2b962859432f6fc47980844", "submitter": { "id": 978, "url": "http://patches.dpdk.org/api/people/978/?format=api", "name": "Power, Ciara", "email": "ciara.power@intel.com" }, "delegate": { "id": 24651, "url": "http://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201016142742.87297-2-ciara.power@intel.com/mbox/", "series": [ { "id": 13067, "url": "http://patches.dpdk.org/api/series/13067/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13067", "date": "2020-10-16T14:27:24", "name": "add max SIMD bitwidth to EAL", "version": 9, "mbox": "http://patches.dpdk.org/series/13067/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81125/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/81125/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5934EA04DB;\n\tFri, 16 Oct 2020 16:28:17 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 303BD1EF46;\n\tFri, 16 Oct 2020 16:27:54 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by dpdk.org (Postfix) with ESMTP id B89EF1EF3C\n for <dev@dpdk.org>; Fri, 16 Oct 2020 16:27:51 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 16 Oct 2020 07:27:51 -0700", "from silpixa00400355.ir.intel.com (HELO\n silpixa00400355.ger.corp.intel.com) ([10.237.222.239])\n by FMSMGA003.fm.intel.com with ESMTP; 16 Oct 2020 07:27:47 -0700" ], "IronPort-SDR": [ "\n wOfOeH1Cjw+Mobrmti/7cGpWgO97JjujiP6enXz/bl6dd94d1JsHtBUSvi9c/aQouT2xhopKZG\n ghC7SWBNJaOQ==", "\n dppi5Ex7CAR/7Vml9O843R08maRyiDdsO4s1mT+leiVEHUrnv1oYLM0vSOwWlPVRJpDegsOkqv\n n2yOaDwOpAAw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9775\"; a=\"163142966\"", "E=Sophos;i=\"5.77,383,1596524400\"; d=\"scan'208\";a=\"163142966\"", "E=Sophos;i=\"5.77,383,1596524400\"; d=\"scan'208\";a=\"357394959\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Ciara Power <ciara.power@intel.com>", "To": "dev@dpdk.org", "Cc": "viktorin@rehivetech.com, ruifeng.wang@arm.com, jerinj@marvell.com,\n drc@linux.vnet.ibm.com, bruce.richardson@intel.com,\n konstantin.ananyev@intel.com, david.marchand@redhat.com,\n Ciara Power <ciara.power@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>,\n Narcisa Ana Maria Vasile <navasile@linux.microsoft.com>,\n Dmitry Malloy <dmitrym@microsoft.com>,\n Pallavi Kadam <pallavi.kadam@intel.com>, Ray Kinsella <mdr@ashroe.eu>,\n Neil Horman <nhorman@tuxdriver.com>", "Date": "Fri, 16 Oct 2020 15:27:25 +0100", "Message-Id": "<20201016142742.87297-2-ciara.power@intel.com>", "X-Mailer": "git-send-email 2.22.0", "In-Reply-To": "<20201016142742.87297-1-ciara.power@intel.com>", "References": "<20200807155859.63888-1-ciara.power@intel.com>\n <20201016142742.87297-1-ciara.power@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v9 01/18] eal: add max SIMD bitwidth", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds a max SIMD bitwidth EAL configuration. The API allows\nfor an app to set this value. It can also be set using EAL argument\n--force-max-simd-bitwidth, which will lock the value and override any\nmodifications made by the app.\n\nEach arch has a define for the default SIMD bitwidth value, this is used\non EAL init to set the config max SIMD bitwidth.\n\nCc: Ruifeng Wang <ruifeng.wang@arm.com>\nCc: Jerin Jacob <jerinj@marvell.com>\nCc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>\nCc: David Christensen <drc@linux.vnet.ibm.com>\n\nSigned-off-by: Ciara Power <ciara.power@intel.com>\nAcked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\n\n---\nv9: Added release note.\nv7: Reordered entries in the symbol .map file.\nv4:\n - Used RTE_SIMD_MAX instead of UINT16_MAX.\n - Renamed enums to better reflect usage.\n - Added functions to windows symbol export file.\n - Modified Doxygen comments.\n - Modified enum name.\n - Changed RTE_SIMD_MAX value to a power of 2.\n - Merged patch 2 into this patch.\n - Enum now used for default value defines.\n - Fixed some small comments on v3.\nv3:\n - Added enum value to essentially disable using max SIMD to choose\n paths, intended for use by ARM SVE.\n - Fixed parsing bitwidth argument to return an error for values\n greater than uint16_t.\n - Removed unnecessary define in generic rte_vect.h\n - Changed default bitwidth for ARM to UINT16_MAX, to allow for SVE.\nv2:\n - Added to Doxygen comment for API.\n - Changed default bitwidth for Arm to 128.\n---\n doc/guides/rel_notes/release_20_11.rst | 6 ++\n lib/librte_eal/arm/include/rte_vect.h | 2 +\n lib/librte_eal/common/eal_common_options.c | 66 ++++++++++++++++++++++\n lib/librte_eal/common/eal_internal_cfg.h | 8 +++\n lib/librte_eal/common/eal_options.h | 2 +\n lib/librte_eal/include/rte_eal.h | 40 +++++++++++++\n lib/librte_eal/ppc/include/rte_vect.h | 2 +\n lib/librte_eal/rte_eal_exports.def | 2 +\n lib/librte_eal/rte_eal_version.map | 2 +\n lib/librte_eal/x86/include/rte_vect.h | 2 +\n 10 files changed, 132 insertions(+)", "diff": "diff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst\nindex 48717ee536..4d2b949a6e 100644\n--- a/doc/guides/rel_notes/release_20_11.rst\n+++ b/doc/guides/rel_notes/release_20_11.rst\n@@ -77,6 +77,12 @@ New Features\n This API is specific to x86 and implemented as a stub for other\n architectures.\n \n+* **Added support for limiting maximum SIMD bitwidth.**\n+\n+ Added a new EAL config setting ``max_simd_bitwidth`` to limit the vector\n+ path selection at runtime. This value can be set by apps using the\n+ ``rte_set_max_simd_bitwidth`` function, or by the user with EAL flag ``--force-max-simd-bitwidth``.\n+\n * **Updated CRC modules of the net library.**\n \n * Added runtime selection of the optimal architecture-specific CRC path.\ndiff --git a/lib/librte_eal/arm/include/rte_vect.h b/lib/librte_eal/arm/include/rte_vect.h\nindex f6a455b4e7..df8fb8b670 100644\n--- a/lib/librte_eal/arm/include/rte_vect.h\n+++ b/lib/librte_eal/arm/include/rte_vect.h\n@@ -14,6 +14,8 @@\n extern \"C\" {\n #endif\n \n+#define RTE_DEFAULT_SIMD_BITWIDTH RTE_SIMD_MAX\n+\n typedef int32x4_t xmm_t;\n \n #define\tXMM_SIZE\t(sizeof(xmm_t))\ndiff --git a/lib/librte_eal/common/eal_common_options.c b/lib/librte_eal/common/eal_common_options.c\nindex a5426e1234..8c79f1b2fc 100644\n--- a/lib/librte_eal/common/eal_common_options.c\n+++ b/lib/librte_eal/common/eal_common_options.c\n@@ -35,6 +35,7 @@\n #ifndef RTE_EXEC_ENV_WINDOWS\n #include <rte_telemetry.h>\n #endif\n+#include <rte_vect.h>\n \n #include \"eal_internal_cfg.h\"\n #include \"eal_options.h\"\n@@ -102,6 +103,7 @@ eal_long_options[] = {\n \t{OPT_MATCH_ALLOCATIONS, 0, NULL, OPT_MATCH_ALLOCATIONS_NUM},\n \t{OPT_TELEMETRY, 0, NULL, OPT_TELEMETRY_NUM },\n \t{OPT_NO_TELEMETRY, 0, NULL, OPT_NO_TELEMETRY_NUM },\n+\t{OPT_FORCE_MAX_SIMD_BITWIDTH, 1, NULL, OPT_FORCE_MAX_SIMD_BITWIDTH_NUM},\n \t{0, 0, NULL, 0 }\n };\n \n@@ -343,6 +345,8 @@ eal_reset_internal_config(struct internal_config *internal_cfg)\n \tinternal_cfg->user_mbuf_pool_ops_name = NULL;\n \tCPU_ZERO(&internal_cfg->ctrl_cpuset);\n \tinternal_cfg->init_complete = 0;\n+\tinternal_cfg->max_simd_bitwidth.bitwidth = RTE_DEFAULT_SIMD_BITWIDTH;\n+\tinternal_cfg->max_simd_bitwidth.forced = 0;\n }\n \n static int\n@@ -1309,6 +1313,34 @@ eal_parse_iova_mode(const char *name)\n \treturn 0;\n }\n \n+static int\n+eal_parse_simd_bitwidth(const char *arg)\n+{\n+\tchar *end;\n+\tunsigned long bitwidth;\n+\tint ret;\n+\tstruct internal_config *internal_conf =\n+\t\teal_get_internal_configuration();\n+\n+\tif (arg == NULL || arg[0] == '\\0')\n+\t\treturn -1;\n+\n+\terrno = 0;\n+\tbitwidth = strtoul(arg, &end, 0);\n+\n+\t/* check for errors */\n+\tif (errno != 0 || end == NULL || *end != '\\0' || bitwidth > RTE_SIMD_MAX)\n+\t\treturn -1;\n+\n+\tif (bitwidth == 0)\n+\t\tbitwidth = (unsigned long) RTE_SIMD_MAX;\n+\tret = rte_set_max_simd_bitwidth(bitwidth);\n+\tif (ret < 0)\n+\t\treturn -1;\n+\tinternal_conf->max_simd_bitwidth.forced = 1;\n+\treturn 0;\n+}\n+\n static int\n eal_parse_base_virtaddr(const char *arg)\n {\n@@ -1707,6 +1739,13 @@ eal_parse_common_option(int opt, const char *optarg,\n \tcase OPT_NO_TELEMETRY_NUM:\n \t\tconf->no_telemetry = 1;\n \t\tbreak;\n+\tcase OPT_FORCE_MAX_SIMD_BITWIDTH_NUM:\n+\t\tif (eal_parse_simd_bitwidth(optarg) < 0) {\n+\t\t\tRTE_LOG(ERR, EAL, \"invalid parameter for --\"\n+\t\t\t\t\tOPT_FORCE_MAX_SIMD_BITWIDTH \"\\n\");\n+\t\t\treturn -1;\n+\t\t}\n+\t\tbreak;\n \n \t/* don't know what to do, leave this to caller */\n \tdefault:\n@@ -1903,6 +1942,32 @@ eal_check_common_options(struct internal_config *internal_cfg)\n \treturn 0;\n }\n \n+uint16_t\n+rte_get_max_simd_bitwidth(void)\n+{\n+\tconst struct internal_config *internal_conf =\n+\t\teal_get_internal_configuration();\n+\treturn internal_conf->max_simd_bitwidth.bitwidth;\n+}\n+\n+int\n+rte_set_max_simd_bitwidth(uint16_t bitwidth)\n+{\n+\tstruct internal_config *internal_conf =\n+\t\teal_get_internal_configuration();\n+\tif (internal_conf->max_simd_bitwidth.forced) {\n+\t\tRTE_LOG(NOTICE, EAL, \"Cannot set max SIMD bitwidth - user runtime override enabled\");\n+\t\treturn -EPERM;\n+\t}\n+\n+\tif (bitwidth < RTE_SIMD_DISABLED || !rte_is_power_of_2(bitwidth)) {\n+\t\tRTE_LOG(ERR, EAL, \"Invalid bitwidth value!\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\tinternal_conf->max_simd_bitwidth.bitwidth = bitwidth;\n+\treturn 0;\n+}\n+\n void\n eal_common_usage(void)\n {\n@@ -1981,6 +2046,7 @@ eal_common_usage(void)\n \t \" --\"OPT_BASE_VIRTADDR\" Base virtual address\\n\"\n \t \" --\"OPT_TELEMETRY\" Enable telemetry support (on by default)\\n\"\n \t \" --\"OPT_NO_TELEMETRY\" Disable telemetry support\\n\"\n+\t \" --\"OPT_FORCE_MAX_SIMD_BITWIDTH\" Force the max SIMD bitwidth\\n\"\n \t \"\\nEAL options for DEBUG use only:\\n\"\n \t \" --\"OPT_HUGE_UNLINK\" Unlink hugepage files after init\\n\"\n \t \" --\"OPT_NO_HUGE\" Use malloc instead of hugetlbfs\\n\"\ndiff --git a/lib/librte_eal/common/eal_internal_cfg.h b/lib/librte_eal/common/eal_internal_cfg.h\nindex de627c7627..51dbe86e2b 100644\n--- a/lib/librte_eal/common/eal_internal_cfg.h\n+++ b/lib/librte_eal/common/eal_internal_cfg.h\n@@ -33,6 +33,12 @@ struct hugepage_info {\n \tint lock_descriptor; /**< file descriptor for hugepage dir */\n };\n \n+struct simd_bitwidth {\n+\tbool forced;\n+\t/**< flag indicating if bitwidth is forced and can't be modified */\n+\tuint16_t bitwidth; /**< bitwidth value */\n+};\n+\n /**\n * internal configuration\n */\n@@ -85,6 +91,8 @@ struct internal_config {\n \tvolatile unsigned int init_complete;\n \t/**< indicates whether EAL has completed initialization */\n \tunsigned int no_telemetry; /**< true to disable Telemetry */\n+\tstruct simd_bitwidth max_simd_bitwidth;\n+\t/**< max simd bitwidth path to use */\n };\n \n void eal_reset_internal_config(struct internal_config *internal_cfg);\ndiff --git a/lib/librte_eal/common/eal_options.h b/lib/librte_eal/common/eal_options.h\nindex 89769d48b4..ef33979664 100644\n--- a/lib/librte_eal/common/eal_options.h\n+++ b/lib/librte_eal/common/eal_options.h\n@@ -85,6 +85,8 @@ enum {\n \tOPT_TELEMETRY_NUM,\n #define OPT_NO_TELEMETRY \"no-telemetry\"\n \tOPT_NO_TELEMETRY_NUM,\n+#define OPT_FORCE_MAX_SIMD_BITWIDTH \"force-max-simd-bitwidth\"\n+\tOPT_FORCE_MAX_SIMD_BITWIDTH_NUM,\n \tOPT_LONG_MAX_NUM\n };\n \ndiff --git a/lib/librte_eal/include/rte_eal.h b/lib/librte_eal/include/rte_eal.h\nindex e3c2ef185e..706d3cca5a 100644\n--- a/lib/librte_eal/include/rte_eal.h\n+++ b/lib/librte_eal/include/rte_eal.h\n@@ -43,6 +43,23 @@ enum rte_proc_type_t {\n \tRTE_PROC_INVALID\n };\n \n+/**\n+ * The max SIMD bitwidth value to limit vector path selection.\n+ */\n+enum rte_max_simd {\n+\tRTE_SIMD_DISABLED = 64,\n+\t/**< Limits path selection to scalar, disables all vector paths. */\n+\tRTE_SIMD_128 = 128,\n+\t/**< Limits path selection to SSE/NEON/Altivec or below. */\n+\tRTE_SIMD_256 = 256, /**< Limits path selection to AVX2 or below. */\n+\tRTE_SIMD_512 = 512, /**< Limits path selection to AVX512 or below. */\n+\tRTE_SIMD_MAX = INT16_MAX + 1,\n+\t/**<\n+\t * Disables limiting by max SIMD bitwidth, allows all suitable paths.\n+\t * This value is used as it is a large number and a power of 2.\n+\t */\n+};\n+\n /**\n * Get the process type in a multi-process setup\n *\n@@ -51,6 +68,29 @@ enum rte_proc_type_t {\n */\n enum rte_proc_type_t rte_eal_process_type(void);\n \n+/**\n+ * Get the supported SIMD bitwidth.\n+ *\n+ * @return\n+ * uint16_t bitwidth.\n+ */\n+__rte_experimental\n+uint16_t rte_get_max_simd_bitwidth(void);\n+\n+/**\n+ * Set the supported SIMD bitwidth.\n+ * This API should only be called once at initialization, before EAL init.\n+ *\n+ * @param bitwidth\n+ * uint16_t bitwidth.\n+ * @return\n+ * - 0 on success.\n+ * - -EINVAL on invalid bitwidth parameter.\n+ * - -EPERM if bitwidth is forced.\n+ */\n+__rte_experimental\n+int rte_set_max_simd_bitwidth(uint16_t bitwidth);\n+\n /**\n * Request iopl privilege for all RPL.\n *\ndiff --git a/lib/librte_eal/ppc/include/rte_vect.h b/lib/librte_eal/ppc/include/rte_vect.h\nindex b0545c878c..a69aabc568 100644\n--- a/lib/librte_eal/ppc/include/rte_vect.h\n+++ b/lib/librte_eal/ppc/include/rte_vect.h\n@@ -15,6 +15,8 @@\n extern \"C\" {\n #endif\n \n+#define RTE_DEFAULT_SIMD_BITWIDTH RTE_SIMD_256\n+\n typedef vector signed int xmm_t;\n \n #define\tXMM_SIZE\t(sizeof(xmm_t))\ndiff --git a/lib/librte_eal/rte_eal_exports.def b/lib/librte_eal/rte_eal_exports.def\nindex 975acb8ffe..b61e9a0f6e 100644\n--- a/lib/librte_eal/rte_eal_exports.def\n+++ b/lib/librte_eal/rte_eal_exports.def\n@@ -59,6 +59,7 @@ EXPORTS\n \trte_exit\n \trte_free\n \trte_get_master_lcore\n+\trte_get_max_simd_bitwidth\n \trte_get_next_lcore\n \trte_get_tsc_hz\n \trte_hexdump\n@@ -147,6 +148,7 @@ EXPORTS\n \trte_service_set_stats_enable\n \trte_service_start_with_defaults\n \trte_set_application_usage_hook\n+\trte_set_max_simd_bitwidth\n \trte_socket_count\n \trte_socket_id\n \trte_socket_id_by_idx\ndiff --git a/lib/librte_eal/rte_eal_version.map b/lib/librte_eal/rte_eal_version.map\nindex f56de02d8f..80f6911322 100644\n--- a/lib/librte_eal/rte_eal_version.map\n+++ b/lib/librte_eal/rte_eal_version.map\n@@ -398,7 +398,9 @@ EXPERIMENTAL {\n \n \t# added in 20.11\n \t__rte_eal_trace_generic_size_t;\n+\trte_get_max_simd_bitwidth;\n \trte_service_lcore_may_be_active;\n+\trte_set_max_simd_bitwidth;\n };\n \n INTERNAL {\ndiff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h\nindex 64383c3606..f0aad9615e 100644\n--- a/lib/librte_eal/x86/include/rte_vect.h\n+++ b/lib/librte_eal/x86/include/rte_vect.h\n@@ -36,6 +36,8 @@\n extern \"C\" {\n #endif\n \n+#define RTE_DEFAULT_SIMD_BITWIDTH RTE_SIMD_256\n+\n typedef __m128i xmm_t;\n \n #define\tXMM_SIZE\t(sizeof(xmm_t))\n", "prefixes": [ "v9", "01/18" ] }