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GET /api/patches/81042/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 81042,
    "url": "http://patches.dpdk.org/api/patches/81042/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201016081320.186775-3-ciara.power@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201016081320.186775-3-ciara.power@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201016081320.186775-3-ciara.power@intel.com",
    "date": "2020-10-16T08:13:04",
    "name": "[v8,02/18] doc: add detail on using max SIMD bitwidth",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "3b3bcfcb8cfd8c31ae66024b5062d19fd2c72b19",
    "submitter": {
        "id": 978,
        "url": "http://patches.dpdk.org/api/people/978/?format=api",
        "name": "Power, Ciara",
        "email": "ciara.power@intel.com"
    },
    "delegate": {
        "id": 24651,
        "url": "http://patches.dpdk.org/api/users/24651/?format=api",
        "username": "dmarchand",
        "first_name": "David",
        "last_name": "Marchand",
        "email": "david.marchand@redhat.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201016081320.186775-3-ciara.power@intel.com/mbox/",
    "series": [
        {
            "id": 13046,
            "url": "http://patches.dpdk.org/api/series/13046/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13046",
            "date": "2020-10-16T08:13:02",
            "name": "add max SIMD bitwidth to EAL",
            "version": 8,
            "mbox": "http://patches.dpdk.org/series/13046/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/81042/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/81042/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 47890A04DB;\n\tFri, 16 Oct 2020 10:14:09 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B1DFB1EB15;\n\tFri, 16 Oct 2020 10:13:34 +0200 (CEST)",
            "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by dpdk.org (Postfix) with ESMTP id 81FF21EAF9\n for <dev@dpdk.org>; Fri, 16 Oct 2020 10:13:31 +0200 (CEST)",
            "from fmsmga006.fm.intel.com ([10.253.24.20])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 16 Oct 2020 01:13:31 -0700",
            "from silpixa00400355.ir.intel.com (HELO\n silpixa00400355.ger.corp.intel.com) ([10.237.222.239])\n by fmsmga006.fm.intel.com with ESMTP; 16 Oct 2020 01:13:28 -0700"
        ],
        "IronPort-SDR": [
            "\n lbfMcCmOGM2ElItOErKL0MRU4e+fOtubCHGsg7d/m/85TbA4XGp8x/Ker8uouoR7oCfgLWOinh\n 6jz4vBjBoZpw==",
            "\n WzqeIj0C02nHEl/IwfZAym9LX5VGuDbFyIfCZbWUbTFfoLZ2WTNbwub45MiRRalOyg+xaM1GtV\n 1WNDCp+pWG6A=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9775\"; a=\"163937615\"",
            "E=Sophos;i=\"5.77,382,1596524400\"; d=\"scan'208\";a=\"163937615\"",
            "E=Sophos;i=\"5.77,382,1596524400\"; d=\"scan'208\";a=\"521096845\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Ciara Power <ciara.power@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "viktorin@rehivetech.com, ruifeng.wang@arm.com, jerinj@marvell.com,\n drc@linux.vnet.ibm.com, bruce.richardson@intel.com,\n konstantin.ananyev@intel.com, david.marchand@redhat.com,\n Ciara Power <ciara.power@intel.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n John McNamara <john.mcnamara@intel.com>,\n Marko Kovacevic <marko.kovacevic@intel.com>,\n Kevin Laatz <kevin.laatz@intel.com>",
        "Date": "Fri, 16 Oct 2020 09:13:04 +0100",
        "Message-Id": "<20201016081320.186775-3-ciara.power@intel.com>",
        "X-Mailer": "git-send-email 2.22.0",
        "In-Reply-To": "<20201016081320.186775-1-ciara.power@intel.com>",
        "References": "<20200807155859.63888-1-ciara.power@intel.com>\n <20201016081320.186775-1-ciara.power@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v8 02/18] doc: add detail on using max SIMD\n\tbitwidth",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "This patch adds documentation on the usage of the max SIMD bitwidth EAL\nsetting, and how to use it to enable AVX-512 at runtime.\n\nCc: Anatoly Burakov <anatoly.burakov@intel.com>\nCc: John McNamara <john.mcnamara@intel.com>\nCc: Marko Kovacevic <marko.kovacevic@intel.com>\n\nSigned-off-by: Ciara Power <ciara.power@intel.com>\nAcked-by: Kevin Laatz <kevin.laatz@intel.com>\n\n---\nv6: Updated enum value.\nv4: Updated docs to reflect renamed enum.\nv3:\n  - Added enum value for disabling use of max SIMD to doc.\n  - Added entry to HowTo index.\n---\n doc/guides/howto/avx512.rst                   | 36 +++++++++++++++++++\n doc/guides/howto/index.rst                    |  1 +\n doc/guides/linux_gsg/eal_args.include.rst     | 16 +++++++++\n .../prog_guide/env_abstraction_layer.rst      | 32 +++++++++++++++++\n 4 files changed, 85 insertions(+)\n create mode 100644 doc/guides/howto/avx512.rst",
    "diff": "diff --git a/doc/guides/howto/avx512.rst b/doc/guides/howto/avx512.rst\nnew file mode 100644\nindex 0000000000..6eb3755775\n--- /dev/null\n+++ b/doc/guides/howto/avx512.rst\n@@ -0,0 +1,36 @@\n+..  SPDX-License-Identifier: BSD-3-Clause\n+    Copyright(c) 2020 Intel Corporation.\n+\n+\n+Using AVX-512 with DPDK\n+=======================\n+\n+AVX-512 is not used by default in DPDK, but it can be selected at runtime by apps through the use of EAL API,\n+and by the user with a commandline argument. DPDK has a setting for max SIMD bitwidth,\n+which can be modified and will then limit the vector path taken by the code.\n+\n+\n+Using the API in apps\n+---------------------\n+\n+Apps can request DPDK uses AVX-512 at runtime, if it provides improved application performance.\n+This can be done by modifying the EAL setting for max SIMD bitwidth to 512, as by default it is 256,\n+which does not allow for AVX-512.\n+\n+.. code-block:: c\n+\n+   rte_set_max_simd_bitwidth(RTE_SIMD_512);\n+\n+This API should only be called once at initialization, before EAL init.\n+For more information on the possible enum values to use as a parameter, go to :ref:`max_simd_bitwidth`:\n+\n+\n+Using the command-line argument\n+---------------------------------------------\n+\n+The user can select to use AVX-512 at runtime, using the following argument to set the max bitwidth::\n+\n+   ./app/dpdk-testpmd --force-max-simd-bitwidth=512\n+\n+This will override any further changes to the max SIMD bitwidth in DPDK,\n+which is useful for testing purposes.\ndiff --git a/doc/guides/howto/index.rst b/doc/guides/howto/index.rst\nindex 5a97ea508c..c2a2c60ddb 100644\n--- a/doc/guides/howto/index.rst\n+++ b/doc/guides/howto/index.rst\n@@ -20,3 +20,4 @@ HowTo Guides\n     telemetry\n     debug_troubleshoot\n     openwrt\n+    avx512\ndiff --git a/doc/guides/linux_gsg/eal_args.include.rst b/doc/guides/linux_gsg/eal_args.include.rst\nindex 0fe4457968..a0bfbd1a98 100644\n--- a/doc/guides/linux_gsg/eal_args.include.rst\n+++ b/doc/guides/linux_gsg/eal_args.include.rst\n@@ -210,3 +210,19 @@ Other options\n *    ``--no-telemetry``:\n \n     Disable telemetry.\n+\n+*    ``--force-max-simd-bitwidth=<val>``:\n+\n+    Specify the maximum SIMD bitwidth size to handle. This limits which vector paths,\n+    if any, are taken, as any paths taken must use a bitwidth below the max bitwidth limit.\n+    For example, to allow all SIMD bitwidths up to and including AVX-512::\n+\n+        --force-max-simd-bitwidth=512\n+\n+    The following example shows limiting the bitwidth to 64-bits to disable all vector code::\n+\n+        --force-max-simd-bitwidth=64\n+\n+    To disable use of max SIMD bitwidth limit::\n+\n+        --force-max-simd-bitwidth=0\ndiff --git a/doc/guides/prog_guide/env_abstraction_layer.rst b/doc/guides/prog_guide/env_abstraction_layer.rst\nindex 936c885081..90e43d2c1f 100644\n--- a/doc/guides/prog_guide/env_abstraction_layer.rst\n+++ b/doc/guides/prog_guide/env_abstraction_layer.rst\n@@ -486,6 +486,38 @@ the desired addressing mode when virtual devices that are not directly attached\n To facilitate forcing the IOVA mode to a specific value the EAL command line option ``--iova-mode`` can\n be used to select either physical addressing('pa') or virtual addressing('va').\n \n+.. _max_simd_bitwidth:\n+\n+\n+Max SIMD bitwidth\n+~~~~~~~~~~~~~~~~~\n+\n+The EAL provides a single setting to limit the max SIMD bitwidth used by DPDK,\n+which is used in determining the vector path, if any, chosen by a component.\n+The value can be set at runtime by an application using the 'rte_set_max_simd_bitwidth(uint16_t bitwidth)' function,\n+which should only be called once at initialization, before EAL init.\n+The value can be overridden by the user using the EAL command-line option '--force-max-simd-bitwidth'.\n+\n+When choosing a vector path, along with checking the CPU feature support,\n+the value of the max SIMD bitwidth must also be checked, and can be retrieved using the 'rte_get_max_simd_bitwidth()' function.\n+The value should be compared against the enum values for accepted max SIMD bitwidths:\n+\n+.. code-block:: c\n+\n+   enum rte_max_simd {\n+       RTE_SIMD_DISABLED = 64,\n+       RTE_SIMD_128 = 128,\n+       RTE_SIMD_256 = 256,\n+       RTE_SIMD_512 = 512,\n+       RTE_SIMD_MAX = INT16_MAX + 1,\n+   };\n+\n+    if (rte_get_max_simd_bitwidth() >= RTE_SIMD_512)\n+        /* Take AVX-512 vector path */\n+    else if (rte_get_max_simd_bitwidth() >= RTE_SIMD_256)\n+        /* Take AVX2 vector path */\n+\n+\n Memory Segments and Memory Zones (memzone)\n ------------------------------------------\n \n",
    "prefixes": [
        "v8",
        "02/18"
    ]
}