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GET /api/patches/81027/?format=api
{ "id": 81027, "url": "http://patches.dpdk.org/api/patches/81027/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201016050710.20281-1-murphyx.yang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201016050710.20281-1-murphyx.yang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201016050710.20281-1-murphyx.yang@intel.com", "date": "2020-10-16T05:07:10", "name": "[1/1] net/ice: fix outher chksum on cvl unknown", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cd0251a4c82d54a298a3d5c252ed679f4db8b7be", "submitter": { "id": 1986, "url": "http://patches.dpdk.org/api/people/1986/?format=api", "name": "Murphy Yang", "email": "murphyx.yang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201016050710.20281-1-murphyx.yang@intel.com/mbox/", "series": [ { "id": 13040, "url": "http://patches.dpdk.org/api/series/13040/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13040", "date": "2020-10-16T05:07:10", "name": "[1/1] net/ice: fix outher chksum on cvl unknown", "version": 1, "mbox": "http://patches.dpdk.org/series/13040/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81027/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/81027/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 565B0A04DB;\n\tFri, 16 Oct 2020 07:08:14 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C5F3B1E9BE;\n\tFri, 16 Oct 2020 07:08:12 +0200 (CEST)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n by dpdk.org (Postfix) with ESMTP id A237C1E974\n for <dev@dpdk.org>; Fri, 16 Oct 2020 07:08:11 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 15 Oct 2020 22:08:09 -0700", "from unknown (HELO intel-npg-odc-srv02.cd.intel.com)\n ([10.240.178.186])\n by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 15 Oct 2020 22:08:06 -0700" ], "IronPort-SDR": [ "\n lp2cMs2ds1twYHodYZJHHpCwVWpuRGMJNY3sdtqrg2MPZw5e+/qlTwagFxoVgAklHr1sZMFstQ\n 448RJ1y0W9gQ==", "\n UtV1sgWq4HuG9GZq9l0AohhAxeW7PftDmzmFzLSrR+sK0M+s4tddcBng9orAInbUOlni+H3jm+\n fraOSkOelAAg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9775\"; a=\"166584292\"", "E=Sophos;i=\"5.77,381,1596524400\"; d=\"scan'208\";a=\"166584292\"", "E=Sophos;i=\"5.77,381,1596524400\"; d=\"scan'208\";a=\"300490531\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "From": "murphy yang <murphyx.yang@intel.com>", "To": "dev@dpdk.org", "Cc": "qiming.yang@intel.com, qi.z.zhang@intel.com,\n murphy <murphyx.yang@intel.com>", "Date": "Fri, 16 Oct 2020 05:07:10 +0000", "Message-Id": "<20201016050710.20281-1-murphyx.yang@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20201014083453.36410-1-murphyx.yang@intel.com>", "References": "<20201014083453.36410-1-murphyx.yang@intel.com>", "Subject": "[dpdk-dev] [PATCH 1/1] net/ice: fix outher chksum on cvl unknown", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: murphy <murphyx.yang@intel.com>\n\nWhen set 'csum set outer-udp hw 0' ,support for\nICE_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S,mark the packet\nPKT_RX_OUTER_L4_CKSUM_BAD or PKT_RX_OUTER_L4_CKSUM_GOOD.\n\nFixes: dbf3c0e77a22 (\"net/ice: handle Rx flex descriptor\")\nFixes: 4ab7dbb0a0f6 (\"net/ice: switch to Rx flexible descriptor in AVX path\")\nFixes: ece1f8a8f1c8 (\"net/ice: switch to flexible descriptor in SSE path\")\n\nSigned-off-by: murphy <murphyx.yang@intel.com>\n\nv2:\n- cover vector path\n\n---\n drivers/net/ice/ice_rxtx.c | 5 ++\n drivers/net/ice/ice_rxtx_vec_avx2.c | 110 ++++++++++++++++++++--------\n drivers/net/ice/ice_rxtx_vec_sse.c | 71 ++++++++++++------\n 3 files changed, 133 insertions(+), 53 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex 93a0ac691..e74741732 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -1424,6 +1424,11 @@ ice_rxd_error_to_pkt_flags(uint16_t stat_err0)\n \tif (unlikely(stat_err0 & (1 << ICE_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S)))\n \t\tflags |= PKT_RX_EIP_CKSUM_BAD;\n \n+\tif (unlikely(stat_err0 & (1 << ICE_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S)))\n+\t\tflags |= PKT_RX_OUTER_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= PKT_RX_OUTER_L4_CKSUM_GOOD;\n+\n \treturn flags;\n }\n \ndiff --git a/drivers/net/ice/ice_rxtx_vec_avx2.c b/drivers/net/ice/ice_rxtx_vec_avx2.c\nindex 5969a3048..771734cf3 100644\n--- a/drivers/net/ice/ice_rxtx_vec_avx2.c\n+++ b/drivers/net/ice/ice_rxtx_vec_avx2.c\n@@ -251,43 +251,79 @@ _ice_recv_raw_pkts_vec_avx2(struct ice_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t * bit13 is for VLAN indication.\n \t */\n \tconst __m256i flags_mask =\n-\t\t _mm256_set1_epi32((7 << 4) | (1 << 12) | (1 << 13));\n+\t\t _mm256_set1_epi32((0xF << 4) | (1 << 12) | (1 << 13));\n \t/**\n \t * data to be shuffled by the result of the flags mask shifted by 4\n \t * bits. This gives use the l3_l4 flags.\n \t */\n-\tconst __m256i l3_l4_flags_shuf = _mm256_set_epi8(0, 0, 0, 0, 0, 0, 0, 0,\n-\t\t\t/* shift right 1 bit to make sure it not exceed 255 */\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n-\t\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n-\t\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n-\t\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n-\t\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n-\t\t\t/* second 128-bits */\n-\t\t\t0, 0, 0, 0, 0, 0, 0, 0,\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n-\t\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n-\t\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n-\t\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n-\t\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_GOOD) >> 1);\n+\tconst __m256i l3_l4_flags_shuf =\n+\t\t_mm256_set_epi8((PKT_RX_OUTER_L4_CKSUM_BAD >> 20 |\n+\t\t PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_EIP_CKSUM_BAD |\n+\t\t PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_EIP_CKSUM_BAD |\n+\t\t PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_EIP_CKSUM_BAD |\n+\t\t PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t/* shift right 1 bit to make sure it not exceed 255 */\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t/* second 128-bits */\n+\t\t/** shift right 20 bits to make sure it not exceed 255 and\n+\t\t * use the low two bits to indicate outer checksum status\n+\t\t */\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_EIP_CKSUM_BAD |\n+\t\t PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_EIP_CKSUM_BAD |\n+\t\t PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_EIP_CKSUM_BAD |\n+\t\t PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_EIP_CKSUM_BAD |\n+\t\t PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_GOOD) >> 1);\n \tconst __m256i cksum_mask =\n-\t\t _mm256_set1_epi32(PKT_RX_IP_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD |\n-\t\t\t\t PKT_RX_L4_CKSUM_GOOD | PKT_RX_L4_CKSUM_BAD |\n-\t\t\t\t PKT_RX_EIP_CKSUM_BAD);\n+\t\t _mm256_set1_epi32(PKT_RX_IP_CKSUM_MASK |\n+\t\t\t\t PKT_RX_L4_CKSUM_MASK |\n+\t\t\t\t PKT_RX_EIP_CKSUM_BAD |\n+\t\t\t\t PKT_RX_OUTER_L4_CKSUM_MASK);\n \t/**\n \t * data to be shuffled by result of flag mask, shifted down 12.\n \t * If RSS(bit12)/VLAN(bit13) are set,\n@@ -469,6 +505,16 @@ _ice_recv_raw_pkts_vec_avx2(struct ice_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\t__m256i l3_l4_flags = _mm256_shuffle_epi8(l3_l4_flags_shuf,\n \t\t\t\t_mm256_srli_epi32(flag_bits, 4));\n \t\tl3_l4_flags = _mm256_slli_epi32(l3_l4_flags, 1);\n+\n+\t\t__m256i l3_l4_outer_mask = _mm256_set1_epi32(0x3);\n+\t\t__m256i l3_l4_outer_flags =\n+\t\t\t\t_mm256_and_si256(l3_l4_flags, l3_l4_outer_mask);\n+\t\tl3_l4_outer_flags = _mm256_slli_epi32(l3_l4_outer_flags, 20);\n+\n+\t\t__m256i l3_l4_mask = _mm256_set1_epi32(~0x3);\n+\t\tl3_l4_flags = _mm256_and_si256(l3_l4_flags, l3_l4_mask);\n+\t\tl3_l4_flags = _mm256_or_si256(l3_l4_flags, l3_l4_outer_flags);\n+\n \t\tl3_l4_flags = _mm256_and_si256(l3_l4_flags, cksum_mask);\n \t\t/* set rss and vlan flags */\n \t\tconst __m256i rss_vlan_flag_bits =\ndiff --git a/drivers/net/ice/ice_rxtx_vec_sse.c b/drivers/net/ice/ice_rxtx_vec_sse.c\nindex c4c9a9126..12eaab83e 100644\n--- a/drivers/net/ice/ice_rxtx_vec_sse.c\n+++ b/drivers/net/ice/ice_rxtx_vec_sse.c\n@@ -114,39 +114,59 @@ ice_rx_desc_to_olflags_v(struct ice_rx_queue *rxq, __m128i descs[4],\n \t * bit12 for RSS indication.\n \t * bit13 for VLAN indication.\n \t */\n-\tconst __m128i desc_mask = _mm_set_epi32(0x3070, 0x3070,\n-\t\t\t\t\t\t0x3070, 0x3070);\n-\n+\tconst __m128i desc_mask = _mm_set_epi32(0x30f0, 0x30f0,\n+\t\t\t\t\t\t0x30f0, 0x30f0);\n \tconst __m128i cksum_mask = _mm_set_epi32(PKT_RX_IP_CKSUM_MASK |\n \t\t\t\t\t\t PKT_RX_L4_CKSUM_MASK |\n+\t\t\t\t\t\t PKT_RX_OUTER_L4_CKSUM_MASK |\n \t\t\t\t\t\t PKT_RX_EIP_CKSUM_BAD,\n \t\t\t\t\t\t PKT_RX_IP_CKSUM_MASK |\n \t\t\t\t\t\t PKT_RX_L4_CKSUM_MASK |\n+\t\t\t\t\t\t PKT_RX_OUTER_L4_CKSUM_MASK |\n \t\t\t\t\t\t PKT_RX_EIP_CKSUM_BAD,\n \t\t\t\t\t\t PKT_RX_IP_CKSUM_MASK |\n \t\t\t\t\t\t PKT_RX_L4_CKSUM_MASK |\n+\t\t\t\t\t\t PKT_RX_OUTER_L4_CKSUM_MASK |\n \t\t\t\t\t\t PKT_RX_EIP_CKSUM_BAD,\n \t\t\t\t\t\t PKT_RX_IP_CKSUM_MASK |\n \t\t\t\t\t\t PKT_RX_L4_CKSUM_MASK |\n+\t\t\t\t\t\t PKT_RX_OUTER_L4_CKSUM_MASK |\n \t\t\t\t\t\t PKT_RX_EIP_CKSUM_BAD);\n \n \t/* map the checksum, rss and vlan fields to the checksum, rss\n \t * and vlan flag\n \t */\n-\tconst __m128i cksum_flags = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0,\n-\t\t\t/* shift right 1 bit to make sure it not exceed 255 */\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n-\t\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n-\t\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n-\t\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n-\t\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD) >> 1,\n-\t\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_GOOD) >> 1);\n+\tconst __m128i cksum_flags =\n+\t\t_mm_set_epi8((PKT_RX_OUTER_L4_CKSUM_BAD >> 20 |\n+\t\t PKT_RX_EIP_CKSUM_BAD |\n+\t\t PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_EIP_CKSUM_BAD |\n+\t\t PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_EIP_CKSUM_BAD |\n+\t\t PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_EIP_CKSUM_BAD |\n+\t\t PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_OUTER_L4_CKSUM_BAD >> 20 | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t/* shift right 1 bit to make sure it not exceed 255 */\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |\n+\t\t PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_GOOD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD) >> 1,\n+\t\t(PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_GOOD) >> 1);\n \n \tconst __m128i rss_vlan_flags = _mm_set_epi8(0, 0, 0, 0,\n \t\t\t0, 0, 0, 0,\n@@ -166,6 +186,15 @@ ice_rx_desc_to_olflags_v(struct ice_rx_queue *rxq, __m128i descs[4],\n \tflags = _mm_shuffle_epi8(cksum_flags, tmp_desc);\n \t/* then we shift left 1 bit */\n \tflags = _mm_slli_epi32(flags, 1);\n+\n+\t__m128i l3_l4_outer_mask = _mm_set_epi32(0x3, 0x3, 0x3, 0x3);\n+\t__m128i l3_l4_outer_flags = _mm_and_si128(flags, l3_l4_outer_mask);\n+\tl3_l4_outer_flags = _mm_slli_epi32(l3_l4_outer_flags, 20);\n+\n+\t__m128i l3_l4_mask = _mm_set_epi32(~0x3, ~0x3, ~0x3, ~0x3);\n+\tflags = _mm_and_si128(flags, l3_l4_mask);\n+\tflags = _mm_or_si128(flags, l3_l4_outer_flags);\n+\n \t/* we need to mask out the reduntant bits introduced by RSS or\n \t * VLAN fields.\n \t */\n@@ -217,10 +246,10 @@ ice_rx_desc_to_olflags_v(struct ice_rx_queue *rxq, __m128i descs[4],\n \t * appropriate flags means that we have to do a shift and blend for\n \t * each mbuf before we do the write.\n \t */\n-\trearm0 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(flags, 8), 0x10);\n-\trearm1 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(flags, 4), 0x10);\n-\trearm2 = _mm_blend_epi16(mbuf_init, flags, 0x10);\n-\trearm3 = _mm_blend_epi16(mbuf_init, _mm_srli_si128(flags, 4), 0x10);\n+\trearm0 = _mm_blend_epi32(mbuf_init, _mm_slli_si128(flags, 8), 0x04);\n+\trearm1 = _mm_blend_epi32(mbuf_init, _mm_slli_si128(flags, 4), 0x04);\n+\trearm2 = _mm_blend_epi32(mbuf_init, flags, 0x04);\n+\trearm3 = _mm_blend_epi32(mbuf_init, _mm_srli_si128(flags, 4), 0x04);\n \n \t/* write the rearm data and the olflags in one write */\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) !=\n", "prefixes": [ "1/1" ] }