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GET /api/patches/80836/?format=api
{ "id": 80836, "url": "http://patches.dpdk.org/api/patches/80836/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1602743893-345348-4-git-send-email-matan@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1602743893-345348-4-git-send-email-matan@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1602743893-345348-4-git-send-email-matan@nvidia.com", "date": "2020-10-15T06:38:13", "name": "[4/4] net/mlx5/linux: fix Tx queue operations decision", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ef512ee4f82eeffbe1f32021335ec79998e33b8e", "submitter": { "id": 1911, "url": "http://patches.dpdk.org/api/people/1911/?format=api", "name": "Matan Azrad", "email": "matan@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1602743893-345348-4-git-send-email-matan@nvidia.com/mbox/", "series": [ { "id": 12988, "url": "http://patches.dpdk.org/api/series/12988/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12988", "date": "2020-10-15T06:38:10", "name": "[1/4] net/mlx5: fix Rx queue release", "version": 1, "mbox": "http://patches.dpdk.org/series/12988/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/80836/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/80836/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AA773A04DB;\n\tThu, 15 Oct 2020 08:39:11 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 571D41DCAA;\n\tThu, 15 Oct 2020 08:38:35 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 3781C1DC88\n for <dev@dpdk.org>; Thu, 15 Oct 2020 08:38:30 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n matan@nvidia.com) with SMTP; 15 Oct 2020 09:38:23 +0300", "from nvidia.com (pegasus25.mtr.labs.mlnx [10.210.16.10])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 09F6cNVv014993;\n Thu, 15 Oct 2020 09:38:23 +0300" ], "From": "Matan Azrad <matan@nvidia.com>", "To": "dev@dpdk.org", "Cc": "Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "Date": "Thu, 15 Oct 2020 06:38:13 +0000", "Message-Id": "<1602743893-345348-4-git-send-email-matan@nvidia.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1602743893-345348-1-git-send-email-matan@nvidia.com>", "References": "<1602743893-345348-1-git-send-email-matan@nvidia.com>", "Subject": "[dpdk-dev] [PATCH 4/4] net/mlx5/linux: fix Tx queue operations\n\tdecision", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "One of the conditions to create Tx queue object by DevX is to be sure\nthat the DPDK mlx5 driver is not going to be the E-Switch manager of\nthe device. The issue is with the default FDB flows managed by the\nkernel driver, which are not created by the kernel when the Tx queues\nare created by DevX.\n\nThe current decision is to create the Tx queues by Verbs when E-Switch\nis enabled while the current behavior uses an opposite condition to\ncreate them by DevX.\n\nCreate the Tx queues by Verbs when E-Switch is enabled.\n\nFixes: 86d259cec852 (\"net/mlx5: separate Tx queue object creations\")\n\nSigned-off-by: Matan Azrad <matan@nvidia.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n drivers/net/mlx5/linux/mlx5_os.c | 53 +++++++++++++---------------------------\n 1 file changed, 17 insertions(+), 36 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex 09d0944..d177b4f 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -526,26 +526,16 @@\n mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n \tstruct mlx5_txq_data *txq_data = (*priv->txqs)[idx];\n \tstruct mlx5_txq_ctrl *txq_ctrl =\n \t\t\tcontainer_of(txq_data, struct mlx5_txq_ctrl, txq);\n \n-\t/*\n-\t * When DevX is supported and DV flow is enable, and dest tir is enable,\n-\t * hairpin functions use DevX API.\n-\t * When, in addition, DV E-Switch is enable and DevX uar offset is\n-\t * supported, all Tx functions also use DevX API.\n-\t * Otherwise, all Tx functions use Verbs API.\n-\t */\n-\tif (config->devx && config->dv_flow_en && config->dest_tir) {\n-\t\tif (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)\n-\t\t\treturn mlx5_txq_devx_obj_new(dev, idx);\n+\tif (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)\n+\t\treturn mlx5_txq_devx_obj_new(dev, idx);\n #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET\n-\t\tif (config->dv_esw_en)\n-\t\t\treturn mlx5_txq_devx_obj_new(dev, idx);\n+\tif (!priv->config.dv_esw_en)\n+\t\treturn mlx5_txq_devx_obj_new(dev, idx);\n #endif\n-\t}\n \treturn mlx5_txq_ibv_obj_new(dev, idx);\n }\n \n@@ -558,20 +548,16 @@\n static void\n mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)\n {\n-\tstruct mlx5_dev_config *config = &txq_obj->txq_ctrl->priv->config;\n-\n-\tif (config->devx && config->dv_flow_en && config->dest_tir) {\n+\tif (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {\n+\t\tmlx5_txq_devx_obj_release(txq_obj);\n+\t\treturn;\n+\t}\n #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET\n-\t\tif (config->dv_esw_en) {\n-\t\t\tmlx5_txq_devx_obj_release(txq_obj);\n-\t\t\treturn;\n-\t\t}\n-#endif\n-\t\tif (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {\n-\t\t\tmlx5_txq_devx_obj_release(txq_obj);\n-\t\t\treturn;\n-\t\t}\n+\tif (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {\n+\t\tmlx5_txq_devx_obj_release(txq_obj);\n+\t\treturn;\n \t}\n+#endif\n \tmlx5_txq_ibv_obj_release(txq_obj);\n }\n \n@@ -1377,12 +1363,6 @@\n \t\t\tgoto error;\n \t\t}\n \t}\n-\t/*\n-\t * Initialize the dev_ops structure with DevX/Verbs function pointers.\n-\t * When DevX is supported and both DV flow and dest tir are enabled, all\n-\t * Rx functions use DevX API (except for drop that has not yet been\n-\t * implemented in DevX).\n-\t */\n \tif (config->devx && config->dv_flow_en && config->dest_tir) {\n \t\tpriv->obj_ops = devx_obj_ops;\n \t\tpriv->obj_ops.drop_action_create =\n@@ -1392,16 +1372,17 @@\n #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET\n \t\tpriv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;\n #else\n-\t\tif (!config->dv_esw_en)\n+\t\tif (config->dv_esw_en)\n \t\t\tpriv->obj_ops.txq_obj_modify =\n \t\t\t\t\t\tibv_obj_ops.txq_obj_modify;\n #endif\n+\t\t/* Use specific wrappers for Tx object. */\n+\t\tpriv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;\n+\t\tpriv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;\n+\n \t} else {\n \t\tpriv->obj_ops = ibv_obj_ops;\n \t}\n-\t/* The Tx objects are managed by a specific linux wrapper functions. */\n-\tpriv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;\n-\tpriv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;\n \t/* Supported Verbs flow priority number detection. */\n \terr = mlx5_flow_discover_priorities(eth_dev);\n \tif (err < 0) {\n", "prefixes": [ "4/4" ] }