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GET /api/patches/80805/?format=api
{ "id": 80805, "url": "http://patches.dpdk.org/api/patches/80805/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1602711375-10685-3-git-send-email-timothy.mcdaniel@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1602711375-10685-3-git-send-email-timothy.mcdaniel@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1602711375-10685-3-git-send-email-timothy.mcdaniel@intel.com", "date": "2020-10-14T21:36:15", "name": "[2/2] eventdev: update app and examples for new eventdev ABI", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d07c6e78819d1c170b74be7781a1458d34eb0fe2", "submitter": { "id": 826, "url": "http://patches.dpdk.org/api/people/826/?format=api", "name": "Timothy McDaniel", "email": "timothy.mcdaniel@intel.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1602711375-10685-3-git-send-email-timothy.mcdaniel@intel.com/mbox/", "series": [ { "id": 12976, "url": "http://patches.dpdk.org/api/series/12976/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12976", "date": "2020-10-14T21:36:13", "name": "Eventdev ABI changes for DLB/DLB2", "version": 1, "mbox": "http://patches.dpdk.org/series/12976/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/80805/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/80805/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AACE2A04DB;\n\tWed, 14 Oct 2020 23:34:40 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 069751DB08;\n\tWed, 14 Oct 2020 23:34:24 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 17A4B1BED2\n for <dev@dpdk.org>; Wed, 14 Oct 2020 23:34:20 +0200 (CEST)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Oct 2020 14:34:17 -0700", "from txasoft-yocto.an.intel.com ([10.123.72.192])\n by fmsmga005.fm.intel.com with ESMTP; 14 Oct 2020 14:34:15 -0700" ], "IronPort-SDR": [ "\n fPrlxMBt7wfWDON1B5zXsN1s1hYo7y/I5M8+rp0Bk1+/3CcbCkl4q1xgmphP0M0RpoJCKBxYFP\n F1eyZgmpT1+Q==", "\n pg4FbnOtX5bYptE/KIaC2rO7Xxkr6cUGGU8J3gJ7an39g2C8w48XfflxTPBM1WXebsG+YY0SzU\n A4PWJavesb9g==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9774\"; a=\"154029112\"", "E=Sophos;i=\"5.77,376,1596524400\"; d=\"scan'208\";a=\"154029112\"", "E=Sophos;i=\"5.77,376,1596524400\"; d=\"scan'208\";a=\"521592052\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Timothy McDaniel <timothy.mcdaniel@intel.com>", "To": "Jerin Jacob <jerinj@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Marko Kovacevic <marko.kovacevic@intel.com>, Ori Kam <orika@mellanox.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Radu Nicolau <radu.nicolau@intel.com>, Akhil Goyal <akhil.goyal@nxp.com>,\n Tomasz Kantecki <tomasz.kantecki@intel.com>,\n Sunil Kumar Kori <skori@marvell.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>", "Cc": "dev@dpdk.org, erik.g.carrillo@intel.com, gage.eads@intel.com,\n hemant.agrawal@nxp.com", "Date": "Wed, 14 Oct 2020 16:36:15 -0500", "Message-Id": "<1602711375-10685-3-git-send-email-timothy.mcdaniel@intel.com>", "X-Mailer": "git-send-email 1.7.10", "In-Reply-To": "<1602711375-10685-1-git-send-email-timothy.mcdaniel@intel.com>", "References": "<1599843507-19970-2-git-send-email-timothy.mcdaniel@intel.com>\n <1602711375-10685-1-git-send-email-timothy.mcdaniel@intel.com>", "Subject": "[dpdk-dev] [PATCH 2/2] eventdev: update app and examples for new\n\teventdev ABI", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Several data structures and constants changed, or were added,\nin the previous patch. This commit updates the dependent\napps and examples to use the new ABI.\n\nSigned-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>\nAcked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\nAcked-by: Harry van Haaren <harry.van.haaren@intel.com>\n---\n app/test-eventdev/evt_common.h | 11 ++++++++\n app/test-eventdev/test_order_atq.c | 28 +++++++++++++++------\n app/test-eventdev/test_order_common.c | 1 +\n app/test-eventdev/test_order_queue.c | 29 ++++++++++++++++------\n app/test/test_eventdev.c | 4 +--\n .../eventdev_pipeline/pipeline_worker_generic.c | 6 +++--\n examples/eventdev_pipeline/pipeline_worker_tx.c | 1 +\n examples/l2fwd-event/l2fwd_event_generic.c | 7 ++++--\n examples/l2fwd-event/l2fwd_event_internal_port.c | 6 +++--\n examples/l3fwd/l3fwd_event_generic.c | 7 ++++--\n examples/l3fwd/l3fwd_event_internal_port.c | 6 +++--\n 11 files changed, 80 insertions(+), 26 deletions(-)", "diff": "diff --git a/app/test-eventdev/evt_common.h b/app/test-eventdev/evt_common.h\nindex f9d7378..a1da1cf 100644\n--- a/app/test-eventdev/evt_common.h\n+++ b/app/test-eventdev/evt_common.h\n@@ -104,6 +104,16 @@ evt_has_all_types_queue(uint8_t dev_id)\n \t\t\ttrue : false;\n }\n \n+static inline bool\n+evt_has_flow_id(uint8_t dev_id)\n+{\n+\tstruct rte_event_dev_info dev_info;\n+\n+\trte_event_dev_info_get(dev_id, &dev_info);\n+\treturn (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_CARRY_FLOW_ID) ?\n+\t\t\ttrue : false;\n+}\n+\n static inline int\n evt_service_setup(uint32_t service_id)\n {\n@@ -169,6 +179,7 @@ evt_configure_eventdev(struct evt_options *opt, uint8_t nb_queues,\n \t\t\t.dequeue_timeout_ns = opt->deq_tmo_nsec,\n \t\t\t.nb_event_queues = nb_queues,\n \t\t\t.nb_event_ports = nb_ports,\n+\t\t\t.nb_single_link_event_port_queues = 0,\n \t\t\t.nb_events_limit = info.max_num_events,\n \t\t\t.nb_event_queue_flows = opt->nb_flows,\n \t\t\t.nb_event_port_dequeue_depth =\ndiff --git a/app/test-eventdev/test_order_atq.c b/app/test-eventdev/test_order_atq.c\nindex 3366cfc..cfcb1dc 100644\n--- a/app/test-eventdev/test_order_atq.c\n+++ b/app/test-eventdev/test_order_atq.c\n@@ -19,7 +19,7 @@ order_atq_process_stage_0(struct rte_event *const ev)\n }\n \n static int\n-order_atq_worker(void *arg)\n+order_atq_worker(void *arg, const bool flow_id_cap)\n {\n \tORDER_WORKER_INIT;\n \tstruct rte_event ev;\n@@ -34,6 +34,9 @@ order_atq_worker(void *arg)\n \t\t\tcontinue;\n \t\t}\n \n+\t\tif (!flow_id_cap)\n+\t\t\tev.flow_id = ev.mbuf->udata64;\n+\n \t\tif (ev.sub_event_type == 0) { /* stage 0 from producer */\n \t\t\torder_atq_process_stage_0(&ev);\n \t\t\twhile (rte_event_enqueue_burst(dev_id, port, &ev, 1)\n@@ -50,7 +53,7 @@ order_atq_worker(void *arg)\n }\n \n static int\n-order_atq_worker_burst(void *arg)\n+order_atq_worker_burst(void *arg, const bool flow_id_cap)\n {\n \tORDER_WORKER_INIT;\n \tstruct rte_event ev[BURST_SIZE];\n@@ -68,6 +71,9 @@ order_atq_worker_burst(void *arg)\n \t\t}\n \n \t\tfor (i = 0; i < nb_rx; i++) {\n+\t\t\tif (!flow_id_cap)\n+\t\t\t\tev[i].flow_id = ev[i].mbuf->udata64;\n+\n \t\t\tif (ev[i].sub_event_type == 0) { /*stage 0 */\n \t\t\t\torder_atq_process_stage_0(&ev[i]);\n \t\t\t} else if (ev[i].sub_event_type == 1) { /* stage 1 */\n@@ -95,11 +101,19 @@ worker_wrapper(void *arg)\n {\n \tstruct worker_data *w = arg;\n \tconst bool burst = evt_has_burst_mode(w->dev_id);\n-\n-\tif (burst)\n-\t\treturn order_atq_worker_burst(arg);\n-\telse\n-\t\treturn order_atq_worker(arg);\n+\tconst bool flow_id_cap = evt_has_flow_id(w->dev_id);\n+\n+\tif (burst) {\n+\t\tif (flow_id_cap)\n+\t\t\treturn order_atq_worker_burst(arg, true);\n+\t\telse\n+\t\t\treturn order_atq_worker_burst(arg, false);\n+\t} else {\n+\t\tif (flow_id_cap)\n+\t\t\treturn order_atq_worker(arg, true);\n+\t\telse\n+\t\t\treturn order_atq_worker(arg, false);\n+\t}\n }\n \n static int\ndiff --git a/app/test-eventdev/test_order_common.c b/app/test-eventdev/test_order_common.c\nindex 4190f9a..7942390 100644\n--- a/app/test-eventdev/test_order_common.c\n+++ b/app/test-eventdev/test_order_common.c\n@@ -49,6 +49,7 @@ order_producer(void *arg)\n \t\tconst uint32_t flow = (uintptr_t)m % nb_flows;\n \t\t/* Maintain seq number per flow */\n \t\tm->seqn = producer_flow_seq[flow]++;\n+\t\tm->udata64 = flow;\n \n \t\tev.flow_id = flow;\n \t\tev.mbuf = m;\ndiff --git a/app/test-eventdev/test_order_queue.c b/app/test-eventdev/test_order_queue.c\nindex 495efd9..1511c00 100644\n--- a/app/test-eventdev/test_order_queue.c\n+++ b/app/test-eventdev/test_order_queue.c\n@@ -19,7 +19,7 @@ order_queue_process_stage_0(struct rte_event *const ev)\n }\n \n static int\n-order_queue_worker(void *arg)\n+order_queue_worker(void *arg, const bool flow_id_cap)\n {\n \tORDER_WORKER_INIT;\n \tstruct rte_event ev;\n@@ -34,6 +34,9 @@ order_queue_worker(void *arg)\n \t\t\tcontinue;\n \t\t}\n \n+\t\tif (!flow_id_cap)\n+\t\t\tev.flow_id = ev.mbuf->udata64;\n+\n \t\tif (ev.queue_id == 0) { /* from ordered queue */\n \t\t\torder_queue_process_stage_0(&ev);\n \t\t\twhile (rte_event_enqueue_burst(dev_id, port, &ev, 1)\n@@ -50,7 +53,7 @@ order_queue_worker(void *arg)\n }\n \n static int\n-order_queue_worker_burst(void *arg)\n+order_queue_worker_burst(void *arg, const bool flow_id_cap)\n {\n \tORDER_WORKER_INIT;\n \tstruct rte_event ev[BURST_SIZE];\n@@ -68,6 +71,10 @@ order_queue_worker_burst(void *arg)\n \t\t}\n \n \t\tfor (i = 0; i < nb_rx; i++) {\n+\n+\t\t\tif (!flow_id_cap)\n+\t\t\t\tev[i].flow_id = ev[i].mbuf->udata64;\n+\n \t\t\tif (ev[i].queue_id == 0) { /* from ordered queue */\n \t\t\t\torder_queue_process_stage_0(&ev[i]);\n \t\t\t} else if (ev[i].queue_id == 1) {/* from atomic queue */\n@@ -95,11 +102,19 @@ worker_wrapper(void *arg)\n {\n \tstruct worker_data *w = arg;\n \tconst bool burst = evt_has_burst_mode(w->dev_id);\n-\n-\tif (burst)\n-\t\treturn order_queue_worker_burst(arg);\n-\telse\n-\t\treturn order_queue_worker(arg);\n+\tconst bool flow_id_cap = evt_has_flow_id(w->dev_id);\n+\n+\tif (burst) {\n+\t\tif (flow_id_cap)\n+\t\t\treturn order_queue_worker_burst(arg, true);\n+\t\telse\n+\t\t\treturn order_queue_worker_burst(arg, false);\n+\t} else {\n+\t\tif (flow_id_cap)\n+\t\t\treturn order_queue_worker(arg, true);\n+\t\telse\n+\t\t\treturn order_queue_worker(arg, false);\n+\t}\n }\n \n static int\ndiff --git a/app/test/test_eventdev.c b/app/test/test_eventdev.c\nindex 43ccb1c..62019c1 100644\n--- a/app/test/test_eventdev.c\n+++ b/app/test/test_eventdev.c\n@@ -559,10 +559,10 @@ test_eventdev_port_setup(void)\n \tif (!(info.event_dev_cap &\n \t RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE)) {\n \t\tpconf.enqueue_depth = info.max_event_port_enqueue_depth;\n-\t\tpconf.disable_implicit_release = 1;\n+\t\tpconf.event_port_cfg = RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL;\n \t\tret = rte_event_port_setup(TEST_DEV_ID, 0, &pconf);\n \t\tTEST_ASSERT(ret == -EINVAL, \"Expected -EINVAL, %d\", ret);\n-\t\tpconf.disable_implicit_release = 0;\n+\t\tpconf.event_port_cfg = 0;\n \t}\n \n \tret = rte_event_port_setup(TEST_DEV_ID, info.max_event_ports,\ndiff --git a/examples/eventdev_pipeline/pipeline_worker_generic.c b/examples/eventdev_pipeline/pipeline_worker_generic.c\nindex 42ff4ee..f70ab0c 100644\n--- a/examples/eventdev_pipeline/pipeline_worker_generic.c\n+++ b/examples/eventdev_pipeline/pipeline_worker_generic.c\n@@ -129,6 +129,7 @@ setup_eventdev_generic(struct worker_data *worker_data)\n \tstruct rte_event_dev_config config = {\n \t\t\t.nb_event_queues = nb_queues,\n \t\t\t.nb_event_ports = nb_ports,\n+\t\t\t.nb_single_link_event_port_queues = 1,\n \t\t\t.nb_events_limit = 4096,\n \t\t\t.nb_event_queue_flows = 1024,\n \t\t\t.nb_event_port_dequeue_depth = 128,\n@@ -143,7 +144,7 @@ setup_eventdev_generic(struct worker_data *worker_data)\n \t\t\t.schedule_type = cdata.queue_type,\n \t\t\t.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,\n \t\t\t.nb_atomic_flows = 1024,\n-\t\t.nb_atomic_order_sequences = 1024,\n+\t\t\t.nb_atomic_order_sequences = 1024,\n \t};\n \tstruct rte_event_queue_conf tx_q_conf = {\n \t\t\t.priority = RTE_EVENT_DEV_PRIORITY_HIGHEST,\n@@ -167,7 +168,8 @@ setup_eventdev_generic(struct worker_data *worker_data)\n \tdisable_implicit_release = (dev_info.event_dev_cap &\n \t\t\tRTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE);\n \n-\twkr_p_conf.disable_implicit_release = disable_implicit_release;\n+\twkr_p_conf.event_port_cfg = disable_implicit_release ?\n+\t\tRTE_EVENT_PORT_CFG_DISABLE_IMPL_REL : 0;\n \n \tif (dev_info.max_num_events < config.nb_events_limit)\n \t\tconfig.nb_events_limit = dev_info.max_num_events;\ndiff --git a/examples/eventdev_pipeline/pipeline_worker_tx.c b/examples/eventdev_pipeline/pipeline_worker_tx.c\nindex 55bb2f7..ca6cd20 100644\n--- a/examples/eventdev_pipeline/pipeline_worker_tx.c\n+++ b/examples/eventdev_pipeline/pipeline_worker_tx.c\n@@ -436,6 +436,7 @@ setup_eventdev_worker_tx_enq(struct worker_data *worker_data)\n \tstruct rte_event_dev_config config = {\n \t\t\t.nb_event_queues = nb_queues,\n \t\t\t.nb_event_ports = nb_ports,\n+\t\t\t.nb_single_link_event_port_queues = 0,\n \t\t\t.nb_events_limit = 4096,\n \t\t\t.nb_event_queue_flows = 1024,\n \t\t\t.nb_event_port_dequeue_depth = 128,\ndiff --git a/examples/l2fwd-event/l2fwd_event_generic.c b/examples/l2fwd-event/l2fwd_event_generic.c\nindex 2dc95e5..9a3167c 100644\n--- a/examples/l2fwd-event/l2fwd_event_generic.c\n+++ b/examples/l2fwd-event/l2fwd_event_generic.c\n@@ -126,8 +126,11 @@ l2fwd_event_port_setup_generic(struct l2fwd_resources *rsrc)\n \tif (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth)\n \t\tevent_p_conf.enqueue_depth = def_p_conf.enqueue_depth;\n \n-\tevent_p_conf.disable_implicit_release =\n-\t\tevt_rsrc->disable_implicit_release;\n+\tevent_p_conf.event_port_cfg = 0;\n+\tif (evt_rsrc->disable_implicit_release)\n+\t\tevent_p_conf.event_port_cfg |=\n+\t\t\tRTE_EVENT_PORT_CFG_DISABLE_IMPL_REL;\n+\n \tevt_rsrc->deq_depth = def_p_conf.dequeue_depth;\n \n \tfor (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports;\ndiff --git a/examples/l2fwd-event/l2fwd_event_internal_port.c b/examples/l2fwd-event/l2fwd_event_internal_port.c\nindex 63d57b4..203a14c 100644\n--- a/examples/l2fwd-event/l2fwd_event_internal_port.c\n+++ b/examples/l2fwd-event/l2fwd_event_internal_port.c\n@@ -123,8 +123,10 @@ l2fwd_event_port_setup_internal_port(struct l2fwd_resources *rsrc)\n \tif (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth)\n \t\tevent_p_conf.enqueue_depth = def_p_conf.enqueue_depth;\n \n-\tevent_p_conf.disable_implicit_release =\n-\t\tevt_rsrc->disable_implicit_release;\n+\tevent_p_conf.event_port_cfg = 0;\n+\tif (evt_rsrc->disable_implicit_release)\n+\t\tevent_p_conf.event_port_cfg |=\n+\t\t\tRTE_EVENT_PORT_CFG_DISABLE_IMPL_REL;\n \n \tfor (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports;\n \t\t\t\t\t\t\t\tevent_p_id++) {\ndiff --git a/examples/l3fwd/l3fwd_event_generic.c b/examples/l3fwd/l3fwd_event_generic.c\nindex f8c9843..c80573f 100644\n--- a/examples/l3fwd/l3fwd_event_generic.c\n+++ b/examples/l3fwd/l3fwd_event_generic.c\n@@ -115,8 +115,11 @@ l3fwd_event_port_setup_generic(void)\n \tif (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth)\n \t\tevent_p_conf.enqueue_depth = def_p_conf.enqueue_depth;\n \n-\tevent_p_conf.disable_implicit_release =\n-\t\tevt_rsrc->disable_implicit_release;\n+\tevent_p_conf.event_port_cfg = 0;\n+\tif (evt_rsrc->disable_implicit_release)\n+\t\tevent_p_conf.event_port_cfg |=\n+\t\t\tRTE_EVENT_PORT_CFG_DISABLE_IMPL_REL;\n+\n \tevt_rsrc->deq_depth = def_p_conf.dequeue_depth;\n \n \tfor (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports;\ndiff --git a/examples/l3fwd/l3fwd_event_internal_port.c b/examples/l3fwd/l3fwd_event_internal_port.c\nindex 03ac581..9916a7f 100644\n--- a/examples/l3fwd/l3fwd_event_internal_port.c\n+++ b/examples/l3fwd/l3fwd_event_internal_port.c\n@@ -113,8 +113,10 @@ l3fwd_event_port_setup_internal_port(void)\n \tif (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth)\n \t\tevent_p_conf.enqueue_depth = def_p_conf.enqueue_depth;\n \n-\tevent_p_conf.disable_implicit_release =\n-\t\tevt_rsrc->disable_implicit_release;\n+\tevent_p_conf.event_port_cfg = 0;\n+\tif (evt_rsrc->disable_implicit_release)\n+\t\tevent_p_conf.event_port_cfg |=\n+\t\t\tRTE_EVENT_PORT_CFG_DISABLE_IMPL_REL;\n \n \tfor (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports;\n \t\t\t\t\t\t\t\tevent_p_id++) {\n", "prefixes": [ "2/2" ] }