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{
    "id": 80649,
    "url": "http://patches.dpdk.org/api/patches/80649/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201014055517.1214386-29-jiawenwu@trustnetic.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201014055517.1214386-29-jiawenwu@trustnetic.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201014055517.1214386-29-jiawenwu@trustnetic.com",
    "date": "2020-10-14T05:54:49",
    "name": "[v3,28/56] net/txgbe: add device start operation",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "b7e0fee51e31a0c2a252c7086b82a071ae6b99a3",
    "submitter": {
        "id": 1932,
        "url": "http://patches.dpdk.org/api/people/1932/?format=api",
        "name": "Jiawen Wu",
        "email": "jiawenwu@trustnetic.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201014055517.1214386-29-jiawenwu@trustnetic.com/mbox/",
    "series": [
        {
            "id": 12938,
            "url": "http://patches.dpdk.org/api/series/12938/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12938",
            "date": "2020-10-14T05:54:22",
            "name": "net: txgbe PMD",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/12938/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/80649/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/80649/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 12A57A04B7;\n\tWed, 14 Oct 2020 08:06:11 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D80E71DCB8;\n\tWed, 14 Oct 2020 07:54:56 +0200 (CEST)",
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            "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp10.qq.com (ESMTP) with\n id ; Wed, 14 Oct 2020 13:54:36 +0800 (CST)"
        ],
        "X-QQ-mid": "bizesmtp28t1602654877t0rudn7b",
        "X-QQ-SSF": "01400000000000C0C000B00A0000000",
        "X-QQ-FEAT": "Yvg9Ua36cywomlGW9Q5//w9uDjFeqrOdduYpHjIADbCbqz+JJ0ezCjmX3bPpV\n nz17Q2p7oNMHxSNSNJbkfeBy2qtui6m38UE4bCa0EPjCuR+pXEejjRtos0OaaIllH6m5GjH\n MtgDKVBrbIiB13ycxuzL62gcG+dXTKyY7oGLvkDSMPzMYEArf/AaoltAfccoHE2IPjdoPG6\n p0acH7+pmAk4httKRMeiWn0Z6e7c/Paxy+YadnYJFxS3Ww0toYfENuoA6mWCtBwQYO/Y+Oc\n 9wsrNbHeH1JSKBcs4F9KEBwIZ/1CAHwCF2D8ididnypRfM4s1txjHMZCrxe/ft8BxuFPTc6\n grsF3AlHnQhHrAotwY=",
        "X-QQ-GoodBg": "2",
        "From": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "To": "dev@dpdk.org",
        "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "Date": "Wed, 14 Oct 2020 13:54:49 +0800",
        "Message-Id": "<20201014055517.1214386-29-jiawenwu@trustnetic.com>",
        "X-Mailer": "git-send-email 2.18.4",
        "In-Reply-To": "<20201014055517.1214386-1-jiawenwu@trustnetic.com>",
        "References": "<20201014055517.1214386-1-jiawenwu@trustnetic.com>",
        "X-QQ-SENDSIZE": "520",
        "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign7",
        "X-QQ-Bgrelay": "1",
        "Subject": "[dpdk-dev] [PATCH v3 28/56] net/txgbe: add device start operation",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add device start operation with hardware start and reset.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n drivers/net/txgbe/base/txgbe_eeprom.h |   1 +\n drivers/net/txgbe/base/txgbe_hw.c     | 346 ++++++++++++++++++++++++++\n drivers/net/txgbe/base/txgbe_hw.h     |   9 +\n drivers/net/txgbe/base/txgbe_type.h   |   5 +-\n drivers/net/txgbe/txgbe_ethdev.c      | 217 ++++++++++++++++\n drivers/net/txgbe/txgbe_ethdev.h      |   4 +\n drivers/net/txgbe/txgbe_rxtx.c        | 102 ++++++++\n 7 files changed, 683 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/net/txgbe/base/txgbe_eeprom.h b/drivers/net/txgbe/base/txgbe_eeprom.h\nindex e50dfe4f6..2ad6c7e19 100644\n--- a/drivers/net/txgbe/base/txgbe_eeprom.h\n+++ b/drivers/net/txgbe/base/txgbe_eeprom.h\n@@ -26,6 +26,7 @@\n #define TXGBE_SAN_MAC_ADDR_PORT0_OFFSET\t\t0x0\n #define TXGBE_SAN_MAC_ADDR_PORT1_OFFSET\t\t0x3\n #define TXGBE_DEVICE_CAPS_ALLOW_ANY_SFP\t\t0x1\n+#define TXGBE_DEVICE_CAPS_NO_CROSSTALK_WR\t(1 << 7)\n #define TXGBE_FW_LESM_PARAMETERS_PTR\t\t0x2\n #define TXGBE_FW_LESM_STATE_1\t\t\t0x1\n #define TXGBE_FW_LESM_STATE_ENABLED\t\t0x8000 /* LESM Enable bit */\ndiff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c\nindex a4bb44c92..1b40bfa2f 100644\n--- a/drivers/net/txgbe/base/txgbe_hw.c\n+++ b/drivers/net/txgbe/base/txgbe_hw.c\n@@ -21,6 +21,71 @@ static s32 txgbe_mta_vector(struct txgbe_hw *hw, u8 *mc_addr);\n static s32 txgbe_get_san_mac_addr_offset(struct txgbe_hw *hw,\n \t\t\t\t\t u16 *san_mac_offset);\n \n+/**\n+ *  txgbe_start_hw - Prepare hardware for Tx/Rx\n+ *  @hw: pointer to hardware structure\n+ *\n+ *  Starts the hardware by filling the bus info structure and media type, clears\n+ *  all on chip counters, initializes receive address registers, multicast\n+ *  table, VLAN filter table, calls routine to set up link and flow control\n+ *  settings, and leaves transmit and receive units disabled and uninitialized\n+ **/\n+s32 txgbe_start_hw(struct txgbe_hw *hw)\n+{\n+\tu16 device_caps;\n+\n+\tDEBUGFUNC(\"txgbe_start_hw\");\n+\n+\t/* Set the media type */\n+\thw->phy.media_type = hw->phy.get_media_type(hw);\n+\n+\t/* Clear statistics registers */\n+\thw->mac.clear_hw_cntrs(hw);\n+\n+\t/* Cache bit indicating need for crosstalk fix */\n+\tswitch (hw->mac.type) {\n+\tcase txgbe_mac_raptor:\n+\t\thw->mac.get_device_caps(hw, &device_caps);\n+\t\tif (device_caps & TXGBE_DEVICE_CAPS_NO_CROSSTALK_WR)\n+\t\t\thw->need_crosstalk_fix = false;\n+\t\telse\n+\t\t\thw->need_crosstalk_fix = true;\n+\t\tbreak;\n+\tdefault:\n+\t\thw->need_crosstalk_fix = false;\n+\t\tbreak;\n+\t}\n+\n+\t/* Clear adapter stopped flag */\n+\thw->adapter_stopped = false;\n+\n+\treturn 0;\n+}\n+\n+/**\n+ *  txgbe_start_hw_gen2 - Init sequence for common device family\n+ *  @hw: pointer to hw structure\n+ *\n+ * Performs the init sequence common to the second generation\n+ * of 10 GbE devices.\n+ **/\n+s32 txgbe_start_hw_gen2(struct txgbe_hw *hw)\n+{\n+\tu32 i;\n+\n+\t/* Clear the rate limiters */\n+\tfor (i = 0; i < hw->mac.max_tx_queues; i++) {\n+\t\twr32(hw, TXGBE_ARBPOOLIDX, i);\n+\t\twr32(hw, TXGBE_ARBTXRATE, 0);\n+\t}\n+\ttxgbe_flush(hw);\n+\n+\t/* We need to run link autotry after the driver loads */\n+\thw->mac.autotry_restart = true;\n+\n+\treturn 0;\n+}\n+\n /**\n  *  txgbe_init_hw - Generic hardware initialization\n  *  @hw: pointer to hardware structure\n@@ -105,6 +170,59 @@ void txgbe_set_lan_id_multi_port(struct txgbe_hw *hw)\n \t\tbus->func = bus->lan_id;\n }\n \n+/**\n+ *  txgbe_stop_hw - Generic stop Tx/Rx units\n+ *  @hw: pointer to hardware structure\n+ *\n+ *  Sets the adapter_stopped flag within txgbe_hw struct. Clears interrupts,\n+ *  disables transmit and receive units. The adapter_stopped flag is used by\n+ *  the shared code and drivers to determine if the adapter is in a stopped\n+ *  state and should not touch the hardware.\n+ **/\n+s32 txgbe_stop_hw(struct txgbe_hw *hw)\n+{\n+\tu32 reg_val;\n+\tu16 i;\n+\n+\tDEBUGFUNC(\"txgbe_stop_hw\");\n+\n+\t/*\n+\t * Set the adapter_stopped flag so other driver functions stop touching\n+\t * the hardware\n+\t */\n+\thw->adapter_stopped = true;\n+\n+\t/* Disable the receive unit */\n+\ttxgbe_disable_rx(hw);\n+\n+\t/* Clear interrupt mask to stop interrupts from being generated */\n+\twr32(hw, TXGBE_IENMISC, 0);\n+\twr32(hw, TXGBE_IMS(0), TXGBE_IMS_MASK);\n+\twr32(hw, TXGBE_IMS(1), TXGBE_IMS_MASK);\n+\n+\t/* Clear any pending interrupts, flush previous writes */\n+\twr32(hw, TXGBE_ICRMISC, TXGBE_ICRMISC_MASK);\n+\twr32(hw, TXGBE_ICR(0), TXGBE_ICR_MASK);\n+\twr32(hw, TXGBE_ICR(1), TXGBE_ICR_MASK);\n+\n+\t/* Disable the transmit unit.  Each queue must be disabled. */\n+\tfor (i = 0; i < hw->mac.max_tx_queues; i++)\n+\t\twr32(hw, TXGBE_TXCFG(i), TXGBE_TXCFG_FLUSH);\n+\n+\t/* Disable the receive unit by stopping each queue */\n+\tfor (i = 0; i < hw->mac.max_rx_queues; i++) {\n+\t\treg_val = rd32(hw, TXGBE_RXCFG(i));\n+\t\treg_val &= ~TXGBE_RXCFG_ENA;\n+\t\twr32(hw, TXGBE_RXCFG(i), reg_val);\n+\t}\n+\n+\t/* flush all queues disables */\n+\ttxgbe_flush(hw);\n+\tmsec_delay(2);\n+\n+\treturn 0;\n+}\n+\n /**\n  *  txgbe_validate_mac_addr - Validate MAC address\n  *  @mac_addr: pointer to MAC address.\n@@ -676,6 +794,23 @@ s32 txgbe_check_mac_link(struct txgbe_hw *hw, u32 *speed,\n \treturn 0;\n }\n \n+/**\n+ *  txgbe_get_device_caps - Get additional device capabilities\n+ *  @hw: pointer to hardware structure\n+ *  @device_caps: the EEPROM word with the extra device capabilities\n+ *\n+ *  This function will read the EEPROM location for the device capabilities,\n+ *  and return the word through device_caps.\n+ **/\n+s32 txgbe_get_device_caps(struct txgbe_hw *hw, u16 *device_caps)\n+{\n+\tDEBUGFUNC(\"txgbe_get_device_caps\");\n+\n+\thw->rom.readw_sw(hw, TXGBE_DEVICE_CAPS, device_caps);\n+\n+\treturn 0;\n+}\n+\n /**\n  * txgbe_clear_tx_pending - Clear pending TX work from the PCIe fifo\n  * @hw: pointer to the hardware structure\n@@ -718,6 +853,38 @@ void txgbe_clear_tx_pending(struct txgbe_hw *hw)\n \twr32(hw, TXGBE_PSRCTL, hlreg0);\n }\n \n+void txgbe_disable_rx(struct txgbe_hw *hw)\n+{\n+\tu32 pfdtxgswc;\n+\n+\tpfdtxgswc = rd32(hw, TXGBE_PSRCTL);\n+\tif (pfdtxgswc & TXGBE_PSRCTL_LBENA) {\n+\t\tpfdtxgswc &= ~TXGBE_PSRCTL_LBENA;\n+\t\twr32(hw, TXGBE_PSRCTL, pfdtxgswc);\n+\t\thw->mac.set_lben = true;\n+\t} else {\n+\t\thw->mac.set_lben = false;\n+\t}\n+\n+\twr32m(hw, TXGBE_PBRXCTL, TXGBE_PBRXCTL_ENA, 0);\n+\twr32m(hw, TXGBE_MACRXCFG, TXGBE_MACRXCFG_ENA, 0);\n+}\n+\n+void txgbe_enable_rx(struct txgbe_hw *hw)\n+{\n+\tu32 pfdtxgswc;\n+\n+\twr32m(hw, TXGBE_MACRXCFG, TXGBE_MACRXCFG_ENA, TXGBE_MACRXCFG_ENA);\n+\twr32m(hw, TXGBE_PBRXCTL, TXGBE_PBRXCTL_ENA, TXGBE_PBRXCTL_ENA);\n+\n+\tif (hw->mac.set_lben) {\n+\t\tpfdtxgswc = rd32(hw, TXGBE_PSRCTL);\n+\t\tpfdtxgswc |= TXGBE_PSRCTL_LBENA;\n+\t\twr32(hw, TXGBE_PSRCTL, pfdtxgswc);\n+\t\thw->mac.set_lben = false;\n+\t}\n+}\n+\n /**\n  *  txgbe_setup_mac_link_multispeed_fiber - Set MAC link speed\n  *  @hw: pointer to hardware structure\n@@ -1046,6 +1213,38 @@ s32 txgbe_init_phy_raptor(struct txgbe_hw *hw)\n \treturn err;\n }\n \n+s32 txgbe_setup_sfp_modules(struct txgbe_hw *hw)\n+{\n+\ts32 err = 0;\n+\n+\tDEBUGFUNC(\"txgbe_setup_sfp_modules\");\n+\n+\tif (hw->phy.sfp_type == txgbe_sfp_type_unknown)\n+\t\treturn 0;\n+\n+\ttxgbe_init_mac_link_ops(hw);\n+\n+\t/* PHY config will finish before releasing the semaphore */\n+\terr = hw->mac.acquire_swfw_sync(hw, TXGBE_MNGSEM_SWPHY);\n+\tif (err != 0)\n+\t\treturn TXGBE_ERR_SWFW_SYNC;\n+\n+\t/* Release the semaphore */\n+\thw->mac.release_swfw_sync(hw, TXGBE_MNGSEM_SWPHY);\n+\n+\t/* Delay obtaining semaphore again to allow FW access\n+\t * prot_autoc_write uses the semaphore too.\n+\t */\n+\tmsec_delay(hw->rom.semaphore_delay);\n+\n+\tif (err) {\n+\t\tDEBUGOUT(\"sfp module setup not complete\\n\");\n+\t\treturn TXGBE_ERR_SFP_SETUP_NOT_COMPLETE;\n+\t}\n+\n+\treturn err;\n+}\n+\n /**\n  *  txgbe_init_ops_pf - Inits func ptrs and MAC type\n  *  @hw: pointer to hardware structure\n@@ -1066,6 +1265,7 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)\n \tbus->set_lan_id = txgbe_set_lan_id_multi_port;\n \n \t/* PHY */\n+\tphy->get_media_type = txgbe_get_media_type_raptor;\n \tphy->identify = txgbe_identify_phy;\n \tphy->init = txgbe_init_phy_raptor;\n \tphy->read_reg = txgbe_read_phy_reg;\n@@ -1082,17 +1282,23 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)\n \n \t/* MAC */\n \tmac->init_hw = txgbe_init_hw;\n+\tmac->start_hw = txgbe_start_hw_raptor;\n \tmac->get_mac_addr = txgbe_get_mac_addr;\n+\tmac->stop_hw = txgbe_stop_hw;\n \tmac->reset_hw = txgbe_reset_hw;\n \tmac->get_san_mac_addr = txgbe_get_san_mac_addr;\n \tmac->set_san_mac_addr = txgbe_set_san_mac_addr;\n+\tmac->get_device_caps = txgbe_get_device_caps;\n \tmac->autoc_read = txgbe_autoc_read;\n \tmac->autoc_write = txgbe_autoc_write;\n \n \tmac->set_rar = txgbe_set_rar;\n \tmac->clear_rar = txgbe_clear_rar;\n \tmac->init_rx_addrs = txgbe_init_rx_addrs;\n+\tmac->enable_rx = txgbe_enable_rx;\n+\tmac->disable_rx = txgbe_disable_rx;\n \tmac->init_uta_tables = txgbe_init_uta_tables;\n+\tmac->setup_sfp = txgbe_setup_sfp_modules;\n \t/* Link */\n \tmac->get_link_capabilities = txgbe_get_link_capabilities_raptor;\n \tmac->check_link = txgbe_check_mac_link;\n@@ -1229,6 +1435,52 @@ s32 txgbe_get_link_capabilities_raptor(struct txgbe_hw *hw,\n \treturn status;\n }\n \n+/**\n+ *  txgbe_get_media_type_raptor - Get media type\n+ *  @hw: pointer to hardware structure\n+ *\n+ *  Returns the media type (fiber, copper, backplane)\n+ **/\n+u32 txgbe_get_media_type_raptor(struct txgbe_hw *hw)\n+{\n+\tu32 media_type;\n+\n+\tDEBUGFUNC(\"txgbe_get_media_type_raptor\");\n+\n+\t/* Detect if there is a copper PHY attached. */\n+\tswitch (hw->phy.type) {\n+\tcase txgbe_phy_cu_unknown:\n+\tcase txgbe_phy_tn:\n+\t\tmedia_type = txgbe_media_type_copper;\n+\t\treturn media_type;\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\tswitch (hw->device_id) {\n+\tcase TXGBE_DEV_ID_RAPTOR_KR_KX_KX4:\n+\t\t/* Default device ID is mezzanine card KX/KX4 */\n+\t\tmedia_type = txgbe_media_type_backplane;\n+\t\tbreak;\n+\tcase TXGBE_DEV_ID_RAPTOR_SFP:\n+\tcase TXGBE_DEV_ID_WX1820_SFP:\n+\t\tmedia_type = txgbe_media_type_fiber;\n+\t\tbreak;\n+\tcase TXGBE_DEV_ID_RAPTOR_QSFP:\n+\t\tmedia_type = txgbe_media_type_fiber_qsfp;\n+\t\tbreak;\n+\tcase TXGBE_DEV_ID_RAPTOR_XAUI:\n+\tcase TXGBE_DEV_ID_RAPTOR_SGMII:\n+\t\tmedia_type = txgbe_media_type_copper;\n+\t\tbreak;\n+\tdefault:\n+\t\tmedia_type = txgbe_media_type_unknown;\n+\t\tbreak;\n+\t}\n+\n+\treturn media_type;\n+}\n+\n /**\n  *  txgbe_start_mac_link_raptor - Setup MAC link settings\n  *  @hw: pointer to hardware structure\n@@ -1648,6 +1900,68 @@ txgbe_check_flash_load(struct txgbe_hw *hw, u32 check_bit)\n \treturn err;\n }\n \n+static void\n+txgbe_reset_misc(struct txgbe_hw *hw)\n+{\n+\tint i;\n+\tu32 value;\n+\n+\twr32(hw, TXGBE_ISBADDRL, hw->isb_dma & 0x00000000FFFFFFFF);\n+\twr32(hw, TXGBE_ISBADDRH, hw->isb_dma >> 32);\n+\n+\tvalue = rd32_epcs(hw, SR_XS_PCS_CTRL2);\n+\tif ((value & 0x3) != SR_PCS_CTRL2_TYPE_SEL_X)\n+\t\thw->link_status = TXGBE_LINK_STATUS_NONE;\n+\n+\t/* receive packets that size > 2048 */\n+\twr32m(hw, TXGBE_MACRXCFG,\n+\t\tTXGBE_MACRXCFG_JUMBO, TXGBE_MACRXCFG_JUMBO);\n+\n+\twr32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK,\n+\t\tTXGBE_FRMSZ_MAX(TXGBE_FRAME_SIZE_DFT));\n+\n+\t/* clear counters on read */\n+\twr32m(hw, TXGBE_MACCNTCTL,\n+\t\tTXGBE_MACCNTCTL_RC, TXGBE_MACCNTCTL_RC);\n+\n+\twr32m(hw, TXGBE_RXFCCFG,\n+\t\tTXGBE_RXFCCFG_FC, TXGBE_RXFCCFG_FC);\n+\twr32m(hw, TXGBE_TXFCCFG,\n+\t\tTXGBE_TXFCCFG_FC, TXGBE_TXFCCFG_FC);\n+\n+\twr32m(hw, TXGBE_MACRXFLT,\n+\t\tTXGBE_MACRXFLT_PROMISC, TXGBE_MACRXFLT_PROMISC);\n+\n+\twr32m(hw, TXGBE_RSTSTAT,\n+\t\tTXGBE_RSTSTAT_TMRINIT_MASK, TXGBE_RSTSTAT_TMRINIT(30));\n+\n+\t/* errata 4: initialize mng flex tbl and wakeup flex tbl*/\n+\twr32(hw, TXGBE_MNGFLEXSEL, 0);\n+\tfor (i = 0; i < 16; i++) {\n+\t\twr32(hw, TXGBE_MNGFLEXDWL(i), 0);\n+\t\twr32(hw, TXGBE_MNGFLEXDWH(i), 0);\n+\t\twr32(hw, TXGBE_MNGFLEXMSK(i), 0);\n+\t}\n+\twr32(hw, TXGBE_LANFLEXSEL, 0);\n+\tfor (i = 0; i < 16; i++) {\n+\t\twr32(hw, TXGBE_LANFLEXDWL(i), 0);\n+\t\twr32(hw, TXGBE_LANFLEXDWH(i), 0);\n+\t\twr32(hw, TXGBE_LANFLEXMSK(i), 0);\n+\t}\n+\n+\t/* set pause frame dst mac addr */\n+\twr32(hw, TXGBE_RXPBPFCDMACL, 0xC2000001);\n+\twr32(hw, TXGBE_RXPBPFCDMACH, 0x0180);\n+\n+\thw->mac.init_thermal_sensor_thresh(hw);\n+\n+\t/* enable mac transmitter */\n+\twr32m(hw, TXGBE_MACTXCFG, TXGBE_MACTXCFG_TXE, TXGBE_MACTXCFG_TXE);\n+\n+\tfor (i = 0; i < 4; i++)\n+\t\twr32m(hw, TXGBE_IVAR(i), 0x80808080, 0);\n+}\n+\n /**\n  *  txgbe_reset_hw - Perform hardware reset\n  *  @hw: pointer to hardware structure\n@@ -1706,6 +2020,8 @@ s32 txgbe_reset_hw(struct txgbe_hw *hw)\n \t}\n \tusec_delay(10);\n \n+\ttxgbe_reset_misc(hw);\n+\n \tif (hw->bus.lan_id == 0) {\n \t\tstatus = txgbe_check_flash_load(hw,\n \t\t\t\tTXGBE_ILDRSTAT_SWRST_LAN0);\n@@ -1778,6 +2094,36 @@ s32 txgbe_reset_hw(struct txgbe_hw *hw)\n \treturn status;\n }\n \n+/**\n+ *  txgbe_start_hw_raptor - Prepare hardware for Tx/Rx\n+ *  @hw: pointer to hardware structure\n+ *\n+ *  Starts the hardware using the generic start_hw function\n+ *  and the generation start_hw function.\n+ *  Then performs revision-specific operations, if any.\n+ **/\n+s32 txgbe_start_hw_raptor(struct txgbe_hw *hw)\n+{\n+\ts32 err = 0;\n+\n+\tDEBUGFUNC(\"txgbe_start_hw_raptor\");\n+\n+\terr = txgbe_start_hw(hw);\n+\tif (err != 0)\n+\t\tgoto out;\n+\n+\terr = txgbe_start_hw_gen2(hw);\n+\tif (err != 0)\n+\t\tgoto out;\n+\n+\t/* We need to run link autotry after the driver loads */\n+\thw->mac.autotry_restart = true;\n+\n+out:\n+\treturn err;\n+}\n+\n+\n /**\n  *  txgbe_verify_lesm_fw_enabled_raptor - Checks LESM FW module state.\n  *  @hw: pointer to hardware structure\ndiff --git a/drivers/net/txgbe/base/txgbe_hw.h b/drivers/net/txgbe/base/txgbe_hw.h\nindex 510de5cbe..f0d3d5b97 100644\n--- a/drivers/net/txgbe/base/txgbe_hw.h\n+++ b/drivers/net/txgbe/base/txgbe_hw.h\n@@ -8,6 +8,9 @@\n #include \"txgbe_type.h\"\n \n s32 txgbe_init_hw(struct txgbe_hw *hw);\n+s32 txgbe_start_hw(struct txgbe_hw *hw);\n+s32 txgbe_stop_hw(struct txgbe_hw *hw);\n+s32 txgbe_start_hw_gen2(struct txgbe_hw *hw);\n s32 txgbe_get_mac_addr(struct txgbe_hw *hw, u8 *mac_addr);\n \n void txgbe_set_lan_id_multi_port(struct txgbe_hw *hw);\n@@ -30,10 +33,13 @@ s32 txgbe_check_mac_link(struct txgbe_hw *hw,\n \t\t\t       u32 *speed,\n \t\t\t       bool *link_up, bool link_up_wait_to_complete);\n \n+s32 txgbe_get_device_caps(struct txgbe_hw *hw, u16 *device_caps);\n void txgbe_clear_tx_pending(struct txgbe_hw *hw);\n \n s32 txgbe_reset_pipeline_raptor(struct txgbe_hw *hw);\n \n+void txgbe_disable_rx(struct txgbe_hw *hw);\n+void txgbe_enable_rx(struct txgbe_hw *hw);\n s32 txgbe_setup_mac_link_multispeed_fiber(struct txgbe_hw *hw,\n \t\t\t\t\t  u32 speed,\n \t\t\t\t\t  bool autoneg_wait_to_complete);\n@@ -43,6 +49,7 @@ s32 txgbe_set_mac_type(struct txgbe_hw *hw);\n s32 txgbe_init_ops_pf(struct txgbe_hw *hw);\n s32 txgbe_get_link_capabilities_raptor(struct txgbe_hw *hw,\n \t\t\t\t      u32 *speed, bool *autoneg);\n+u32 txgbe_get_media_type_raptor(struct txgbe_hw *hw);\n void txgbe_disable_tx_laser_multispeed_fiber(struct txgbe_hw *hw);\n void txgbe_enable_tx_laser_multispeed_fiber(struct txgbe_hw *hw);\n void txgbe_flap_tx_laser_multispeed_fiber(struct txgbe_hw *hw);\n@@ -55,8 +62,10 @@ s32 txgbe_start_mac_link_raptor(struct txgbe_hw *hw,\n \t\t\t       bool autoneg_wait_to_complete);\n s32 txgbe_setup_mac_link(struct txgbe_hw *hw, u32 speed,\n \t\t\t       bool autoneg_wait_to_complete);\n+s32 txgbe_setup_sfp_modules(struct txgbe_hw *hw);\n void txgbe_init_mac_link_ops(struct txgbe_hw *hw);\n s32 txgbe_reset_hw(struct txgbe_hw *hw);\n+s32 txgbe_start_hw_raptor(struct txgbe_hw *hw);\n s32 txgbe_init_phy_raptor(struct txgbe_hw *hw);\n bool txgbe_verify_lesm_fw_enabled_raptor(struct txgbe_hw *hw);\n #endif /* _TXGBE_HW_H_ */\ndiff --git a/drivers/net/txgbe/base/txgbe_type.h b/drivers/net/txgbe/base/txgbe_type.h\nindex 622c5c6a3..c777d9f75 100644\n--- a/drivers/net/txgbe/base/txgbe_type.h\n+++ b/drivers/net/txgbe/base/txgbe_type.h\n@@ -360,6 +360,7 @@ struct txgbe_mac_info {\n \tbool orig_link_settings_stored;\n \tbool autotry_restart;\n \tu8 flags;\n+\tbool set_lben;\n \tu32  max_link_up_time;\n };\n \n@@ -455,12 +456,14 @@ struct txgbe_hw {\n \tu16 vendor_id;\n \tu16 subsystem_device_id;\n \tu16 subsystem_vendor_id;\n-\n+\tbool adapter_stopped;\n \tbool allow_unsupported_sfp;\n \tbool need_crosstalk_fix;\n \n \tuint64_t isb_dma;\n \tvoid IOMEM *isb_mem;\n+\tu16 nb_rx_queues;\n+\tu16 nb_tx_queues;\n \tenum txgbe_link_status {\n \t\tTXGBE_LINK_STATUS_NONE = 0,\n \t\tTXGBE_LINK_STATUS_KX,\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex 124009fdc..de989538a 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -80,6 +80,25 @@ txgbe_is_sfp(struct txgbe_hw *hw)\n \t}\n }\n \n+static inline int32_t\n+txgbe_pf_reset_hw(struct txgbe_hw *hw)\n+{\n+\tuint32_t ctrl_ext;\n+\tint32_t status;\n+\n+\tstatus = hw->mac.reset_hw(hw);\n+\n+\tctrl_ext = rd32(hw, TXGBE_PORTCTL);\n+\t/* Set PF Reset Done bit so PF/VF Mail Ops can work */\n+\tctrl_ext |= TXGBE_PORTCTL_RSTDONE;\n+\twr32(hw, TXGBE_PORTCTL, ctrl_ext);\n+\ttxgbe_flush(hw);\n+\n+\tif (status == TXGBE_ERR_SFP_NOT_PRESENT)\n+\t\tstatus = 0;\n+\treturn status;\n+}\n+\n static inline void\n txgbe_enable_intr(struct rte_eth_dev *dev)\n {\n@@ -541,6 +560,203 @@ txgbe_dev_phy_intr_setup(struct rte_eth_dev *dev)\n \tintr->mask_misc |= TXGBE_ICRMISC_GPIO;\n }\n \n+/*\n+ * Configure device link speed and setup link.\n+ * It returns 0 on success.\n+ */\n+static int\n+txgbe_dev_start(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n+\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tuint32_t intr_vector = 0;\n+\tint err;\n+\tbool link_up = false, negotiate = 0;\n+\tuint32_t speed = 0;\n+\tuint32_t allowed_speeds = 0;\n+\tint status;\n+\tuint32_t *link_speeds;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\t/* TXGBE devices don't support:\n+\t *    - half duplex (checked afterwards for valid speeds)\n+\t *    - fixed speed: TODO implement\n+\t */\n+\tif (dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED) {\n+\t\tPMD_INIT_LOG(ERR,\n+\t\t\"Invalid link_speeds for port %u, fix speed not supported\",\n+\t\t\t\tdev->data->port_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Stop the link setup handler before resetting the HW. */\n+\trte_eal_alarm_cancel(txgbe_dev_setup_link_alarm_handler, dev);\n+\n+\t/* disable uio/vfio intr/eventfd mapping */\n+\trte_intr_disable(intr_handle);\n+\n+\t/* stop adapter */\n+\thw->adapter_stopped = 0;\n+\ttxgbe_stop_hw(hw);\n+\n+\t/* reinitialize adapter\n+\t * this calls reset and start\n+\t */\n+\thw->nb_rx_queues = dev->data->nb_rx_queues;\n+\thw->nb_tx_queues = dev->data->nb_tx_queues;\n+\tstatus = txgbe_pf_reset_hw(hw);\n+\tif (status != 0)\n+\t\treturn -1;\n+\thw->mac.start_hw(hw);\n+\thw->mac.get_link_status = true;\n+\n+\ttxgbe_dev_phy_intr_setup(dev);\n+\n+\t/* check and configure queue intr-vector mapping */\n+\tif ((rte_intr_cap_multiple(intr_handle) ||\n+\t     !RTE_ETH_DEV_SRIOV(dev).active) &&\n+\t    dev->data->dev_conf.intr_conf.rxq != 0) {\n+\t\tintr_vector = dev->data->nb_rx_queues;\n+\t\tif (rte_intr_efd_enable(intr_handle, intr_vector))\n+\t\t\treturn -1;\n+\t}\n+\n+\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n+\t\tintr_handle->intr_vec =\n+\t\t\trte_zmalloc(\"intr_vec\",\n+\t\t\t\t    dev->data->nb_rx_queues * sizeof(int), 0);\n+\t\tif (intr_handle->intr_vec == NULL) {\n+\t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n+\t\t\t\t     \" intr_vec\", dev->data->nb_rx_queues);\n+\t\t\treturn -ENOMEM;\n+\t\t}\n+\t}\n+\n+\t/* confiugre msix for sleep until rx interrupt */\n+\ttxgbe_configure_msix(dev);\n+\n+\t/* initialize transmission unit */\n+\ttxgbe_dev_tx_init(dev);\n+\n+\t/* This can fail when allocating mbufs for descriptor rings */\n+\terr = txgbe_dev_rx_init(dev);\n+\tif (err) {\n+\t\tPMD_INIT_LOG(ERR, \"Unable to initialize RX hardware\");\n+\t\tgoto error;\n+\t}\n+\n+\terr = txgbe_dev_rxtx_start(dev);\n+\tif (err < 0) {\n+\t\tPMD_INIT_LOG(ERR, \"Unable to start rxtx queues\");\n+\t\tgoto error;\n+\t}\n+\n+\t/* Skip link setup if loopback mode is enabled. */\n+\tif (hw->mac.type == txgbe_mac_raptor &&\n+\t    dev->data->dev_conf.lpbk_mode)\n+\t\tgoto skip_link_setup;\n+\n+\tif (txgbe_is_sfp(hw) && hw->phy.multispeed_fiber) {\n+\t\terr = hw->mac.setup_sfp(hw);\n+\t\tif (err)\n+\t\t\tgoto error;\n+\t}\n+\n+\tif (hw->phy.media_type == txgbe_media_type_copper) {\n+\t\t/* Turn on the copper */\n+\t\thw->phy.set_phy_power(hw, true);\n+\t} else {\n+\t\t/* Turn on the laser */\n+\t\thw->mac.enable_tx_laser(hw);\n+\t}\n+\n+\terr = hw->mac.check_link(hw, &speed, &link_up, 0);\n+\tif (err)\n+\t\tgoto error;\n+\tdev->data->dev_link.link_status = link_up;\n+\n+\terr = hw->mac.get_link_capabilities(hw, &speed, &negotiate);\n+\tif (err)\n+\t\tgoto error;\n+\n+\tallowed_speeds = ETH_LINK_SPEED_100M | ETH_LINK_SPEED_1G |\n+\t\t\tETH_LINK_SPEED_10G;\n+\n+\tlink_speeds = &dev->data->dev_conf.link_speeds;\n+\tif (*link_speeds & ~allowed_speeds) {\n+\t\tPMD_INIT_LOG(ERR, \"Invalid link setting\");\n+\t\tgoto error;\n+\t}\n+\n+\tspeed = 0x0;\n+\tif (*link_speeds == ETH_LINK_SPEED_AUTONEG) {\n+\t\tspeed = (TXGBE_LINK_SPEED_100M_FULL |\n+\t\t\t TXGBE_LINK_SPEED_1GB_FULL |\n+\t\t\t TXGBE_LINK_SPEED_10GB_FULL);\n+\t} else {\n+\t\tif (*link_speeds & ETH_LINK_SPEED_10G)\n+\t\t\tspeed |= TXGBE_LINK_SPEED_10GB_FULL;\n+\t\tif (*link_speeds & ETH_LINK_SPEED_5G)\n+\t\t\tspeed |= TXGBE_LINK_SPEED_5GB_FULL;\n+\t\tif (*link_speeds & ETH_LINK_SPEED_2_5G)\n+\t\t\tspeed |= TXGBE_LINK_SPEED_2_5GB_FULL;\n+\t\tif (*link_speeds & ETH_LINK_SPEED_1G)\n+\t\t\tspeed |= TXGBE_LINK_SPEED_1GB_FULL;\n+\t\tif (*link_speeds & ETH_LINK_SPEED_100M)\n+\t\t\tspeed |= TXGBE_LINK_SPEED_100M_FULL;\n+\t}\n+\n+\terr = hw->mac.setup_link(hw, speed, link_up);\n+\tif (err)\n+\t\tgoto error;\n+\n+skip_link_setup:\n+\n+\tif (rte_intr_allow_others(intr_handle)) {\n+\t\t/* check if lsc interrupt is enabled */\n+\t\tif (dev->data->dev_conf.intr_conf.lsc != 0)\n+\t\t\ttxgbe_dev_lsc_interrupt_setup(dev, TRUE);\n+\t\telse\n+\t\t\ttxgbe_dev_lsc_interrupt_setup(dev, FALSE);\n+\t\ttxgbe_dev_macsec_interrupt_setup(dev);\n+\t\ttxgbe_set_ivar_map(hw, -1, 1, TXGBE_MISC_VEC_ID);\n+\t} else {\n+\t\trte_intr_callback_unregister(intr_handle,\n+\t\t\t\t\t     txgbe_dev_interrupt_handler, dev);\n+\t\tif (dev->data->dev_conf.intr_conf.lsc != 0)\n+\t\t\tPMD_INIT_LOG(INFO, \"lsc won't enable because of\"\n+\t\t\t\t     \" no intr multiplex\");\n+\t}\n+\n+\t/* check if rxq interrupt is enabled */\n+\tif (dev->data->dev_conf.intr_conf.rxq != 0 &&\n+\t    rte_intr_dp_is_en(intr_handle))\n+\t\ttxgbe_dev_rxq_interrupt_setup(dev);\n+\n+\t/* enable uio/vfio intr/eventfd mapping */\n+\trte_intr_enable(intr_handle);\n+\n+\t/* resume enabled intr since hw reset */\n+\ttxgbe_enable_intr(dev);\n+\n+\t/*\n+\t * Update link status right before return, because it may\n+\t * start link configuration process in a separate thread.\n+\t */\n+\ttxgbe_dev_link_update(dev, 0);\n+\n+\twr32m(hw, TXGBE_LEDCTL, 0xFFFFFFFF, TXGBE_LEDCTL_ORD_MASK);\n+\n+\treturn 0;\n+\n+error:\n+\tPMD_INIT_LOG(ERR, \"failure in dev start: %d\", err);\n+\ttxgbe_dev_clear_queues(dev);\n+\treturn -EIO;\n+}\n+\n /*\n  * Set device link up: enable tx.\n  */\n@@ -1362,6 +1578,7 @@ txgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,\n static const struct eth_dev_ops txgbe_eth_dev_ops = {\n \t.dev_configure              = txgbe_dev_configure,\n \t.dev_infos_get              = txgbe_dev_info_get,\n+\t.dev_start                  = txgbe_dev_start,\n \t.dev_set_link_up            = txgbe_dev_set_link_up,\n \t.dev_set_link_down          = txgbe_dev_set_link_down,\n \t.dev_supported_ptypes_get   = txgbe_dev_supported_ptypes_get,\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h\nindex c01f31295..f47c64ca6 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.h\n+++ b/drivers/net/txgbe/txgbe_ethdev.h\n@@ -81,6 +81,8 @@ struct txgbe_adapter {\n /*\n  * RX/TX function prototypes\n  */\n+void txgbe_dev_clear_queues(struct rte_eth_dev *dev);\n+\n void txgbe_dev_free_queues(struct rte_eth_dev *dev);\n \n void txgbe_dev_rx_queue_release(void *rxq);\n@@ -100,6 +102,8 @@ int txgbe_dev_rx_init(struct rte_eth_dev *dev);\n \n void txgbe_dev_tx_init(struct rte_eth_dev *dev);\n \n+int txgbe_dev_rxtx_start(struct rte_eth_dev *dev);\n+\n void txgbe_dev_save_rx_queue(struct txgbe_hw *hw, uint16_t rx_queue_id);\n void txgbe_dev_store_rx_queue(struct txgbe_hw *hw, uint16_t rx_queue_id);\n void txgbe_dev_save_tx_queue(struct txgbe_hw *hw, uint16_t tx_queue_id);\ndiff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c\nindex aa795920f..f1b038013 100644\n--- a/drivers/net/txgbe/txgbe_rxtx.c\n+++ b/drivers/net/txgbe/txgbe_rxtx.c\n@@ -2468,6 +2468,33 @@ txgbe_dev_rx_queue_setup(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+void __rte_cold\n+txgbe_dev_clear_queues(struct rte_eth_dev *dev)\n+{\n+\tunsigned int i;\n+\tstruct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n+\t\tstruct txgbe_tx_queue *txq = dev->data->tx_queues[i];\n+\n+\t\tif (txq != NULL) {\n+\t\t\ttxq->ops->release_mbufs(txq);\n+\t\t\ttxq->ops->reset(txq);\n+\t\t}\n+\t}\n+\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n+\t\tstruct txgbe_rx_queue *rxq = dev->data->rx_queues[i];\n+\n+\t\tif (rxq != NULL) {\n+\t\t\ttxgbe_rx_queue_release_mbufs(rxq);\n+\t\t\ttxgbe_reset_rx_queue(adapter, rxq);\n+\t\t}\n+\t}\n+}\n+\n void\n txgbe_dev_free_queues(struct rte_eth_dev *dev)\n {\n@@ -2915,6 +2942,81 @@ txgbe_dev_tx_init(struct rte_eth_dev *dev)\n \t}\n }\n \n+/*\n+ * Set up link loopback mode Tx->Rx.\n+ */\n+static inline void __rte_cold\n+txgbe_setup_loopback_link_raptor(struct txgbe_hw *hw)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\twr32m(hw, TXGBE_MACRXCFG, TXGBE_MACRXCFG_LB, TXGBE_MACRXCFG_LB);\n+\n+\tmsec_delay(50);\n+}\n+\n+/*\n+ * Start Transmit and Receive Units.\n+ */\n+int __rte_cold\n+txgbe_dev_rxtx_start(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_hw     *hw;\n+\tstruct txgbe_tx_queue *txq;\n+\tstruct txgbe_rx_queue *rxq;\n+\tuint32_t dmatxctl;\n+\tuint32_t rxctrl;\n+\tuint16_t i;\n+\tint ret = 0;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\thw = TXGBE_DEV_HW(dev);\n+\n+\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n+\t\ttxq = dev->data->tx_queues[i];\n+\t\t/* Setup Transmit Threshold Registers */\n+\t\twr32m(hw, TXGBE_TXCFG(txq->reg_idx),\n+\t\t      TXGBE_TXCFG_HTHRESH_MASK |\n+\t\t      TXGBE_TXCFG_WTHRESH_MASK,\n+\t\t      TXGBE_TXCFG_HTHRESH(txq->hthresh) |\n+\t\t      TXGBE_TXCFG_WTHRESH(txq->wthresh));\n+\t}\n+\n+\tdmatxctl = rd32(hw, TXGBE_DMATXCTRL);\n+\tdmatxctl |= TXGBE_DMATXCTRL_ENA;\n+\twr32(hw, TXGBE_DMATXCTRL, dmatxctl);\n+\n+\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n+\t\ttxq = dev->data->tx_queues[i];\n+\t\tif (!txq->tx_deferred_start) {\n+\t\t\tret = txgbe_dev_tx_queue_start(dev, i);\n+\t\t\tif (ret < 0)\n+\t\t\t\treturn ret;\n+\t\t}\n+\t}\n+\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n+\t\trxq = dev->data->rx_queues[i];\n+\t\tif (!rxq->rx_deferred_start) {\n+\t\t\tret = txgbe_dev_rx_queue_start(dev, i);\n+\t\t\tif (ret < 0)\n+\t\t\t\treturn ret;\n+\t\t}\n+\t}\n+\n+\t/* Enable Receive engine */\n+\trxctrl = rd32(hw, TXGBE_PBRXCTL);\n+\trxctrl |= TXGBE_PBRXCTL_ENA;\n+\thw->mac.enable_rx_dma(hw, rxctrl);\n+\n+\t/* If loopback mode is enabled, set up the link accordingly */\n+\tif (hw->mac.type == txgbe_mac_raptor &&\n+\t    dev->data->dev_conf.lpbk_mode)\n+\t\ttxgbe_setup_loopback_link_raptor(hw);\n+\n+\treturn 0;\n+}\n+\n void\n txgbe_dev_save_rx_queue(struct txgbe_hw *hw, uint16_t rx_queue_id)\n {\n",
    "prefixes": [
        "v3",
        "28/56"
    ]
}