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GET /api/patches/80295/?format=api
{ "id": 80295, "url": "http://patches.dpdk.org/api/patches/80295/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201011003252.54558-2-roy.fan.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201011003252.54558-2-roy.fan.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201011003252.54558-2-roy.fan.zhang@intel.com", "date": "2020-10-11T00:32:49", "name": "[v12,1/4] cryptodev: change crypto symmetric vector structure", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "3ef4ed89c8d098d11a2148e5d66eb5d8ce071371", "submitter": { "id": 304, "url": "http://patches.dpdk.org/api/people/304/?format=api", "name": "Fan Zhang", "email": "roy.fan.zhang@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201011003252.54558-2-roy.fan.zhang@intel.com/mbox/", "series": [ { "id": 12862, "url": "http://patches.dpdk.org/api/series/12862/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12862", "date": "2020-10-11T00:32:48", "name": "cryptodev: add raw data-path APIs", "version": 12, "mbox": "http://patches.dpdk.org/series/12862/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/80295/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/80295/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 149EAA04B6;\n\tSun, 11 Oct 2020 02:33:25 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 087161D445;\n\tSun, 11 Oct 2020 02:33:06 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id AC0851D42B\n for <dev@dpdk.org>; Sun, 11 Oct 2020 02:33:02 +0200 (CEST)", "from orsmga002.jf.intel.com ([10.7.209.21])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 10 Oct 2020 17:32:57 -0700", "from silpixa00398673.ir.intel.com (HELO\n silpixa00398673.ger.corp.intel.com) ([10.237.223.136])\n by orsmga002.jf.intel.com with ESMTP; 10 Oct 2020 17:32:56 -0700" ], "IronPort-SDR": [ "\n wVR0soLJbNuD1aU88o95ctL+wYxjBkMtztmb5Y0oIHk+mV2J0/DOmGrPKEx3LD6xSdZDY4RGcs\n 7ZBW1TDxaxNQ==", "\n EKUjODD4GiQJRac1Lfota22HIhPworXweYamBS6hdLdkF/0xFNRAG68KcVyZkYJCPqkBS76ihi\n rFTUHyoAjRrg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9770\"; a=\"153447305\"", "E=Sophos;i=\"5.77,360,1596524400\"; d=\"scan'208\";a=\"153447305\"", "E=Sophos;i=\"5.77,360,1596524400\"; d=\"scan'208\";a=\"329294818\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Fan Zhang <roy.fan.zhang@intel.com>", "To": "dev@dpdk.org", "Cc": "akhil.goyal@nxp.com, Fan Zhang <roy.fan.zhang@intel.com>,\n Adam Dybkowski <adamx.dybkowski@intel.com>,\n Konstantin Ananyev <konstantin.ananyev@intel.com>", "Date": "Sun, 11 Oct 2020 01:32:49 +0100", "Message-Id": "<20201011003252.54558-2-roy.fan.zhang@intel.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20201011003252.54558-1-roy.fan.zhang@intel.com>", "References": "<20201009211141.14435-1-roy.fan.zhang@intel.com>\n <20201011003252.54558-1-roy.fan.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [dpdk-dev v12 1/4] cryptodev: change crypto symmetric\n\tvector structure", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch updates ``rte_crypto_sym_vec`` structure to add\nsupport for both cpu_crypto synchrounous operation and\nasynchronous raw data-path APIs. The patch also includes\nAESNI-MB and AESNI-GCM PMD changes, unit test changes and\ndocumentation updates.\n\nSigned-off-by: Fan Zhang <roy.fan.zhang@intel.com>\nAcked-by: Adam Dybkowski <adamx.dybkowski@intel.com>\nAcked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>\n---\n app/test/test_cryptodev.c | 25 ++++++++------\n doc/guides/prog_guide/cryptodev_lib.rst | 3 +-\n doc/guides/rel_notes/release_20_11.rst | 3 ++\n drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 18 +++++-----\n drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c | 9 +++--\n lib/librte_cryptodev/rte_crypto_sym.h | 40 ++++++++++++++++------\n lib/librte_ipsec/esp_inb.c | 12 +++----\n lib/librte_ipsec/esp_outb.c | 12 +++----\n lib/librte_ipsec/misc.h | 6 ++--\n 9 files changed, 79 insertions(+), 49 deletions(-)", "diff": "diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c\nindex ac2a36bc2..62a265520 100644\n--- a/app/test/test_cryptodev.c\n+++ b/app/test/test_cryptodev.c\n@@ -151,11 +151,11 @@ static void\n process_cpu_aead_op(uint8_t dev_id, struct rte_crypto_op *op)\n {\n \tint32_t n, st;\n-\tvoid *iv;\n \tstruct rte_crypto_sym_op *sop;\n \tunion rte_crypto_sym_ofs ofs;\n \tstruct rte_crypto_sgl sgl;\n \tstruct rte_crypto_sym_vec symvec;\n+\tstruct rte_crypto_va_iova_ptr iv_ptr, aad_ptr, digest_ptr;\n \tstruct rte_crypto_vec vec[UINT8_MAX];\n \n \tsop = op->sym;\n@@ -171,13 +171,17 @@ process_cpu_aead_op(uint8_t dev_id, struct rte_crypto_op *op)\n \tsgl.vec = vec;\n \tsgl.num = n;\n \tsymvec.sgl = &sgl;\n-\tiv = rte_crypto_op_ctod_offset(op, void *, IV_OFFSET);\n-\tsymvec.iv = &iv;\n-\tsymvec.aad = (void **)&sop->aead.aad.data;\n-\tsymvec.digest = (void **)&sop->aead.digest.data;\n+\tsymvec.iv = &iv_ptr;\n+\tsymvec.digest = &digest_ptr;\n+\tsymvec.aad = &aad_ptr;\n \tsymvec.status = &st;\n \tsymvec.num = 1;\n \n+\t/* for CPU crypto the IOVA address is not required */\n+\tiv_ptr.va = rte_crypto_op_ctod_offset(op, void *, IV_OFFSET);\n+\tdigest_ptr.va = (void *)sop->aead.digest.data;\n+\taad_ptr.va = (void *)sop->aead.aad.data;\n+\n \tofs.raw = 0;\n \n \tn = rte_cryptodev_sym_cpu_crypto_process(dev_id, sop->session, ofs,\n@@ -193,11 +197,11 @@ static void\n process_cpu_crypt_auth_op(uint8_t dev_id, struct rte_crypto_op *op)\n {\n \tint32_t n, st;\n-\tvoid *iv;\n \tstruct rte_crypto_sym_op *sop;\n \tunion rte_crypto_sym_ofs ofs;\n \tstruct rte_crypto_sgl sgl;\n \tstruct rte_crypto_sym_vec symvec;\n+\tstruct rte_crypto_va_iova_ptr iv_ptr, digest_ptr;\n \tstruct rte_crypto_vec vec[UINT8_MAX];\n \n \tsop = op->sym;\n@@ -213,13 +217,14 @@ process_cpu_crypt_auth_op(uint8_t dev_id, struct rte_crypto_op *op)\n \tsgl.vec = vec;\n \tsgl.num = n;\n \tsymvec.sgl = &sgl;\n-\tiv = rte_crypto_op_ctod_offset(op, void *, IV_OFFSET);\n-\tsymvec.iv = &iv;\n-\tsymvec.aad = (void **)&sop->aead.aad.data;\n-\tsymvec.digest = (void **)&sop->auth.digest.data;\n+\tsymvec.iv = &iv_ptr;\n+\tsymvec.digest = &digest_ptr;\n \tsymvec.status = &st;\n \tsymvec.num = 1;\n \n+\tiv_ptr.va = rte_crypto_op_ctod_offset(op, void *, IV_OFFSET);\n+\tdigest_ptr.va = (void *)sop->auth.digest.data;\n+\n \tofs.raw = 0;\n \tofs.ofs.cipher.head = sop->cipher.data.offset - sop->auth.data.offset;\n \tofs.ofs.cipher.tail = (sop->auth.data.offset + sop->auth.data.length) -\ndiff --git a/doc/guides/prog_guide/cryptodev_lib.rst b/doc/guides/prog_guide/cryptodev_lib.rst\nindex c14f750fa..e7ba35c2d 100644\n--- a/doc/guides/prog_guide/cryptodev_lib.rst\n+++ b/doc/guides/prog_guide/cryptodev_lib.rst\n@@ -620,7 +620,8 @@ operation descriptor (``struct rte_crypto_sym_vec``) containing:\n descriptors of performed operations (``struct rte_crypto_sgl``). Each instance\n of ``struct rte_crypto_sgl`` consists of a number of segments and a pointer to\n an array of segment descriptors ``struct rte_crypto_vec``;\n-- pointers to arrays of size ``num`` containing IV, AAD and digest information,\n+- pointers to arrays of size ``num`` containing IV, AAD and digest information\n+ in the ``cpu_crypto`` sub-structure,\n - pointer to an array of size ``num`` where status information will be stored\n for each operation.\n \ndiff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst\nindex 8b911488c..2973b2a33 100644\n--- a/doc/guides/rel_notes/release_20_11.rst\n+++ b/doc/guides/rel_notes/release_20_11.rst\n@@ -302,6 +302,9 @@ API Changes\n ``rte_fpga_lte_fec_configure`` and structure ``fpga_lte_fec_conf`` to\n ``rte_fpga_lte_fec_conf``.\n \n+* The structure ``rte_crypto_sym_vec`` is updated to support both\n+ cpu_crypto synchrounous operation and asynchronous raw data-path APIs.\n+\n \n ABI Changes\n -----------\ndiff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c\nindex 1d2a0ce00..973b61bd6 100644\n--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c\n+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c\n@@ -464,9 +464,10 @@ aesni_gcm_sgl_encrypt(struct aesni_gcm_session *s,\n \tprocessed = 0;\n \tfor (i = 0; i < vec->num; ++i) {\n \t\taesni_gcm_process_gcm_sgl_op(s, gdata_ctx,\n-\t\t\t&vec->sgl[i], vec->iv[i], vec->aad[i]);\n+\t\t\t&vec->sgl[i], vec->iv[i].va,\n+\t\t\tvec->aad[i].va);\n \t\tvec->status[i] = aesni_gcm_sgl_op_finalize_encryption(s,\n-\t\t\tgdata_ctx, vec->digest[i]);\n+\t\t\tgdata_ctx, vec->digest[i].va);\n \t\tprocessed += (vec->status[i] == 0);\n \t}\n \n@@ -482,9 +483,10 @@ aesni_gcm_sgl_decrypt(struct aesni_gcm_session *s,\n \tprocessed = 0;\n \tfor (i = 0; i < vec->num; ++i) {\n \t\taesni_gcm_process_gcm_sgl_op(s, gdata_ctx,\n-\t\t\t&vec->sgl[i], vec->iv[i], vec->aad[i]);\n+\t\t\t&vec->sgl[i], vec->iv[i].va,\n+\t\t\tvec->aad[i].va);\n \t\t vec->status[i] = aesni_gcm_sgl_op_finalize_decryption(s,\n-\t\t\tgdata_ctx, vec->digest[i]);\n+\t\t\tgdata_ctx, vec->digest[i].va);\n \t\tprocessed += (vec->status[i] == 0);\n \t}\n \n@@ -505,9 +507,9 @@ aesni_gmac_sgl_generate(struct aesni_gcm_session *s,\n \t\t}\n \n \t\taesni_gcm_process_gmac_sgl_op(s, gdata_ctx,\n-\t\t\t&vec->sgl[i], vec->iv[i]);\n+\t\t\t&vec->sgl[i], vec->iv[i].va);\n \t\tvec->status[i] = aesni_gcm_sgl_op_finalize_encryption(s,\n-\t\t\tgdata_ctx, vec->digest[i]);\n+\t\t\tgdata_ctx, vec->digest[i].va);\n \t\tprocessed += (vec->status[i] == 0);\n \t}\n \n@@ -528,9 +530,9 @@ aesni_gmac_sgl_verify(struct aesni_gcm_session *s,\n \t\t}\n \n \t\taesni_gcm_process_gmac_sgl_op(s, gdata_ctx,\n-\t\t\t&vec->sgl[i], vec->iv[i]);\n+\t\t\t&vec->sgl[i], vec->iv[i].va);\n \t\tvec->status[i] = aesni_gcm_sgl_op_finalize_decryption(s,\n-\t\t\tgdata_ctx, vec->digest[i]);\n+\t\t\tgdata_ctx, vec->digest[i].va);\n \t\tprocessed += (vec->status[i] == 0);\n \t}\n \ndiff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c\nindex 34a39ca99..39f90f537 100644\n--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c\n+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c\n@@ -1877,7 +1877,7 @@ generate_sync_dgst(struct rte_crypto_sym_vec *vec,\n \n \tfor (i = 0, k = 0; i != vec->num; i++) {\n \t\tif (vec->status[i] == 0) {\n-\t\t\tmemcpy(vec->digest[i], dgst[i], len);\n+\t\t\tmemcpy(vec->digest[i].va, dgst[i], len);\n \t\t\tk++;\n \t\t}\n \t}\n@@ -1893,7 +1893,7 @@ verify_sync_dgst(struct rte_crypto_sym_vec *vec,\n \n \tfor (i = 0, k = 0; i != vec->num; i++) {\n \t\tif (vec->status[i] == 0) {\n-\t\t\tif (memcmp(vec->digest[i], dgst[i], len) != 0)\n+\t\t\tif (memcmp(vec->digest[i].va, dgst[i], len) != 0)\n \t\t\t\tvec->status[i] = EBADMSG;\n \t\t\telse\n \t\t\t\tk++;\n@@ -1956,9 +1956,8 @@ aesni_mb_cpu_crypto_process_bulk(struct rte_cryptodev *dev,\n \t\t}\n \n \t\t/* Submit job for processing */\n-\t\tset_cpu_mb_job_params(job, s, sofs, buf, len,\n-\t\t\tvec->iv[i], vec->aad[i], tmp_dgst[i],\n-\t\t\t&vec->status[i]);\n+\t\tset_cpu_mb_job_params(job, s, sofs, buf, len, vec->iv[i].va,\n+\t\t\tvec->aad[i].va, tmp_dgst[i], &vec->status[i]);\n \t\tjob = submit_sync_job(mb_mgr);\n \t\tj++;\n \ndiff --git a/lib/librte_cryptodev/rte_crypto_sym.h b/lib/librte_cryptodev/rte_crypto_sym.h\nindex f29c98051..e1f23d303 100644\n--- a/lib/librte_cryptodev/rte_crypto_sym.h\n+++ b/lib/librte_cryptodev/rte_crypto_sym.h\n@@ -51,26 +51,44 @@ struct rte_crypto_sgl {\n };\n \n /**\n- * Synchronous operation descriptor.\n- * Supposed to be used with CPU crypto API call.\n+ * Crypto virtual and IOVA address descriptor, used to describe cryptographic\n+ * data buffer without the length information. The length information is\n+ * normally predefined during session creation.\n+ */\n+struct rte_crypto_va_iova_ptr {\n+\tvoid *va;\n+\trte_iova_t iova;\n+};\n+\n+/**\n+ * Raw data operation descriptor.\n+ * Supposed to be used with synchronous CPU crypto API call or asynchronous\n+ * RAW data path API call.\n */\n struct rte_crypto_sym_vec {\n+\t/** number of operations to perform */\n+\tuint32_t num;\n \t/** array of SGL vectors */\n \tstruct rte_crypto_sgl *sgl;\n-\t/** array of pointers to IV */\n-\tvoid **iv;\n-\t/** array of pointers to AAD */\n-\tvoid **aad;\n+\t/** array of pointers to cipher IV */\n+\tstruct rte_crypto_va_iova_ptr *iv;\n \t/** array of pointers to digest */\n-\tvoid **digest;\n+\tstruct rte_crypto_va_iova_ptr *digest;\n+\n+\t__extension__\n+\tunion {\n+\t\t/** array of pointers to auth IV, used for chain operation */\n+\t\tstruct rte_crypto_va_iova_ptr *auth_iv;\n+\t\t/** array of pointers to AAD, used for AEAD operation */\n+\t\tstruct rte_crypto_va_iova_ptr *aad;\n+\t};\n+\n \t/**\n \t * array of statuses for each operation:\n-\t * - 0 on success\n-\t * - errno on error\n+\t * - 0 on success\n+\t * - errno on error\n \t */\n \tint32_t *status;\n-\t/** number of operations to perform */\n-\tuint32_t num;\n };\n \n /**\ndiff --git a/lib/librte_ipsec/esp_inb.c b/lib/librte_ipsec/esp_inb.c\nindex 96eec0131..2b1df6a03 100644\n--- a/lib/librte_ipsec/esp_inb.c\n+++ b/lib/librte_ipsec/esp_inb.c\n@@ -693,9 +693,9 @@ cpu_inb_pkt_prepare(const struct rte_ipsec_session *ss,\n \tstruct rte_ipsec_sa *sa;\n \tstruct replay_sqn *rsn;\n \tunion sym_op_data icv;\n-\tvoid *iv[num];\n-\tvoid *aad[num];\n-\tvoid *dgst[num];\n+\tstruct rte_crypto_va_iova_ptr iv[num];\n+\tstruct rte_crypto_va_iova_ptr aad[num];\n+\tstruct rte_crypto_va_iova_ptr dgst[num];\n \tuint32_t dr[num];\n \tuint32_t l4ofs[num];\n \tuint32_t clen[num];\n@@ -720,9 +720,9 @@ cpu_inb_pkt_prepare(const struct rte_ipsec_session *ss,\n \t\t\t\tl4ofs + k, rc, ivbuf[k]);\n \n \t\t\t/* fill iv, digest and aad */\n-\t\t\tiv[k] = ivbuf[k];\n-\t\t\taad[k] = icv.va + sa->icv_len;\n-\t\t\tdgst[k++] = icv.va;\n+\t\t\tiv[k].va = ivbuf[k];\n+\t\t\taad[k].va = icv.va + sa->icv_len;\n+\t\t\tdgst[k++].va = icv.va;\n \t\t} else {\n \t\t\tdr[i - k] = i;\n \t\t\trte_errno = -rc;\ndiff --git a/lib/librte_ipsec/esp_outb.c b/lib/librte_ipsec/esp_outb.c\nindex fb9d5864c..1e181cf2c 100644\n--- a/lib/librte_ipsec/esp_outb.c\n+++ b/lib/librte_ipsec/esp_outb.c\n@@ -449,9 +449,9 @@ cpu_outb_pkt_prepare(const struct rte_ipsec_session *ss,\n \tuint32_t i, k, n;\n \tuint32_t l2, l3;\n \tunion sym_op_data icv;\n-\tvoid *iv[num];\n-\tvoid *aad[num];\n-\tvoid *dgst[num];\n+\tstruct rte_crypto_va_iova_ptr iv[num];\n+\tstruct rte_crypto_va_iova_ptr aad[num];\n+\tstruct rte_crypto_va_iova_ptr dgst[num];\n \tuint32_t dr[num];\n \tuint32_t l4ofs[num];\n \tuint32_t clen[num];\n@@ -488,9 +488,9 @@ cpu_outb_pkt_prepare(const struct rte_ipsec_session *ss,\n \t\t\t\tivbuf[k]);\n \n \t\t\t/* fill iv, digest and aad */\n-\t\t\tiv[k] = ivbuf[k];\n-\t\t\taad[k] = icv.va + sa->icv_len;\n-\t\t\tdgst[k++] = icv.va;\n+\t\t\tiv[k].va = ivbuf[k];\n+\t\t\taad[k].va = icv.va + sa->icv_len;\n+\t\t\tdgst[k++].va = icv.va;\n \t\t} else {\n \t\t\tdr[i - k] = i;\n \t\t\trte_errno = -rc;\ndiff --git a/lib/librte_ipsec/misc.h b/lib/librte_ipsec/misc.h\nindex 1b543ed87..79b9a2076 100644\n--- a/lib/librte_ipsec/misc.h\n+++ b/lib/librte_ipsec/misc.h\n@@ -112,7 +112,9 @@ mbuf_cut_seg_ofs(struct rte_mbuf *mb, struct rte_mbuf *ms, uint32_t ofs,\n static inline void\n cpu_crypto_bulk(const struct rte_ipsec_session *ss,\n \tunion rte_crypto_sym_ofs ofs, struct rte_mbuf *mb[],\n-\tvoid *iv[], void *aad[], void *dgst[], uint32_t l4ofs[],\n+\tstruct rte_crypto_va_iova_ptr iv[],\n+\tstruct rte_crypto_va_iova_ptr aad[],\n+\tstruct rte_crypto_va_iova_ptr dgst[], uint32_t l4ofs[],\n \tuint32_t clen[], uint32_t num)\n {\n \tuint32_t i, j, n;\n@@ -136,8 +138,8 @@ cpu_crypto_bulk(const struct rte_ipsec_session *ss,\n \t\t\t/* fill the request structure */\n \t\t\tsymvec.sgl = &vecpkt[j];\n \t\t\tsymvec.iv = &iv[j];\n-\t\t\tsymvec.aad = &aad[j];\n \t\t\tsymvec.digest = &dgst[j];\n+\t\t\tsymvec.aad = &aad[j];\n \t\t\tsymvec.status = &st[j];\n \t\t\tsymvec.num = i - j;\n \n", "prefixes": [ "v12", "1/4" ] }