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GET /api/patches/79950/?format=api
{ "id": 79950, "url": "http://patches.dpdk.org/api/patches/79950/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201007163023.2817-10-bruce.richardson@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201007163023.2817-10-bruce.richardson@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201007163023.2817-10-bruce.richardson@intel.com", "date": "2020-10-07T16:30:07", "name": "[v5,09/25] raw/ioat: make the HW register spec private", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "29fc3179ed955e4f9b7be9df9778218a43bdafc3", "submitter": { "id": 20, "url": "http://patches.dpdk.org/api/people/20/?format=api", "name": "Bruce Richardson", "email": "bruce.richardson@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201007163023.2817-10-bruce.richardson@intel.com/mbox/", "series": [ { "id": 12759, "url": "http://patches.dpdk.org/api/series/12759/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12759", "date": "2020-10-07T16:30:01", "name": "raw/ioat: enhancements and new hardware support", "version": 5, "mbox": "http://patches.dpdk.org/series/12759/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/79950/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/79950/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 16BCDA04BA;\n\tWed, 7 Oct 2020 18:51:57 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 1E7741BCC5;\n\tWed, 7 Oct 2020 18:47:38 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by dpdk.org (Postfix) with ESMTP id 847B71BCC5\n for <dev@dpdk.org>; Wed, 7 Oct 2020 18:47:27 +0200 (CEST)", "from orsmga007.jf.intel.com ([10.7.209.58])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 Oct 2020 09:31:06 -0700", "from silpixa00399126.ir.intel.com ([10.237.222.4])\n by orsmga007.jf.intel.com with ESMTP; 07 Oct 2020 09:31:04 -0700" ], "IronPort-SDR": [ "\n hXHcKZI9Eqaj6dy0nUtWv/epnoTC4q3esjrzZisV9eqwJirO7fS3rAkiOn40D9gpJWNKilwdbR\n +EAT0h+pwVQw==", "\n 4uW2djgyhMGiMGqhDzoIoH7ZuGnm55fQHGC12ouWi84vSMAPiQccoCm63GSE+YsrMX/Lp16E2H\n ynBVwxZWxuZw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9767\"; a=\"164242873\"", "E=Sophos;i=\"5.77,347,1596524400\"; d=\"scan'208\";a=\"164242873\"", "E=Sophos;i=\"5.77,347,1596524400\"; d=\"scan'208\";a=\"354965874\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Bruce Richardson <bruce.richardson@intel.com>", "To": "dev@dpdk.org", "Cc": "patrick.fu@intel.com, thomas@monjalon.net,\n Bruce Richardson <bruce.richardson@intel.com>,\n Kevin Laatz <kevin.laatz@intel.com>, Radu Nicolau <radu.nicolau@intel.com>", "Date": "Wed, 7 Oct 2020 17:30:07 +0100", "Message-Id": "<20201007163023.2817-10-bruce.richardson@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20201007163023.2817-1-bruce.richardson@intel.com>", "References": "<20200721095140.719297-1-bruce.richardson@intel.com>\n <20201007163023.2817-1-bruce.richardson@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v5 09/25] raw/ioat: make the HW register spec\n\tprivate", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Only a few definitions from the hardware spec are actually used in the\ndriver runtime, so we can copy over those few and make the rest of the spec\na private header in the driver.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\nReviewed-by: Kevin Laatz <kevin.laatz@intel.com>\nAcked-by: Radu Nicolau <radu.nicolau@intel.com>\n---\n drivers/raw/ioat/ioat_rawdev.c | 3 ++\n .../raw/ioat/{rte_ioat_spec.h => ioat_spec.h} | 26 -----------\n drivers/raw/ioat/meson.build | 3 +-\n drivers/raw/ioat/rte_ioat_rawdev_fns.h | 43 +++++++++++++++++--\n 4 files changed, 44 insertions(+), 31 deletions(-)\n rename drivers/raw/ioat/{rte_ioat_spec.h => ioat_spec.h} (91%)", "diff": "diff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c\nindex ea9f51ffc..aa59b731f 100644\n--- a/drivers/raw/ioat/ioat_rawdev.c\n+++ b/drivers/raw/ioat/ioat_rawdev.c\n@@ -4,10 +4,12 @@\n \n #include <rte_cycles.h>\n #include <rte_bus_pci.h>\n+#include <rte_memzone.h>\n #include <rte_string_fns.h>\n #include <rte_rawdev_pmd.h>\n \n #include \"rte_ioat_rawdev.h\"\n+#include \"ioat_spec.h\"\n \n static struct rte_pci_driver ioat_pmd_drv;\n \n@@ -268,6 +270,7 @@ ioat_rawdev_create(const char *name, struct rte_pci_device *dev)\n \tioat->rawdev = rawdev;\n \tioat->mz = mz;\n \tioat->regs = dev->mem_resource[0].addr;\n+\tioat->doorbell = &ioat->regs->dmacount;\n \tioat->ring_size = 0;\n \tioat->desc_ring = NULL;\n \tioat->status_addr = ioat->mz->iova +\ndiff --git a/drivers/raw/ioat/rte_ioat_spec.h b/drivers/raw/ioat/ioat_spec.h\nsimilarity index 91%\nrename from drivers/raw/ioat/rte_ioat_spec.h\nrename to drivers/raw/ioat/ioat_spec.h\nindex c6e7929b2..9645e16d4 100644\n--- a/drivers/raw/ioat/rte_ioat_spec.h\n+++ b/drivers/raw/ioat/ioat_spec.h\n@@ -86,32 +86,6 @@ struct rte_ioat_registers {\n \n #define RTE_IOAT_CHANCMP_ALIGN\t\t\t8\t/* CHANCMP address must be 64-bit aligned */\n \n-struct rte_ioat_generic_hw_desc {\n-\tuint32_t size;\n-\tunion {\n-\t\tuint32_t control_raw;\n-\t\tstruct {\n-\t\t\tuint32_t int_enable: 1;\n-\t\t\tuint32_t src_snoop_disable: 1;\n-\t\t\tuint32_t dest_snoop_disable: 1;\n-\t\t\tuint32_t completion_update: 1;\n-\t\t\tuint32_t fence: 1;\n-\t\t\tuint32_t reserved2: 1;\n-\t\t\tuint32_t src_page_break: 1;\n-\t\t\tuint32_t dest_page_break: 1;\n-\t\t\tuint32_t bundle: 1;\n-\t\t\tuint32_t dest_dca: 1;\n-\t\t\tuint32_t hint: 1;\n-\t\t\tuint32_t reserved: 13;\n-\t\t\tuint32_t op: 8;\n-\t\t} control;\n-\t} u;\n-\tuint64_t src_addr;\n-\tuint64_t dest_addr;\n-\tuint64_t next;\n-\tuint64_t op_specific[4];\n-};\n-\n struct rte_ioat_dma_hw_desc {\n \tuint32_t size;\n \tunion {\ndiff --git a/drivers/raw/ioat/meson.build b/drivers/raw/ioat/meson.build\nindex f66e9b605..06636f8a9 100644\n--- a/drivers/raw/ioat/meson.build\n+++ b/drivers/raw/ioat/meson.build\n@@ -8,5 +8,4 @@ sources = files('ioat_rawdev.c',\n deps += ['rawdev', 'bus_pci', 'mbuf']\n \n install_headers('rte_ioat_rawdev.h',\n-\t\t'rte_ioat_rawdev_fns.h',\n-\t\t'rte_ioat_spec.h')\n+\t\t'rte_ioat_rawdev_fns.h')\ndiff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h\nindex 466721a23..c6e0b9a58 100644\n--- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h\n+++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h\n@@ -8,7 +8,36 @@\n #include <rte_rawdev.h>\n #include <rte_memzone.h>\n #include <rte_prefetch.h>\n-#include \"rte_ioat_spec.h\"\n+\n+/**\n+ * @internal\n+ * Structure representing a device descriptor\n+ */\n+struct rte_ioat_generic_hw_desc {\n+\tuint32_t size;\n+\tunion {\n+\t\tuint32_t control_raw;\n+\t\tstruct {\n+\t\t\tuint32_t int_enable: 1;\n+\t\t\tuint32_t src_snoop_disable: 1;\n+\t\t\tuint32_t dest_snoop_disable: 1;\n+\t\t\tuint32_t completion_update: 1;\n+\t\t\tuint32_t fence: 1;\n+\t\t\tuint32_t reserved2: 1;\n+\t\t\tuint32_t src_page_break: 1;\n+\t\t\tuint32_t dest_page_break: 1;\n+\t\t\tuint32_t bundle: 1;\n+\t\t\tuint32_t dest_dca: 1;\n+\t\t\tuint32_t hint: 1;\n+\t\t\tuint32_t reserved: 13;\n+\t\t\tuint32_t op: 8;\n+\t\t} control;\n+\t} u;\n+\tuint64_t src_addr;\n+\tuint64_t dest_addr;\n+\tuint64_t next;\n+\tuint64_t op_specific[4];\n+};\n \n /**\n * @internal\n@@ -19,7 +48,7 @@ struct rte_ioat_rawdev {\n \tconst struct rte_memzone *mz;\n \tconst struct rte_memzone *desc_mz;\n \n-\tvolatile struct rte_ioat_registers *regs;\n+\tvolatile uint16_t *doorbell;\n \tphys_addr_t status_addr;\n \tphys_addr_t ring_addr;\n \n@@ -40,8 +69,16 @@ struct rte_ioat_rawdev {\n \n \t/* to report completions, the device will write status back here */\n \tvolatile uint64_t status __rte_cache_aligned;\n+\n+\t/* pointer to the register bar */\n+\tvolatile struct rte_ioat_registers *regs;\n };\n \n+#define RTE_IOAT_CHANSTS_IDLE\t\t\t0x1\n+#define RTE_IOAT_CHANSTS_SUSPENDED\t\t0x2\n+#define RTE_IOAT_CHANSTS_HALTED\t\t\t0x3\n+#define RTE_IOAT_CHANSTS_ARMED\t\t\t0x4\n+\n /*\n * Enqueue a copy operation onto the ioat device\n */\n@@ -109,7 +146,7 @@ rte_ioat_perform_ops(int dev_id)\n \tioat->desc_ring[(ioat->next_write - 1) & (ioat->ring_size - 1)].u\n \t\t\t.control.completion_update = 1;\n \trte_compiler_barrier();\n-\tioat->regs->dmacount = ioat->next_write;\n+\t*ioat->doorbell = ioat->next_write;\n \tioat->started = ioat->enqueued;\n }\n \n", "prefixes": [ "v5", "09/25" ] }