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GET /api/patches/77637/?format=api
http://patches.dpdk.org/api/patches/77637/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200914161801.572174-5-thomas@monjalon.net/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200914161801.572174-5-thomas@monjalon.net>", "list_archive_url": "https://inbox.dpdk.org/dev/20200914161801.572174-5-thomas@monjalon.net", "date": "2020-09-14T16:18:00", "name": "[4/4] mbuf: remove physical address alias", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "fa91389694b0856af703089159b5eb040824871a", "submitter": { "id": 685, "url": "http://patches.dpdk.org/api/people/685/?format=api", "name": "Thomas Monjalon", "email": "thomas@monjalon.net" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200914161801.572174-5-thomas@monjalon.net/mbox/", "series": [ { "id": 12203, "url": "http://patches.dpdk.org/api/series/12203/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12203", "date": "2020-09-14T16:17:56", "name": "remove aliases replaced with IOVA", "version": 1, "mbox": "http://patches.dpdk.org/series/12203/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/77637/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/77637/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 12A8AA04C7;\n\tMon, 14 Sep 2020 18:18:54 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A868F1C10F;\n\tMon, 14 Sep 2020 18:18:31 +0200 (CEST)", "from new3-smtp.messagingengine.com (new3-smtp.messagingengine.com\n [66.111.4.229]) by dpdk.org (Postfix) with ESMTP id 4587C1C0CD\n for <dev@dpdk.org>; Mon, 14 Sep 2020 18:18:30 +0200 (CEST)", "from compute7.internal (compute7.nyi.internal [10.202.2.47])\n by mailnew.nyi.internal (Postfix) with ESMTP id D8B5C58021A;\n Mon, 14 Sep 2020 12:18:29 -0400 (EDT)", "from mailfrontend1 ([10.202.2.162])\n by compute7.internal (MEProxy); Mon, 14 Sep 2020 12:18:29 -0400", "from xps.monjalon.net (184.203.134.77.rev.sfr.net [77.134.203.184])\n by mail.messagingengine.com (Postfix) with ESMTPA id 1F514328005E;\n Mon, 14 Sep 2020 12:18:28 -0400 (EDT)" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding; s=fm2; bh=jQr1++3t1i3oH\n etFCL4u0fDUTUeADBqQj/ABHC/8X8s=; b=RWK6fZ/e1IO67C16zo0k/hptyNt7j\n JefIYoQRo7yvG5D5+bqlYK6PYa5xMq2hNsdU3CuW+av1qVqUVbpoIcqAy/nD0pu5\n vudZEhX97vNDe75xK+Vdf/h0hP3TKFMkZf1KRwxFqvU8wp+clQ8YpjZ1ZeRVDnbb\n oXE/7oMoGpZYELofZJzjXrJI7HDZRXtbMiLFJ/MNVRqEH3jBOj+La6JA1ouLwpHt\n QozjSP+/cQN9P3yKLrjuE7hZCfjkYB2a5FWlWjSMUYRHljmythp7Xq3tSegIH3Hr\n 9LLYth0VG3dPwdlQReajadBmjaBQallX6Heb7gaSMI7R0j4L3I7bI/mgA==", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n messagingengine.com; h=cc:content-transfer-encoding:date:from\n :in-reply-to:message-id:mime-version:references:subject:to\n :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=\n fm3; bh=jQr1++3t1i3oHetFCL4u0fDUTUeADBqQj/ABHC/8X8s=; b=FVMJwUJt\n rQ6U4JLJAcivoiXLD/7XYXdA62ooCJC6GU+/nJOB0/sE0sy6EiR/PZXd+Q3ONNzn\n coNNA7TGmzGSWVha4kbxNvvItbtDNaUhuaXY/mahFSc55DvQonc10z3ssjmevxFG\n untTkJigArOmk7swmrCy8Mo9ypTifhztIh8tK89Bz54H1zemk6JhHUjb0SsqZ3MH\n lWGdmY24cs3B4AwWsHeaHTuolsswU02kCUvDkdbMyzPgt+5DvqkY7e0djSuAkjnx\n cpUobXFrmYmX9ALp+0jpXURz5X5GaVzEfMc9q5h2xAvPKEsKk4+0EzK4Tl5svWTd\n FAH5QldbY1/c0w==" ], "X-ME-Sender": "<xms:1ZdfX1ax84wqBRFzypSLACKSfoweinDpk3kkoYTDTL6FZTGProDsAg>\n <xme:1ZdfX8bhU0zE2nV4FIdYBzpTQRhpSYUdeTJ3NyuNYIWjvPTbbhSPKJ1FbdrPsFZ6f\n PEBBlDA9fhaOz3cIA>", "X-ME-Proxy-Cause": "\n gggruggvucftvghtrhhoucdtuddrgeduiedrudeiiedguddtudcutefuodetggdotefrod\n ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh\n necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd\n enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepvfhhohhm\n rghsucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenuc\n ggtffrrghtthgvrhhnpedvhefgiedvjeegtdevheefhfetleefgfeivefgffevfeejgedt\n gfeutdehtdegveenucfkphepjeejrddufeegrddvtdefrddukeegnecuvehluhhsthgvrh\n fuihiivgepvdenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgr\n lhhonhdrnhgvth", "X-ME-Proxy": "<xmx:1ZdfX39dd6rcavIORRmxIWL_PGVrDBWdJruwoyYMJNdsBEi3TZIMoA>\n <xmx:1ZdfXzpVymrE6RsLvrR83UFSKY7DEgegDlOl8T0BCZTArZezrii9DA>\n <xmx:1ZdfXwoqdFoi51o_29TgJ3y8AEsSMFOcnam8axGchPaUUV9zr9zxxg>\n <xmx:1ZdfX1ReXHJrixPDm9zBf6vgTq3qtNxZwOWfWvRJbtBW7eZMix1ibw>", "From": "Thomas Monjalon <thomas@monjalon.net>", "To": "dev@dpdk.org", "Cc": "mdr@ashroe.eu, david.marchand@redhat.com,\n Neil Horman <nhorman@tuxdriver.com>,\n John McNamara <john.mcnamara@intel.com>,\n Marko Kovacevic <marko.kovacevic@intel.com>,\n Anoob Joseph <anoobj@marvell.com>, Beilei Xing <beilei.xing@intel.com>,\n Jeff Guo <jia.guo@intel.com>, Jingjing Wu <jingjing.wu@intel.com>,\n Qiming Yang <qiming.yang@intel.com>, Qi Zhang <qi.z.zhang@intel.com>,\n Ferruh Yigit <ferruh.yigit@intel.com>,\n Olivier Matz <olivier.matz@6wind.com>", "Date": "Mon, 14 Sep 2020 18:18:00 +0200", "Message-Id": "<20200914161801.572174-5-thomas@monjalon.net>", "X-Mailer": "git-send-email 2.28.0", "In-Reply-To": "<20200914161801.572174-1-thomas@monjalon.net>", "References": "<20200914161801.572174-1-thomas@monjalon.net>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 4/4] mbuf: remove physical address alias", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Remove the deprecated buf_physaddr union field from rte_mbuf.\nIt is replaced with buf_iova which is at the same offset.\n\nThe single field buf_physaddr in rte_kni_mbuf is also renamed.\n\nThis concludes a 3-year process of semantic change.\n\nSigned-off-by: Thomas Monjalon <thomas@monjalon.net>\n---\n doc/guides/rel_notes/deprecation.rst | 2 --\n doc/guides/rel_notes/release_20_11.rst | 3 +++\n drivers/common/cpt/cpt_ucode.h | 2 +-\n drivers/net/i40e/i40e_rxtx_vec_avx2.c | 18 +++++++++---------\n drivers/net/iavf/iavf_rxtx_vec_avx2.c | 18 +++++++++---------\n drivers/net/ice/ice_rxtx_vec_avx2.c | 18 +++++++++---------\n kernel/linux/kni/kni_net.c | 6 +++---\n lib/librte_eal/linux/include/rte_kni_common.h | 2 +-\n lib/librte_mbuf/rte_mbuf_core.h | 6 +-----\n 9 files changed, 36 insertions(+), 39 deletions(-)", "diff": "diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst\nindex 52168f7751..143b7694a5 100644\n--- a/doc/guides/rel_notes/deprecation.rst\n+++ b/doc/guides/rel_notes/deprecation.rst\n@@ -148,8 +148,6 @@ Deprecation Notices\n avoiding impact on vectorized implementation of the driver datapaths,\n while evaluating performance gains of a better use of the first cache line.\n \n- The deprecated unioned field ``buf_physaddr`` will be removed in DPDK 20.11.\n-\n * ethdev: Split the ``struct eth_dev_ops`` struct to hide it as much as possible\n will be done in 20.11.\n Currently the ``struct eth_dev_ops`` struct is accessible by the application\ndiff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst\nindex b729bdf200..64348ad2c8 100644\n--- a/doc/guides/rel_notes/release_20_11.rst\n+++ b/doc/guides/rel_notes/release_20_11.rst\n@@ -88,6 +88,9 @@ API Changes\n the structures ``rte_mbuf`` and ``rte_mbuf_ext_shared_info``.\n The field ``refcnt`` is remaining from the old unions.\n \n+* mbuf: Removed the unioned field ``buf_physaddr`` from ``rte_mbuf``.\n+ The field ``buf_iova`` is remaining from the old union.\n+\n * rawdev: Added a structure size parameter to the functions\n ``rte_rawdev_queue_setup()``, ``rte_rawdev_queue_conf_get()``,\n ``rte_rawdev_info_get()`` and ``rte_rawdev_configure()``,\ndiff --git a/drivers/common/cpt/cpt_ucode.h b/drivers/common/cpt/cpt_ucode.h\nindex 4e79fbf7a5..763355fb1f 100644\n--- a/drivers/common/cpt/cpt_ucode.h\n+++ b/drivers/common/cpt/cpt_ucode.h\n@@ -2862,7 +2862,7 @@ alloc_op_meta(struct rte_mbuf *m_src,\n \t\ttailroom = rte_pktmbuf_tailroom(m_src);\n \t\tif (likely(tailroom > len + 8)) {\n \t\t\tmdata = (uint8_t *)m_src->buf_addr + m_src->buf_len;\n-\t\t\tmphys = m_src->buf_physaddr + m_src->buf_len;\n+\t\t\tmphys = m_src->buf_iova + m_src->buf_len;\n \t\t\tmdata -= len;\n \t\t\tmphys -= len;\n \t\t\tbuf->vaddr = mdata;\ndiff --git a/drivers/net/i40e/i40e_rxtx_vec_avx2.c b/drivers/net/i40e/i40e_rxtx_vec_avx2.c\nindex 3bcef13638..37e7db5d7e 100644\n--- a/drivers/net/i40e/i40e_rxtx_vec_avx2.c\n+++ b/drivers/net/i40e/i40e_rxtx_vec_avx2.c\n@@ -59,8 +59,8 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)\n \t\tmb0 = rxep[0].mbuf;\n \t\tmb1 = rxep[1].mbuf;\n \n-\t\t/* load buf_addr(lo 64bit) and buf_physaddr(hi 64bit) */\n-\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_physaddr) !=\n+\t\t/* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */\n+\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=\n \t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n \t\tvaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n \t\tvaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n@@ -92,8 +92,8 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)\n \t\tmb2 = rxep[2].mbuf;\n \t\tmb3 = rxep[3].mbuf;\n \n-\t\t/* load buf_addr(lo 64bit) and buf_physaddr(hi 64bit) */\n-\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_physaddr) !=\n+\t\t/* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */\n+\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=\n \t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n \t\tvaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n \t\tvaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n@@ -814,7 +814,7 @@ vtx1(volatile struct i40e_tx_desc *txdp,\n \t\t\t((uint64_t)pkt->data_len << I40E_TXD_QW1_TX_BUF_SZ_SHIFT));\n \n \t__m128i descriptor = _mm_set_epi64x(high_qw,\n-\t\t\t\tpkt->buf_physaddr + pkt->data_off);\n+\t\t\t\tpkt->buf_iova + pkt->data_off);\n \t_mm_store_si128((__m128i *)txdp, descriptor);\n }\n \n@@ -843,11 +843,11 @@ vtx(volatile struct i40e_tx_desc *txdp,\n \t\t\t\t((uint64_t)pkt[0]->data_len << I40E_TXD_QW1_TX_BUF_SZ_SHIFT);\n \n \t\t__m256i desc2_3 = _mm256_set_epi64x(\n-\t\t\t\thi_qw3, pkt[3]->buf_physaddr + pkt[3]->data_off,\n-\t\t\t\thi_qw2, pkt[2]->buf_physaddr + pkt[2]->data_off);\n+\t\t\t\thi_qw3, pkt[3]->buf_iova + pkt[3]->data_off,\n+\t\t\t\thi_qw2, pkt[2]->buf_iova + pkt[2]->data_off);\n \t\t__m256i desc0_1 = _mm256_set_epi64x(\n-\t\t\t\thi_qw1, pkt[1]->buf_physaddr + pkt[1]->data_off,\n-\t\t\t\thi_qw0, pkt[0]->buf_physaddr + pkt[0]->data_off);\n+\t\t\t\thi_qw1, pkt[1]->buf_iova + pkt[1]->data_off,\n+\t\t\t\thi_qw0, pkt[0]->buf_iova + pkt[0]->data_off);\n \t\t_mm256_store_si256((void *)(txdp + 2), desc2_3);\n \t\t_mm256_store_si256((void *)txdp, desc0_1);\n \t}\ndiff --git a/drivers/net/iavf/iavf_rxtx_vec_avx2.c b/drivers/net/iavf/iavf_rxtx_vec_avx2.c\nindex e5e0fd3095..8f28afc8c5 100644\n--- a/drivers/net/iavf/iavf_rxtx_vec_avx2.c\n+++ b/drivers/net/iavf/iavf_rxtx_vec_avx2.c\n@@ -52,8 +52,8 @@ iavf_rxq_rearm(struct iavf_rx_queue *rxq)\n \t\tmb0 = rxp[0];\n \t\tmb1 = rxp[1];\n \n-\t\t/* load buf_addr(lo 64bit) and buf_physaddr(hi 64bit) */\n-\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_physaddr) !=\n+\t\t/* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */\n+\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=\n \t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n \t\tvaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n \t\tvaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n@@ -85,8 +85,8 @@ iavf_rxq_rearm(struct iavf_rx_queue *rxq)\n \t\tmb2 = rxp[2];\n \t\tmb3 = rxp[3];\n \n-\t\t/* load buf_addr(lo 64bit) and buf_physaddr(hi 64bit) */\n-\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_physaddr) !=\n+\t\t/* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */\n+\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=\n \t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n \t\tvaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n \t\tvaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n@@ -1391,7 +1391,7 @@ iavf_vtx1(volatile struct iavf_tx_desc *txdp,\n \t\t ((uint64_t)pkt->data_len << IAVF_TXD_QW1_TX_BUF_SZ_SHIFT));\n \n \t__m128i descriptor = _mm_set_epi64x(high_qw,\n-\t\t\t\tpkt->buf_physaddr + pkt->data_off);\n+\t\t\t\tpkt->buf_iova + pkt->data_off);\n \t_mm_store_si128((__m128i *)txdp, descriptor);\n }\n \n@@ -1430,15 +1430,15 @@ iavf_vtx(volatile struct iavf_tx_desc *txdp,\n \t\t__m256i desc2_3 =\n \t\t\t_mm256_set_epi64x\n \t\t\t\t(hi_qw3,\n-\t\t\t\t pkt[3]->buf_physaddr + pkt[3]->data_off,\n+\t\t\t\t pkt[3]->buf_iova + pkt[3]->data_off,\n \t\t\t\t hi_qw2,\n-\t\t\t\t pkt[2]->buf_physaddr + pkt[2]->data_off);\n+\t\t\t\t pkt[2]->buf_iova + pkt[2]->data_off);\n \t\t__m256i desc0_1 =\n \t\t\t_mm256_set_epi64x\n \t\t\t\t(hi_qw1,\n-\t\t\t\t pkt[1]->buf_physaddr + pkt[1]->data_off,\n+\t\t\t\t pkt[1]->buf_iova + pkt[1]->data_off,\n \t\t\t\t hi_qw0,\n-\t\t\t\t pkt[0]->buf_physaddr + pkt[0]->data_off);\n+\t\t\t\t pkt[0]->buf_iova + pkt[0]->data_off);\n \t\t_mm256_store_si256((void *)(txdp + 2), desc2_3);\n \t\t_mm256_store_si256((void *)txdp, desc0_1);\n \t}\ndiff --git a/drivers/net/ice/ice_rxtx_vec_avx2.c b/drivers/net/ice/ice_rxtx_vec_avx2.c\nindex be50677c2f..b653805160 100644\n--- a/drivers/net/ice/ice_rxtx_vec_avx2.c\n+++ b/drivers/net/ice/ice_rxtx_vec_avx2.c\n@@ -52,8 +52,8 @@ ice_rxq_rearm(struct ice_rx_queue *rxq)\n \t\tmb0 = rxep[0].mbuf;\n \t\tmb1 = rxep[1].mbuf;\n \n-\t\t/* load buf_addr(lo 64bit) and buf_physaddr(hi 64bit) */\n-\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_physaddr) !=\n+\t\t/* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */\n+\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=\n \t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n \t\tvaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n \t\tvaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n@@ -85,8 +85,8 @@ ice_rxq_rearm(struct ice_rx_queue *rxq)\n \t\tmb2 = rxep[2].mbuf;\n \t\tmb3 = rxep[3].mbuf;\n \n-\t\t/* load buf_addr(lo 64bit) and buf_physaddr(hi 64bit) */\n-\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_physaddr) !=\n+\t\t/* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */\n+\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=\n \t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n \t\tvaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n \t\tvaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n@@ -689,7 +689,7 @@ ice_vtx1(volatile struct ice_tx_desc *txdp,\n \t\t ((uint64_t)pkt->data_len << ICE_TXD_QW1_TX_BUF_SZ_S));\n \n \t__m128i descriptor = _mm_set_epi64x(high_qw,\n-\t\t\t\tpkt->buf_physaddr + pkt->data_off);\n+\t\t\t\tpkt->buf_iova + pkt->data_off);\n \t_mm_store_si128((__m128i *)txdp, descriptor);\n }\n \n@@ -728,15 +728,15 @@ ice_vtx(volatile struct ice_tx_desc *txdp,\n \t\t__m256i desc2_3 =\n \t\t\t_mm256_set_epi64x\n \t\t\t\t(hi_qw3,\n-\t\t\t\t pkt[3]->buf_physaddr + pkt[3]->data_off,\n+\t\t\t\t pkt[3]->buf_iova + pkt[3]->data_off,\n \t\t\t\t hi_qw2,\n-\t\t\t\t pkt[2]->buf_physaddr + pkt[2]->data_off);\n+\t\t\t\t pkt[2]->buf_iova + pkt[2]->data_off);\n \t\t__m256i desc0_1 =\n \t\t\t_mm256_set_epi64x\n \t\t\t\t(hi_qw1,\n-\t\t\t\t pkt[1]->buf_physaddr + pkt[1]->data_off,\n+\t\t\t\t pkt[1]->buf_iova + pkt[1]->data_off,\n \t\t\t\t hi_qw0,\n-\t\t\t\t pkt[0]->buf_physaddr + pkt[0]->data_off);\n+\t\t\t\t pkt[0]->buf_iova + pkt[0]->data_off);\n \t\t_mm256_store_si256((void *)(txdp + 2), desc2_3);\n \t\t_mm256_store_si256((void *)txdp, desc0_1);\n \t}\ndiff --git a/kernel/linux/kni/kni_net.c b/kernel/linux/kni/kni_net.c\nindex c82c881a2c..4b752083da 100644\n--- a/kernel/linux/kni/kni_net.c\n+++ b/kernel/linux/kni/kni_net.c\n@@ -47,7 +47,7 @@ iova2kva(struct kni_dev *kni, void *iova)\n static inline void *\n iova2data_kva(struct kni_dev *kni, struct rte_kni_mbuf *m)\n {\n-\treturn phys_to_virt(iova_to_phys(kni->usr_tsk, m->buf_physaddr) +\n+\treturn phys_to_virt(iova_to_phys(kni->usr_tsk, m->buf_iova) +\n \t\t\t m->data_off);\n }\n #endif\n@@ -67,7 +67,7 @@ pa2va(void *pa, struct rte_kni_mbuf *m)\n \n \tva = (void *)((unsigned long)pa +\n \t\t\t(unsigned long)m->buf_addr -\n-\t\t\t(unsigned long)m->buf_physaddr);\n+\t\t\t(unsigned long)m->buf_iova);\n \treturn va;\n }\n \n@@ -75,7 +75,7 @@ pa2va(void *pa, struct rte_kni_mbuf *m)\n static void *\n kva2data_kva(struct rte_kni_mbuf *m)\n {\n-\treturn phys_to_virt(m->buf_physaddr + m->data_off);\n+\treturn phys_to_virt(m->buf_iova + m->data_off);\n }\n \n static inline void *\ndiff --git a/lib/librte_eal/linux/include/rte_kni_common.h b/lib/librte_eal/linux/include/rte_kni_common.h\nindex 7313ef504e..21b477f0aa 100644\n--- a/lib/librte_eal/linux/include/rte_kni_common.h\n+++ b/lib/librte_eal/linux/include/rte_kni_common.h\n@@ -75,7 +75,7 @@ struct rte_kni_fifo {\n */\n struct rte_kni_mbuf {\n \tvoid *buf_addr __attribute__((__aligned__(RTE_CACHE_LINE_SIZE)));\n-\tuint64_t buf_physaddr;\n+\tuint64_t buf_iova;\n \tuint16_t data_off; /**< Start address of data in segment buffer. */\n \tchar pad1[2];\n \tuint16_t nb_segs; /**< Number of segments. */\ndiff --git a/lib/librte_mbuf/rte_mbuf_core.h b/lib/librte_mbuf/rte_mbuf_core.h\nindex cee3d5aff5..8c2c20644d 100644\n--- a/lib/librte_mbuf/rte_mbuf_core.h\n+++ b/lib/librte_mbuf/rte_mbuf_core.h\n@@ -476,11 +476,7 @@ struct rte_mbuf {\n \t * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes\n \t * working on vector drivers easier.\n \t */\n-\tRTE_STD_C11\n-\tunion {\n-\t\trte_iova_t buf_iova;\n-\t\trte_iova_t buf_physaddr; /**< deprecated */\n-\t} __rte_aligned(sizeof(rte_iova_t));\n+\trte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));\n \n \t/* next 8 bytes are initialised on RX descriptor rearm */\n \tRTE_MARKER64 rearm_data;\n", "prefixes": [ "4/4" ] }{ "id": 77637, "url": "