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GET /api/patches/77634/?format=api
{ "id": 77634, "url": "http://patches.dpdk.org/api/patches/77634/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200914161801.572174-2-thomas@monjalon.net/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200914161801.572174-2-thomas@monjalon.net>", "list_archive_url": "https://inbox.dpdk.org/dev/20200914161801.572174-2-thomas@monjalon.net", "date": "2020-09-14T16:17:57", "name": "[1/4] mem: remove physical address aliases", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "3e26a73e0772ccec86a05b1c3879a36a3e7df0be", "submitter": { "id": 685, "url": "http://patches.dpdk.org/api/people/685/?format=api", "name": "Thomas Monjalon", "email": "thomas@monjalon.net" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200914161801.572174-2-thomas@monjalon.net/mbox/", "series": [ { "id": 12203, "url": "http://patches.dpdk.org/api/series/12203/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12203", "date": "2020-09-14T16:17:56", "name": "remove aliases replaced with IOVA", "version": 1, "mbox": "http://patches.dpdk.org/series/12203/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/77634/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/77634/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F21D1A04C7;\n\tMon, 14 Sep 2020 18:18:18 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 058D71BFC5;\n\tMon, 14 Sep 2020 18:18:18 +0200 (CEST)", "from new3-smtp.messagingengine.com (new3-smtp.messagingengine.com\n [66.111.4.229]) by dpdk.org (Postfix) with ESMTP id CC0CB1BFC4\n for <dev@dpdk.org>; Mon, 14 Sep 2020 18:18:16 +0200 (CEST)", "from compute7.internal (compute7.nyi.internal [10.202.2.47])\n by mailnew.nyi.internal (Postfix) with ESMTP id 41D29580206;\n Mon, 14 Sep 2020 12:18:16 -0400 (EDT)", "from mailfrontend1 ([10.202.2.162])\n by compute7.internal (MEProxy); Mon, 14 Sep 2020 12:18:16 -0400", "from xps.monjalon.net (184.203.134.77.rev.sfr.net [77.134.203.184])\n by mail.messagingengine.com (Postfix) with ESMTPA id C873B328005A;\n Mon, 14 Sep 2020 12:18:13 -0400 (EDT)" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding; s=fm2; bh=8VS2xSVgY0ZGY\n Bhzrh4ONj/xKRIR09bmcVvn7MYLrT0=; b=ilb89f/KV8dTp0xm0R7bN0LIfZJ+v\n 8yiYOWENaQyj8BR3hueTBNQE1lgQ9BQ3E4YqwmYCK+ovl12oO1vJXpvhtm/tiPhW\n tY6jHjnD3HfWbGKGE+MdX9y7atYAU1OQ4Y4CRyZLrSJEp3dpIA7rLIKdGPEaszPb\n nlPju8zpGc4ibsGq+ArMd/tI0Rh63I3Du9l0HOIk/c8iCYQ+L1wh71Blgcx8Sl4g\n a9Jpw9D7y7jMoC8kqCILh/egkBQMZnyWaIChleDDnxFEPN5eJkNQBgHT2xg2nVQ1\n cRdm9+FyI1DyDpgRoBvIQrpucbXtMr/tYKWpwCL5JsIsoKYKhO4ffARJQ==", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=\n messagingengine.com; h=cc:content-transfer-encoding:date:from\n :in-reply-to:message-id:mime-version:references:subject:to\n :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=\n fm3; bh=8VS2xSVgY0ZGYBhzrh4ONj/xKRIR09bmcVvn7MYLrT0=; b=HlC03E6Z\n vtQXmhqgD4gBTVP8VGAMbs8vDpHSv9FgMpw0OVDt2VVdpvTfcURPla0HrwQ0ZOHS\n k9ereAOyqaYi0Qjkyvk/4Q/sZFLolXIo80XiTEiaD+xUYEesN3gEihhqF7Wu0s+j\n Db9PJmHz1mK5C6c/yBVOQs+oD3PL5q58BMJJ9T+JcWa4SFxDJ/kLjn0rCVEoELQ5\n Kf0Q7h9AxwdW6YVPa4QkfAG54Bnpd2Gf+pRwGref9mdfR/ZvofUjmra2zLdb0eCR\n TO2NZfSzbnEOO+MvDG4nqPQxCpgUQRaVbrWFPnDqEraPJ18v8fIzdxV3ln95OCbF\n tTSBBA5pHjtRow==" ], "X-ME-Sender": "<xms:x5dfXwjmHPe9Y6Ae2NR5TSOjGZgiLFD0MvsRnMFByzlUJhEWwZZSxw>\n <xme:x5dfX5A9T3WtzRw27OH1h6_HMc0ee9CKX71W3IF8ptgEA35FWNi3742yFYBo3hnfJ\n veodGvhybCz65ZXkA>", "X-ME-Proxy-Cause": "\n gggruggvucftvghtrhhoucdtuddrgeduiedrudeiiedguddtudcutefuodetggdotefrod\n ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh\n necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd\n enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepvfhhohhm\n rghsucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenuc\n ggtffrrghtthgvrhhnpedvhefgiedvjeegtdevheefhfetleefgfeivefgffevfeejgedt\n gfeutdehtdegveenucfkphepjeejrddufeegrddvtdefrddukeegnecuvehluhhsthgvrh\n fuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgr\n lhhonhdrnhgvth", "X-ME-Proxy": "<xmx:x5dfX4HuLLx_apDPpsaE0zkWQmxLqGFu5R1IyoLjVkwxvER05Bs2WA>\n <xmx:x5dfXxTfOH-pO6P6oJll49SKUM80t-peky2D44lDSF1UhfSANPKdHg>\n <xmx:x5dfX9y3Vn76gs8T1KdJHdDNOCxwEEWis_w1-1nghq9jzI8nJAZjqQ>\n <xmx:yJdfX9g4QDD2FNsn-NzVLasYHPwzj21BeUkoYlsVXcoDeNjYjoVTRg>", "From": "Thomas Monjalon <thomas@monjalon.net>", "To": "dev@dpdk.org", "Cc": "mdr@ashroe.eu, david.marchand@redhat.com,\n Hemant Agrawal <hemant.agrawal@nxp.com>,\n Sachin Saxena <sachin.saxena@nxp.com>, Fiona Trahe <fiona.trahe@intel.com>,\n Ashish Gupta <ashish.gupta@marvell.com>,\n Somalapuram Amaranath <asomalap@amd.com>,\n Anoob Joseph <anoobj@marvell.com>, Jay Zhou <jianjay.zhou@huawei.com>,\n Qiming Yang <qiming.yang@intel.com>, Qi Zhang <qi.z.zhang@intel.com>,\n Gagandeep Singh <g.singh@nxp.com>, Akhil Goyal <akhil.goyal@nxp.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Ferruh Yigit <ferruh.yigit@intel.com>", "Date": "Mon, 14 Sep 2020 18:17:57 +0200", "Message-Id": "<20200914161801.572174-2-thomas@monjalon.net>", "X-Mailer": "git-send-email 2.28.0", "In-Reply-To": "<20200914161801.572174-1-thomas@monjalon.net>", "References": "<20200914161801.572174-1-thomas@monjalon.net>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 1/4] mem: remove physical address aliases", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Remove the deprecated unioned fields phys_addr\nfrom the structures rte_memseg and rte_memzone.\nThey are replaced with the fields iova which are at the same offsets.\n\nSigned-off-by: Thomas Monjalon <thomas@monjalon.net>\n---\n drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 2 +-\n drivers/common/dpaax/dpaax_iova_table.c | 2 +-\n drivers/compress/qat/qat_comp.c | 2 +-\n drivers/compress/qat/qat_comp_pmd.c | 2 +-\n drivers/crypto/ccp/ccp_dev.c | 2 +-\n drivers/crypto/octeontx/otx_cryptodev_hw_access.c | 2 +-\n drivers/crypto/virtio/virtio_cryptodev.c | 6 +++---\n drivers/net/ice/base/ice_osdep.h | 2 +-\n drivers/net/pfe/base/pfe.h | 2 +-\n lib/librte_eal/include/rte_memory.h | 6 +-----\n lib/librte_eal/include/rte_memzone.h | 6 +-----\n lib/librte_kni/rte_kni.c | 14 +++++++-------\n 12 files changed, 20 insertions(+), 28 deletions(-)", "diff": "diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h\nindex 35423df12b..2dd53c63ba 100644\n--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h\n+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h\n@@ -368,7 +368,7 @@ static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr)\n \n \tmemseg = rte_mem_virt2memseg((void *)(uintptr_t)vaddr, NULL);\n \tif (memseg)\n-\t\treturn memseg->phys_addr + RTE_PTR_DIFF(vaddr, memseg->addr);\n+\t\treturn memseg->iova + RTE_PTR_DIFF(vaddr, memseg->addr);\n \treturn (size_t)NULL;\n }\n \ndiff --git a/drivers/common/dpaax/dpaax_iova_table.c b/drivers/common/dpaax/dpaax_iova_table.c\nindex 5ba8ed1933..91bee65e7b 100644\n--- a/drivers/common/dpaax/dpaax_iova_table.c\n+++ b/drivers/common/dpaax/dpaax_iova_table.c\n@@ -440,7 +440,7 @@ dpaax_memevent_walk_memsegs(const struct rte_memseg_list *msl __rte_unused,\n \t\t\t void *arg __rte_unused)\n {\n \tDPAAX_DEBUG(\"Walking for %p (pa=%\"PRIu64\") and len %zu\",\n-\t\t ms->addr, ms->phys_addr, len);\n+\t\t ms->addr, ms->iova, len);\n \tdpaax_iova_table_update(rte_mem_virt2phy(ms->addr), ms->addr, len);\n \treturn 0;\n }\ndiff --git a/drivers/compress/qat/qat_comp.c b/drivers/compress/qat/qat_comp.c\nindex 9e1fd2fe91..335fd63b98 100644\n--- a/drivers/compress/qat/qat_comp.c\n+++ b/drivers/compress/qat/qat_comp.c\n@@ -957,7 +957,7 @@ static int qat_comp_create_templates(struct qat_comp_xform *qat_xform,\n \t\t\t\tICP_QAT_FW_SLICE_XLAT);\n \n \t\tcomp_req->u1.xlt_pars.inter_buff_ptr =\n-\t\t\t\tinterm_buff_mz->phys_addr;\n+\t\t\t\tinterm_buff_mz->iova;\n \t}\n \n #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG\ndiff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c\nindex 311e561685..18ecb34ba7 100644\n--- a/drivers/compress/qat/qat_comp_pmd.c\n+++ b/drivers/compress/qat/qat_comp_pmd.c\n@@ -242,7 +242,7 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,\n \t}\n \n \tmz_start = (uint8_t *)memzone->addr;\n-\tmz_start_phys = memzone->phys_addr;\n+\tmz_start_phys = memzone->iova;\n \tQAT_LOG(DEBUG, \"Memzone %s: addr = %p, phys = 0x%\"PRIx64\n \t\t\t\", size required %d, size created %zu\",\n \t\t\tinter_buff_mz_name, mz_start, mz_start_phys,\ndiff --git a/drivers/crypto/ccp/ccp_dev.c b/drivers/crypto/ccp/ccp_dev.c\nindex 7d98b2eb25..664ddc1747 100644\n--- a/drivers/crypto/ccp/ccp_dev.c\n+++ b/drivers/crypto/ccp/ccp_dev.c\n@@ -546,7 +546,7 @@ ccp_add_device(struct ccp_device *dev, int type)\n \t\t\t\t\t\t cmd_q->qsize, SOCKET_ID_ANY);\n \t\tcmd_q->qbase_addr = (void *)q_mz->addr;\n \t\tcmd_q->qbase_desc = (void *)q_mz->addr;\n-\t\tcmd_q->qbase_phys_addr = q_mz->phys_addr;\n+\t\tcmd_q->qbase_phys_addr = q_mz->iova;\n \n \t\tcmd_q->qcontrol = 0;\n \t\t/* init control reg to zero */\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c\nindex ce546c2ffe..ee36b0183e 100644\n--- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c\n+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c\n@@ -556,7 +556,7 @@ otx_cpt_get_resource(const struct rte_cryptodev *dev, uint8_t group,\n \t}\n \n \tmem = rz->addr;\n-\tdma_addr = rz->phys_addr;\n+\tdma_addr = rz->iova;\n \talloc_len = len;\n \n \tmemset(mem, 0, len);\ndiff --git a/drivers/crypto/virtio/virtio_cryptodev.c b/drivers/crypto/virtio/virtio_cryptodev.c\nindex 31a5f1072a..1822f21744 100644\n--- a/drivers/crypto/virtio/virtio_cryptodev.c\n+++ b/drivers/crypto/virtio/virtio_cryptodev.c\n@@ -411,7 +411,7 @@ virtio_crypto_queue_setup(struct rte_cryptodev *dev,\n \t * and only accepts 32 bit page frame number.\n \t * Check if the allocated physical memory exceeds 16TB.\n \t */\n-\tif ((mz->phys_addr + vq->vq_ring_size - 1)\n+\tif ((mz->iova + vq->vq_ring_size - 1)\n \t\t\t\t>> (VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {\n \t\tVIRTIO_CRYPTO_INIT_LOG_ERR(\"vring address shouldn't be \"\n \t\t\t\t\t\"above 16TB!\");\n@@ -420,10 +420,10 @@ virtio_crypto_queue_setup(struct rte_cryptodev *dev,\n \n \tmemset(mz->addr, 0, sizeof(mz->len));\n \tvq->mz = mz;\n-\tvq->vq_ring_mem = mz->phys_addr;\n+\tvq->vq_ring_mem = mz->iova;\n \tvq->vq_ring_virt_mem = mz->addr;\n \tVIRTIO_CRYPTO_INIT_LOG_DBG(\"vq->vq_ring_mem(physical): 0x%\"PRIx64,\n-\t\t\t\t\t(uint64_t)mz->phys_addr);\n+\t\t\t\t\t(uint64_t)mz->iova);\n \tVIRTIO_CRYPTO_INIT_LOG_DBG(\"vq->vq_ring_virt_mem: 0x%\"PRIx64,\n \t\t\t\t\t(uint64_t)(uintptr_t)mz->addr);\n \ndiff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h\nindex 360e435b8d..9a170b5143 100644\n--- a/drivers/net/ice/base/ice_osdep.h\n+++ b/drivers/net/ice/base/ice_osdep.h\n@@ -258,7 +258,7 @@ ice_alloc_dma_mem(__rte_unused struct ice_hw *hw,\n \n \tmem->size = size;\n \tmem->va = mz->addr;\n-\tmem->pa = mz->phys_addr;\n+\tmem->pa = mz->iova;\n \tmem->zone = (const void *)mz;\n \tPMD_DRV_LOG(DEBUG, \"memzone %s allocated with physical address: \"\n \t\t \"%\"PRIu64, mz->name, mem->pa);\ndiff --git a/drivers/net/pfe/base/pfe.h b/drivers/net/pfe/base/pfe.h\nindex 72741ba4a8..0a88e98c1b 100644\n--- a/drivers/net/pfe/base/pfe.h\n+++ b/drivers/net/pfe/base/pfe.h\n@@ -414,7 +414,7 @@ static inline phys_addr_t pfe_mem_vtop(uint64_t vaddr)\n \n \tmemseg = rte_mem_virt2memseg((void *)(uintptr_t)vaddr, NULL);\n \tif (memseg)\n-\t\treturn memseg->phys_addr + RTE_PTR_DIFF(vaddr, memseg->addr);\n+\t\treturn memseg->iova + RTE_PTR_DIFF(vaddr, memseg->addr);\n \n \treturn (size_t)NULL;\n }\ndiff --git a/lib/librte_eal/include/rte_memory.h b/lib/librte_eal/include/rte_memory.h\nindex 65374d53a3..bba9b5300a 100644\n--- a/lib/librte_eal/include/rte_memory.h\n+++ b/lib/librte_eal/include/rte_memory.h\n@@ -43,11 +43,7 @@ extern \"C\" {\n #define RTE_MEMSEG_FLAG_DO_NOT_FREE (1 << 0)\n /**< Prevent this segment from being freed back to the OS. */\n struct rte_memseg {\n-\tRTE_STD_C11\n-\tunion {\n-\t\tphys_addr_t phys_addr; /**< deprecated - Start physical address. */\n-\t\trte_iova_t iova; /**< Start IO address. */\n-\t};\n+\trte_iova_t iova; /**< Start IO address. */\n \tRTE_STD_C11\n \tunion {\n \t\tvoid *addr; /**< Start virtual address. */\ndiff --git a/lib/librte_eal/include/rte_memzone.h b/lib/librte_eal/include/rte_memzone.h\nindex 091c9522f7..5db1210831 100644\n--- a/lib/librte_eal/include/rte_memzone.h\n+++ b/lib/librte_eal/include/rte_memzone.h\n@@ -51,11 +51,7 @@ struct rte_memzone {\n #define RTE_MEMZONE_NAMESIZE 32 /**< Maximum length of memory zone name.*/\n \tchar name[RTE_MEMZONE_NAMESIZE]; /**< Name of the memory zone. */\n \n-\tRTE_STD_C11\n-\tunion {\n-\t\tphys_addr_t phys_addr; /**< deprecated - Start physical address. */\n-\t\trte_iova_t iova; /**< Start IO address. */\n-\t};\n+\trte_iova_t iova; /**< Start IO address. */\n \tRTE_STD_C11\n \tunion {\n \t\tvoid *addr; /**< Start virtual address. */\ndiff --git a/lib/librte_kni/rte_kni.c b/lib/librte_kni/rte_kni.c\nindex bcf82cc2d5..837d0217d2 100644\n--- a/lib/librte_kni/rte_kni.c\n+++ b/lib/librte_kni/rte_kni.c\n@@ -276,37 +276,37 @@ rte_kni_alloc(struct rte_mempool *pktmbuf_pool,\n \t/* TX RING */\n \tkni->tx_q = kni->m_tx_q->addr;\n \tkni_fifo_init(kni->tx_q, KNI_FIFO_COUNT_MAX);\n-\tdev_info.tx_phys = kni->m_tx_q->phys_addr;\n+\tdev_info.tx_phys = kni->m_tx_q->iova;\n \n \t/* RX RING */\n \tkni->rx_q = kni->m_rx_q->addr;\n \tkni_fifo_init(kni->rx_q, KNI_FIFO_COUNT_MAX);\n-\tdev_info.rx_phys = kni->m_rx_q->phys_addr;\n+\tdev_info.rx_phys = kni->m_rx_q->iova;\n \n \t/* ALLOC RING */\n \tkni->alloc_q = kni->m_alloc_q->addr;\n \tkni_fifo_init(kni->alloc_q, KNI_FIFO_COUNT_MAX);\n-\tdev_info.alloc_phys = kni->m_alloc_q->phys_addr;\n+\tdev_info.alloc_phys = kni->m_alloc_q->iova;\n \n \t/* FREE RING */\n \tkni->free_q = kni->m_free_q->addr;\n \tkni_fifo_init(kni->free_q, KNI_FIFO_COUNT_MAX);\n-\tdev_info.free_phys = kni->m_free_q->phys_addr;\n+\tdev_info.free_phys = kni->m_free_q->iova;\n \n \t/* Request RING */\n \tkni->req_q = kni->m_req_q->addr;\n \tkni_fifo_init(kni->req_q, KNI_FIFO_COUNT_MAX);\n-\tdev_info.req_phys = kni->m_req_q->phys_addr;\n+\tdev_info.req_phys = kni->m_req_q->iova;\n \n \t/* Response RING */\n \tkni->resp_q = kni->m_resp_q->addr;\n \tkni_fifo_init(kni->resp_q, KNI_FIFO_COUNT_MAX);\n-\tdev_info.resp_phys = kni->m_resp_q->phys_addr;\n+\tdev_info.resp_phys = kni->m_resp_q->iova;\n \n \t/* Req/Resp sync mem area */\n \tkni->sync_addr = kni->m_sync_addr->addr;\n \tdev_info.sync_va = kni->m_sync_addr->addr;\n-\tdev_info.sync_phys = kni->m_sync_addr->phys_addr;\n+\tdev_info.sync_phys = kni->m_sync_addr->iova;\n \n \tkni->pktmbuf_pool = pktmbuf_pool;\n \tkni->group_id = conf->group_id;\n", "prefixes": [ "1/4" ] }