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GET /api/patches/77421/?format=api
{ "id": 77421, "url": "http://patches.dpdk.org/api/patches/77421/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-34-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200911131954.15999-34-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200911131954.15999-34-qi.z.zhang@intel.com", "date": "2020-09-11T13:19:47", "name": "[v2,33/40] net/ice/base: create flash info structure and separate NVM version", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "4afaf6e956a5385a57bf2dd701c4441c777c9b69", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-34-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 12148, "url": "http://patches.dpdk.org/api/series/12148/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12148", "date": "2020-09-11T13:19:15", "name": "ice base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/12148/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/77421/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/77421/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F28C0A04B7;\n\tFri, 11 Sep 2020 15:22:59 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 71EAF1C132;\n\tFri, 11 Sep 2020 15:17:05 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 5320A1C1F3\n for <dev@dpdk.org>; Fri, 11 Sep 2020 15:16:51 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Sep 2020 06:16:50 -0700", "from dpdk51.sh.intel.com ([10.67.111.82])\n by FMSMGA003.fm.intel.com with ESMTP; 11 Sep 2020 06:16:47 -0700" ], "IronPort-SDR": [ "\n qs3LZYHsXyrW21/3eFimd6FCBLcwJ1LQDstmXzPx1Iq33PMbClEUe2DjQmTC4Piuz1JTX4inKp\n ZEOGL2e+i4NA==", "\n JTDnK/r+VKUHPzOaG1DhfZrVhtWonmEQkTbRDDS97Be1QhiiQKSrN1qiuXNl/tbtVzssjSEKXQ\n 0J8cIjvmqCxQ==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9740\"; a=\"146482402\"", "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"146482402\"", "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"342296753\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "ferruh.yigit@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Jacob Keller <jacob.e.keller@intel.com>", "Date": "Fri, 11 Sep 2020 21:19:47 +0800", "Message-Id": "<20200911131954.15999-34-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20200911131954.15999-1-qi.z.zhang@intel.com>", "References": "<20200907112826.48493-1-qi.z.zhang@intel.com>\n <20200911131954.15999-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 33/40] net/ice/base: create flash info\n\tstructure and separate NVM version", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The ice_nvm_info structure has become somewhat of a dumping ground for\nall of the fields related to flash version. It holds the NVM version and\nEETRACK id, the OptionROM info structure, the flash size, the ShadowRAM\nsize, and more.\n\nA future change is going to add the ability to read the NVM version and\nEETRACK ID from the inactive NVM bank. To make this simpler, it is\nuseful to have these NVM version info fields extracted to their own\nstructure.\n\nRename ice_nvm_info into ice_flash_info, and create a separate\nice_nvm_info structure that will contain the eetrack and NVM map\nversion. Move the netlist_ver structure into ice_flash_info and rename it\nice_netlist_info for consistency.\n\nModify the static ice_get_orom_ver_info to take the option rom structure\nas a pointer. This makes it more obvious what portion of the hw struct\nis being modified. Do the same for ice_get_netlist_ver_info.\n\nIntroduce a new ice_get_nvm_ver_info function, which will be similar to\nice_get_orom_ver_info and ice_get_netlist_ver_info, used to keep the NVM\nversion extraction code co-located.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 7 +--\n drivers/net/ice/base/ice_nvm.c | 108 +++++++++++++++++++-------------------\n drivers/net/ice/base/ice_type.h | 15 ++++--\n drivers/net/ice/ice_ethdev.c | 14 ++---\n 4 files changed, 75 insertions(+), 69 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex d917f8be7..1b98802d9 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -675,13 +675,14 @@ static void ice_get_itr_intrl_gran(struct ice_hw *hw)\n void ice_print_rollback_msg(struct ice_hw *hw)\n {\n \tchar nvm_str[ICE_NVM_VER_LEN] = { 0 };\n-\tstruct ice_nvm_info *nvm = &hw->nvm;\n \tstruct ice_orom_info *orom;\n+\tstruct ice_nvm_info *nvm;\n \n-\torom = &nvm->orom;\n+\torom = &hw->flash.orom;\n+\tnvm = &hw->flash.nvm;\n \n \tSNPRINTF(nvm_str, sizeof(nvm_str), \"%x.%02x 0x%x %d.%d.%d\",\n-\t\t nvm->major_ver, nvm->minor_ver, nvm->eetrack, orom->major,\n+\t\t nvm->major, nvm->minor, nvm->eetrack, orom->major,\n \t\t orom->build, orom->patch);\n \tice_warn(hw,\n \t\t \"Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode\\n\",\ndiff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c\nindex 5df07133b..56a2346a3 100644\n--- a/drivers/net/ice/base/ice_nvm.c\n+++ b/drivers/net/ice/base/ice_nvm.c\n@@ -77,7 +77,7 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,\n \t*length = 0;\n \n \t/* Verify the length of the read if this is for the Shadow RAM */\n-\tif (read_shadow_ram && ((offset + inlen) > (hw->nvm.sr_words * 2u))) {\n+\tif (read_shadow_ram && ((offset + inlen) > (hw->flash.sr_words * 2u))) {\n \t\tice_debug(hw, ICE_DBG_NVM, \"NVM error: requested data is beyond Shadow RAM limit\\n\");\n \t\treturn ICE_ERR_PARAM;\n \t}\n@@ -190,7 +190,7 @@ ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)\n {\n \tice_debug(hw, ICE_DBG_TRACE, \"%s\\n\", __func__);\n \n-\tif (hw->nvm.blank_nvm_mode)\n+\tif (hw->flash.blank_nvm_mode)\n \t\treturn ICE_SUCCESS;\n \n \treturn ice_acquire_res(hw, ICE_NVM_RES_ID, access, ICE_NVM_TIMEOUT);\n@@ -206,7 +206,7 @@ void ice_release_nvm(struct ice_hw *hw)\n {\n \tice_debug(hw, ICE_DBG_TRACE, \"%s\\n\", __func__);\n \n-\tif (hw->nvm.blank_nvm_mode)\n+\tif (hw->flash.blank_nvm_mode)\n \t\treturn;\n \n \tice_release_res(hw, ICE_NVM_RES_ID);\n@@ -359,16 +359,55 @@ ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)\n }\n \n /**\n+ * ice_get_nvm_ver_info - Read NVM version information\n+ * @hw: pointer to the HW struct\n+ * @nvm: pointer to NVM info structure\n+ *\n+ * Read the NVM EETRACK ID and map version of the main NVM image bank, filling\n+ * in the nvm info structure.\n+ */\n+static enum ice_status\n+ice_get_nvm_ver_info(struct ice_hw *hw, struct ice_nvm_info *nvm)\n+{\n+\tu16 eetrack_lo, eetrack_hi, ver;\n+\tenum ice_status status;\n+\n+\tstatus = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &ver);\n+\tif (status) {\n+\t\tice_debug(hw, ICE_DBG_NVM, \"Failed to read DEV starter version.\\n\");\n+\t\treturn status;\n+\t}\n+\tnvm->major = (ver & ICE_NVM_VER_HI_MASK) >> ICE_NVM_VER_HI_SHIFT;\n+\tnvm->minor = (ver & ICE_NVM_VER_LO_MASK) >> ICE_NVM_VER_LO_SHIFT;\n+\n+\tstatus = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);\n+\tif (status) {\n+\t\tice_debug(hw, ICE_DBG_NVM, \"Failed to read EETRACK lo.\\n\");\n+\t\treturn status;\n+\t}\n+\tstatus = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);\n+\tif (status) {\n+\t\tice_debug(hw, ICE_DBG_NVM, \"Failed to read EETRACK hi.\\n\");\n+\t\treturn status;\n+\t}\n+\n+\tnvm->eetrack = (eetrack_hi << 16) | eetrack_lo;\n+\n+\treturn ICE_SUCCESS;\n+}\n+\n+/**\n * ice_get_orom_ver_info - Read Option ROM version information\n * @hw: pointer to the HW struct\n+ * @orom: pointer to Option ROM info structure\n *\n * Read the Combo Image version data from the Boot Configuration TLV and fill\n * in the option ROM version data.\n */\n-static enum ice_status ice_get_orom_ver_info(struct ice_hw *hw)\n+static enum ice_status\n+ice_get_orom_ver_info(struct ice_hw *hw, struct ice_orom_info *orom)\n {\n \tu16 combo_hi, combo_lo, boot_cfg_tlv, boot_cfg_tlv_len;\n-\tstruct ice_orom_info *orom = &hw->nvm.orom;\n \tenum ice_status status;\n \tu32 combo_ver;\n \n@@ -455,7 +494,7 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)\n \n \tice_debug(hw, ICE_DBG_NVM, \"Predicted flash size is %u bytes\\n\", max_size);\n \n-\thw->nvm.flash_size = max_size;\n+\thw->flash.flash_size = max_size;\n \n err_read_flat_nvm:\n \tice_release_nvm(hw);\n@@ -472,8 +511,7 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)\n */\n enum ice_status ice_init_nvm(struct ice_hw *hw)\n {\n-\tstruct ice_nvm_info *nvm = &hw->nvm;\n-\tu16 eetrack_lo, eetrack_hi, ver;\n+\tstruct ice_flash_info *flash = &hw->flash;\n \tenum ice_status status;\n \tu32 fla, gens_stat;\n \tu8 sr_size;\n@@ -487,70 +525,32 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)\n \tsr_size = (gens_stat & GLNVM_GENS_SR_SIZE_M) >> GLNVM_GENS_SR_SIZE_S;\n \n \t/* Switching to words (sr_size contains power of 2) */\n-\tnvm->sr_words = BIT(sr_size) * ICE_SR_WORDS_IN_1KB;\n+\tflash->sr_words = BIT(sr_size) * ICE_SR_WORDS_IN_1KB;\n \n \t/* Check if we are in the normal or blank NVM programming mode */\n \tfla = rd32(hw, GLNVM_FLA);\n \tif (fla & GLNVM_FLA_LOCKED_M) { /* Normal programming mode */\n-\t\tnvm->blank_nvm_mode = false;\n+\t\tflash->blank_nvm_mode = false;\n \t} else {\n \t\t/* Blank programming mode */\n-\t\tnvm->blank_nvm_mode = true;\n+\t\tflash->blank_nvm_mode = true;\n \t\tice_debug(hw, ICE_DBG_NVM, \"NVM init error: unsupported blank mode.\\n\");\n \t\treturn ICE_ERR_NVM_BLANK_MODE;\n \t}\n \n-\tstatus = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &ver);\n-\tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Failed to read DEV starter version.\\n\");\n-\t\treturn status;\n-\t}\n-\tnvm->major_ver = (ver & ICE_NVM_VER_HI_MASK) >> ICE_NVM_VER_HI_SHIFT;\n-\tnvm->minor_ver = (ver & ICE_NVM_VER_LO_MASK) >> ICE_NVM_VER_LO_SHIFT;\n-\n-\tstatus = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);\n-\tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read EETRACK lo.\\n\");\n-\t\treturn status;\n-\t}\n-\tstatus = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);\n-\tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read EETRACK hi.\\n\");\n-\t\treturn status;\n-\t}\n-\n-\tnvm->eetrack = (eetrack_hi << 16) | eetrack_lo;\n-\n \tstatus = ice_discover_flash_size(hw);\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_NVM,\n-\t\t\t \"NVM init error: failed to discover flash size.\\n\");\n+\t\tice_debug(hw, ICE_DBG_NVM, \"NVM init error: failed to discover flash size.\\n\");\n \t\treturn status;\n \t}\n \n-\tswitch (hw->device_id) {\n-\t/* the following devices do not have boot_cfg_tlv yet */\n-\tcase ICE_DEV_ID_E822C_BACKPLANE:\n-\tcase ICE_DEV_ID_E822C_QSFP:\n-\tcase ICE_DEV_ID_E822C_10G_BASE_T:\n-\tcase ICE_DEV_ID_E822C_SGMII:\n-\tcase ICE_DEV_ID_E822C_SFP:\n-\tcase ICE_DEV_ID_E822L_BACKPLANE:\n-\tcase ICE_DEV_ID_E822L_SFP:\n-\tcase ICE_DEV_ID_E822L_10G_BASE_T:\n-\tcase ICE_DEV_ID_E822L_SGMII:\n-\tcase ICE_DEV_ID_E823L_BACKPLANE:\n-\tcase ICE_DEV_ID_E823L_SFP:\n-\tcase ICE_DEV_ID_E823L_10G_BASE_T:\n-\tcase ICE_DEV_ID_E823L_1GBE:\n-\tcase ICE_DEV_ID_E823L_QSFP:\n+\tstatus = ice_get_nvm_ver_info(hw, &flash->nvm);\n+\tif (status) {\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read NVM info.\\n\");\n \t\treturn status;\n-\tdefault:\n-\t\tbreak;\n \t}\n \n-\tstatus = ice_get_orom_ver_info(hw);\n+\tstatus = ice_get_orom_ver_info(hw, &flash->orom);\n \tif (status) {\n \t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read Option ROM info.\\n\");\n \t\treturn status;\ndiff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h\nindex 9c2fb560e..9e9a2198d 100644\n--- a/drivers/net/ice/base/ice_type.h\n+++ b/drivers/net/ice/base/ice_type.h\n@@ -511,14 +511,19 @@ struct ice_orom_info {\n \tu16 build;\t\t\t/* Build version of OROM */\n };\n \n-/* NVM Information */\n+/* NVM version information */\n struct ice_nvm_info {\n+\tu32 eetrack;\n+\tu8 major;\n+\tu8 minor;\n+};\n+\n+/* Flash Chip Information */\n+struct ice_flash_info {\n \tstruct ice_orom_info orom;\t/* Option ROM version info */\n-\tu32 eetrack;\t\t\t/* NVM data version */\n+\tstruct ice_nvm_info nvm;\t/* NVM version information */\n \tu16 sr_words;\t\t\t/* Shadow RAM size in words */\n \tu32 flash_size;\t\t\t/* Size of available flash in bytes */\n-\tu8 major_ver;\t\t\t/* major version of dev starter */\n-\tu8 minor_ver;\t\t\t/* minor version of dev starter */\n \tu8 blank_nvm_mode;\t\t/* is NVM empty (no FW present) */\n };\n \n@@ -838,7 +843,7 @@ struct ice_hw {\n \tu8 evb_veb;\t\t/* true for VEB, false for VEPA */\n \tu8 reset_ongoing;\t/* true if HW is in reset, false otherwise */\n \tstruct ice_bus_info bus;\n-\tstruct ice_nvm_info nvm;\n+\tstruct ice_flash_info flash;\n \tstruct ice_hw_dev_caps dev_caps;\t/* device capabilities */\n \tstruct ice_hw_func_caps func_caps;\t/* function capabilities */\n \ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex d06b05da0..ca1f7d42e 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -4410,15 +4410,15 @@ ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)\n \tu16 build;\n \tint ret;\n \n-\tver = hw->nvm.orom.major;\n-\tpatch = hw->nvm.orom.patch;\n-\tbuild = hw->nvm.orom.build;\n+\tver = hw->flash.orom.major;\n+\tpatch = hw->flash.orom.patch;\n+\tbuild = hw->flash.orom.build;\n \n \tret = snprintf(fw_version, fw_size,\n \t\t\t\"%d.%d 0x%08x %d.%d.%d\",\n-\t\t\thw->nvm.major_ver,\n-\t\t\thw->nvm.minor_ver,\n-\t\t\thw->nvm.eetrack,\n+\t\t\thw->flash.nvm.major,\n+\t\t\thw->flash.nvm.minor,\n+\t\t\thw->flash.nvm.eetrack,\n \t\t\tver, build, patch);\n \n \t/* add the size of '\\0' */\n@@ -4516,7 +4516,7 @@ ice_get_eeprom_length(struct rte_eth_dev *dev)\n {\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n-\treturn hw->nvm.flash_size;\n+\treturn hw->flash.flash_size;\n }\n \n static int\n", "prefixes": [ "v2", "33/40" ] }