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GET /api/patches/77407/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 77407,
    "url": "http://patches.dpdk.org/api/patches/77407/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-21-qi.z.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200911131954.15999-21-qi.z.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200911131954.15999-21-qi.z.zhang@intel.com",
    "date": "2020-09-11T13:19:34",
    "name": "[v2,20/40] net/ice/base: refactor DCB related variables",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "0a9024d607b8b25b92be86bc623981e95ccaab8b",
    "submitter": {
        "id": 504,
        "url": "http://patches.dpdk.org/api/people/504/?format=api",
        "name": "Qi Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-21-qi.z.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 12148,
            "url": "http://patches.dpdk.org/api/series/12148/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12148",
            "date": "2020-09-11T13:19:15",
            "name": "ice base code update",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/12148/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/77407/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/77407/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1A345A04B7;\n\tFri, 11 Sep 2020 15:20:02 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 93FF11C1D4;\n\tFri, 11 Sep 2020 15:16:40 +0200 (CEST)",
            "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 3445B1C138\n for <dev@dpdk.org>; Fri, 11 Sep 2020 15:16:31 +0200 (CEST)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Sep 2020 06:16:30 -0700",
            "from dpdk51.sh.intel.com ([10.67.111.82])\n by FMSMGA003.fm.intel.com with ESMTP; 11 Sep 2020 06:16:29 -0700"
        ],
        "IronPort-SDR": [
            "\n Tb3IJYPIawkxw+wOQIcC1NADDLCAxYsQDIXh/lFI6rT4Fvw/GrfSe1dgEPc7ZarPx1Q1kWMToV\n B4q1urPCFQ+Q==",
            "\n nYk1QrJTMeRfokJ2JBxaSlLpBe/TO1zS7l3QhnVf21GzFnFpG3RczX5aaVVbqqw2tcF2FAEgpw\n GXEKyUdL8m7A=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9740\"; a=\"146482275\"",
            "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"146482275\"",
            "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"342296636\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Qi Zhang <qi.z.zhang@intel.com>",
        "To": "ferruh.yigit@intel.com",
        "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Chinh T Cao <chinh.t.cao@intel.com>",
        "Date": "Fri, 11 Sep 2020 21:19:34 +0800",
        "Message-Id": "<20200911131954.15999-21-qi.z.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.13.6",
        "In-Reply-To": "<20200911131954.15999-1-qi.z.zhang@intel.com>",
        "References": "<20200907112826.48493-1-qi.z.zhang@intel.com>\n <20200911131954.15999-1-qi.z.zhang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2 20/40] net/ice/base: refactor DCB related\n\tvariables",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "In this patch, the DCB related variables will be refactored out of the\nice_port_info_struct. The goal is to make the ice_port_info struct\ncleaner.\n\nSigned-off-by: Chinh T Cao <chinh.t.cao@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_dcb.c  | 40 ++++++++++++++++++++--------------------\n drivers/net/ice/base/ice_type.h | 16 +++++++++-------\n 2 files changed, 29 insertions(+), 27 deletions(-)",
    "diff": "diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c\nindex 01cee227e..f5f375a7a 100644\n--- a/drivers/net/ice/base/ice_dcb.c\n+++ b/drivers/net/ice/base/ice_dcb.c\n@@ -850,9 +850,9 @@ ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)\n \t\treturn ICE_ERR_PARAM;\n \n \tif (dcbx_mode == ICE_DCBX_MODE_IEEE)\n-\t\tdcbx_cfg = &pi->local_dcbx_cfg;\n+\t\tdcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;\n \telse if (dcbx_mode == ICE_DCBX_MODE_CEE)\n-\t\tdcbx_cfg = &pi->desired_dcbx_cfg;\n+\t\tdcbx_cfg = &pi->qos_cfg.desired_dcbx_cfg;\n \n \t/* Get Local DCB Config in case of ICE_DCBX_MODE_IEEE\n \t * or get CEE DCB Desired Config in case of ICE_DCBX_MODE_CEE\n@@ -863,7 +863,7 @@ ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)\n \t\tgoto out;\n \n \t/* Get Remote DCB Config */\n-\tdcbx_cfg = &pi->remote_dcbx_cfg;\n+\tdcbx_cfg = &pi->qos_cfg.remote_dcbx_cfg;\n \tret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,\n \t\t\t\t ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);\n \t/* Don't treat ENOENT as an error for Remote MIBs */\n@@ -892,14 +892,14 @@ enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)\n \tret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);\n \tif (ret == ICE_SUCCESS) {\n \t\t/* CEE mode */\n-\t\tdcbx_cfg = &pi->local_dcbx_cfg;\n+\t\tdcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;\n \t\tdcbx_cfg->dcbx_mode = ICE_DCBX_MODE_CEE;\n \t\tdcbx_cfg->tlv_status = LE32_TO_CPU(cee_cfg.tlv_status);\n \t\tice_cee_to_dcb_cfg(&cee_cfg, dcbx_cfg);\n \t\tret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);\n \t} else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {\n \t\t/* CEE mode not enabled try querying IEEE data */\n-\t\tdcbx_cfg = &pi->local_dcbx_cfg;\n+\t\tdcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;\n \t\tdcbx_cfg->dcbx_mode = ICE_DCBX_MODE_IEEE;\n \t\tret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_IEEE);\n \t}\n@@ -916,26 +916,26 @@ enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)\n  */\n enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)\n {\n-\tstruct ice_port_info *pi = hw->port_info;\n+\tstruct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;\n \tenum ice_status ret = ICE_SUCCESS;\n \n \tif (!hw->func_caps.common_cap.dcb)\n \t\treturn ICE_ERR_NOT_SUPPORTED;\n \n-\tpi->is_sw_lldp = true;\n+\tqos_cfg->is_sw_lldp = true;\n \n \t/* Get DCBX status */\n-\tpi->dcbx_status = ice_get_dcbx_status(hw);\n+\tqos_cfg->dcbx_status = ice_get_dcbx_status(hw);\n \n-\tif (pi->dcbx_status == ICE_DCBX_STATUS_DONE ||\n-\t    pi->dcbx_status == ICE_DCBX_STATUS_IN_PROGRESS ||\n-\t    pi->dcbx_status == ICE_DCBX_STATUS_NOT_STARTED) {\n+\tif (qos_cfg->dcbx_status == ICE_DCBX_STATUS_DONE ||\n+\t    qos_cfg->dcbx_status == ICE_DCBX_STATUS_IN_PROGRESS ||\n+\t    qos_cfg->dcbx_status == ICE_DCBX_STATUS_NOT_STARTED) {\n \t\t/* Get current DCBX configuration */\n-\t\tret = ice_get_dcb_cfg(pi);\n+\t\tret = ice_get_dcb_cfg(hw->port_info);\n \t\tif (ret)\n \t\t\treturn ret;\n-\t\tpi->is_sw_lldp = false;\n-\t} else if (pi->dcbx_status == ICE_DCBX_STATUS_DIS) {\n+\t\tqos_cfg->is_sw_lldp = false;\n+\t} else if (qos_cfg->dcbx_status == ICE_DCBX_STATUS_DIS) {\n \t\treturn ICE_ERR_NOT_READY;\n \t}\n \n@@ -943,7 +943,7 @@ enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)\n \tif (enable_mib_change) {\n \t\tret = ice_aq_cfg_lldp_mib_change(hw, true, NULL);\n \t\tif (ret)\n-\t\t\tpi->is_sw_lldp = true;\n+\t\t\tqos_cfg->is_sw_lldp = true;\n \t}\n \n \treturn ret;\n@@ -958,21 +958,21 @@ enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)\n  */\n enum ice_status ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib)\n {\n-\tstruct ice_port_info *pi = hw->port_info;\n+\tstruct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;\n \tenum ice_status ret;\n \n \tif (!hw->func_caps.common_cap.dcb)\n \t\treturn ICE_ERR_NOT_SUPPORTED;\n \n \t/* Get DCBX status */\n-\tpi->dcbx_status = ice_get_dcbx_status(hw);\n+\tqos_cfg->dcbx_status = ice_get_dcbx_status(hw);\n \n-\tif (pi->dcbx_status == ICE_DCBX_STATUS_DIS)\n+\tif (qos_cfg->dcbx_status == ICE_DCBX_STATUS_DIS)\n \t\treturn ICE_ERR_NOT_READY;\n \n \tret = ice_aq_cfg_lldp_mib_change(hw, ena_mib, NULL);\n \tif (!ret)\n-\t\tpi->is_sw_lldp = !ena_mib;\n+\t\tqos_cfg->is_sw_lldp = !ena_mib;\n \n \treturn ret;\n }\n@@ -1269,7 +1269,7 @@ enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)\n \thw = pi->hw;\n \n \t/* update the HW local config */\n-\tdcbcfg = &pi->local_dcbx_cfg;\n+\tdcbcfg = &pi->qos_cfg.local_dcbx_cfg;\n \t/* Allocate the LLDPDU */\n \tlldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);\n \tif (!lldpmib)\ndiff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h\nindex 266f5500a..f80e19df9 100644\n--- a/drivers/net/ice/base/ice_type.h\n+++ b/drivers/net/ice/base/ice_type.h\n@@ -753,6 +753,14 @@ struct ice_dcbx_cfg {\n #define ICE_DCBX_APPS_NON_WILLING\t0x1\n };\n \n+struct ice_qos_cfg {\n+\tstruct ice_dcbx_cfg local_dcbx_cfg;\t/* Oper/Local Cfg */\n+\tstruct ice_dcbx_cfg desired_dcbx_cfg;\t/* CEE Desired Cfg */\n+\tstruct ice_dcbx_cfg remote_dcbx_cfg;\t/* Peer Cfg */\n+\tu8 dcbx_status : 3;\t\t\t/* see ICE_DCBX_STATUS_DIS */\n+\tu8 is_sw_lldp : 1;\n+};\n+\n struct ice_port_info {\n \tstruct ice_sched_node *root;\t/* Root Node per Port */\n \tstruct ice_hw *hw;\t\t/* back pointer to HW instance */\n@@ -778,13 +786,7 @@ struct ice_port_info {\n \tstruct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];\n \tstruct ice_bw_type_info root_node_bw_t_info;\n \tstruct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];\n-\tstruct ice_dcbx_cfg local_dcbx_cfg;\t/* Oper/Local Cfg */\n-\t/* DCBX info */\n-\tstruct ice_dcbx_cfg remote_dcbx_cfg;\t/* Peer Cfg */\n-\tstruct ice_dcbx_cfg desired_dcbx_cfg;\t/* CEE Desired Cfg */\n-\t/* LLDP/DCBX Status */\n-\tu8 dcbx_status:3;\t\t/* see ICE_DCBX_STATUS_DIS */\n-\tu8 is_sw_lldp:1;\n+\tstruct ice_qos_cfg qos_cfg;\n \tu8 is_vf:1;\n };\n \n",
    "prefixes": [
        "v2",
        "20/40"
    ]
}