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GET /api/patches/77404/?format=api
{ "id": 77404, "url": "http://patches.dpdk.org/api/patches/77404/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-18-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200911131954.15999-18-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200911131954.15999-18-qi.z.zhang@intel.com", "date": "2020-09-11T13:19:31", "name": "[v2,17/40] net/ice/base: join format strings to same line", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f41a7e343202ea9d35808d566d94f3904c57af41", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-18-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 12148, "url": "http://patches.dpdk.org/api/series/12148/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12148", "date": "2020-09-11T13:19:15", "name": "ice base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/12148/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/77404/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/77404/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8CA98A04B7;\n\tFri, 11 Sep 2020 15:19:22 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id CAB981C1BC;\n\tFri, 11 Sep 2020 15:16:36 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id E6E8D1C0D5\n for <dev@dpdk.org>; Fri, 11 Sep 2020 15:16:26 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Sep 2020 06:16:26 -0700", "from dpdk51.sh.intel.com ([10.67.111.82])\n by FMSMGA003.fm.intel.com with ESMTP; 11 Sep 2020 06:16:24 -0700" ], "IronPort-SDR": [ "\n 39KLpmv/F7U1pCqmaEywyd1Il36PNN+ZqspR3WNdp+UYF6IPvYBdCNfdRmzmxXFN7A0+q+MnGT\n LALIR7bHcrUg==", "\n 7nvxl7OcdHFezP4DUf1OFKixD0B+fXCmUWnV5IlAwfTHCj460FpKo5iDOR3MqpdOPLuiZ8darF\n FqQIJDyOUYgg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9740\"; a=\"146482251\"", "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"146482251\"", "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"342296609\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "ferruh.yigit@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Jacob Keller <jacob.e.keller@intel.com>", "Date": "Fri, 11 Sep 2020 21:19:31 +0800", "Message-Id": "<20200911131954.15999-18-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20200911131954.15999-1-qi.z.zhang@intel.com>", "References": "<20200907112826.48493-1-qi.z.zhang@intel.com>\n <20200911131954.15999-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 17/40] net/ice/base: join format strings to\n\tsame line", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When printing messages with ice_debug, align the printed string to the\norigin line of the message in order to ease debugging and tracking\nmessages back to their source.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_acl_ctrl.c | 30 ++++------\n drivers/net/ice/base/ice_common.c | 103 ++++++++++++-----------------------\n drivers/net/ice/base/ice_controlq.c | 42 +++++---------\n drivers/net/ice/base/ice_flex_pipe.c | 27 +++------\n drivers/net/ice/base/ice_flow.c | 9 +--\n drivers/net/ice/base/ice_nvm.c | 30 ++++------\n drivers/net/ice/base/ice_sched.c | 24 +++-----\n drivers/net/ice/base/ice_switch.c | 39 +++++--------\n 8 files changed, 102 insertions(+), 202 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c\nindex 49c4f3675..0ecf38496 100644\n--- a/drivers/net/ice/base/ice_acl_ctrl.c\n+++ b/drivers/net/ice/base/ice_acl_ctrl.c\n@@ -357,12 +357,10 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)\n \tif (status) {\n \t\tif (LE16_TO_CPU(tbl_alloc.buf.resp_buf.alloc_id) <\n \t\t ICE_AQC_ALLOC_ID_LESS_THAN_4K)\n-\t\t\tice_debug(hw, ICE_DBG_ACL,\n-\t\t\t\t \"Alloc ACL table failed. Unavailable resource.\\n\");\n+\t\t\tice_debug(hw, ICE_DBG_ACL, \"Alloc ACL table failed. Unavailable resource.\\n\");\n \t\telse\n-\t\t\tice_debug(hw, ICE_DBG_ACL,\n-\t\t\t\t \"AQ allocation of ACL failed with error. status: %d\\n\",\n-\t\t\t\t status);\n+\t\t\tice_debug(hw, ICE_DBG_ACL, \"AQ allocation of ACL failed with error. status: %d\\n\",\n+\t\t\t\t status);\n \t\treturn status;\n \t}\n \n@@ -402,8 +400,7 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)\n \tif (status) {\n \t\tice_free(hw, tbl);\n \t\thw->acl_tbl = NULL;\n-\t\tice_debug(hw, ICE_DBG_ACL,\n-\t\t\t \"Initialization of TCAM entries failed. status: %d\\n\",\n+\t\tice_debug(hw, ICE_DBG_ACL, \"Initialization of TCAM entries failed. status: %d\\n\",\n \t\t\t status);\n \t\tgoto out;\n \t}\n@@ -830,8 +827,7 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,\n \n \tstatus = ice_aq_alloc_acl_scen(hw, scen_id, &scen_buf, NULL);\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_ACL,\n-\t\t\t \"AQ allocation of ACL scenario failed. status: %d\\n\",\n+\t\tice_debug(hw, ICE_DBG_ACL, \"AQ allocation of ACL scenario failed. status: %d\\n\",\n \t\t\t status);\n \t\tice_free(hw, scen);\n \t\treturn status;\n@@ -898,10 +894,8 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)\n \n \t/* call the AQ command to destroy the ACL table */\n \tstatus = ice_aq_dealloc_acl_tbl(hw, hw->acl_tbl->id, &resp_buf, NULL);\n-\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_ACL,\n-\t\t\t \"AQ de-allocation of ACL failed. status: %d\\n\",\n+\t\tice_debug(hw, ICE_DBG_ACL, \"AQ de-allocation of ACL failed. status: %d\\n\",\n \t\t\t status);\n \t\treturn status;\n \t}\n@@ -977,8 +971,7 @@ ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,\n \t\tstatus = ice_aq_program_acl_entry(hw, entry_tcam + offset, idx,\n \t\t\t\t\t\t &buf, NULL);\n \t\tif (status) {\n-\t\t\tice_debug(hw, ICE_DBG_ACL,\n-\t\t\t\t \"aq program acl entry failed status: %d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_ACL, \"aq program acl entry failed status: %d\\n\",\n \t\t\t\t status);\n \t\t\tgoto out;\n \t\t}\n@@ -1049,8 +1042,7 @@ ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,\n \t\t\tstatus = ice_aq_program_actpair(hw, i, idx, &act_buf,\n \t\t\t\t\t\t\tNULL);\n \t\t\tif (status) {\n-\t\t\t\tice_debug(hw, ICE_DBG_ACL,\n-\t\t\t\t\t \"program actpair failed status: %d\\n\",\n+\t\t\t\tice_debug(hw, ICE_DBG_ACL, \"program actpair failed status: %d\\n\",\n \t\t\t\t\t status);\n \t\t\t\tbreak;\n \t\t\t}\n@@ -1101,8 +1093,7 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)\n \t\tstatus = ice_aq_program_acl_entry(hw, entry_tcam + i, idx, &buf,\n \t\t\t\t\t\t NULL);\n \t\tif (status)\n-\t\t\tice_debug(hw, ICE_DBG_ACL,\n-\t\t\t\t \"AQ program ACL entry failed status: %d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_ACL, \"AQ program ACL entry failed status: %d\\n\",\n \t\t\t\t status);\n \t}\n \n@@ -1118,8 +1109,7 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)\n \t\t\tstatus = ice_aq_program_actpair(hw, i, idx, &act_buf,\n \t\t\t\t\t\t\tNULL);\n \t\t\tif (status)\n-\t\t\t\tice_debug(hw, ICE_DBG_ACL,\n-\t\t\t\t\t \"program actpair failed.status: %d\\n\",\n+\t\t\t\tice_debug(hw, ICE_DBG_ACL, \"program actpair failed status: %d\\n\",\n \t\t\t\t\t status);\n \t\t}\n \t}\ndiff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex 87dc9db43..3d2489113 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -760,8 +760,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)\n \t/* Query the allocated resources for Tx scheduler */\n \tstatus = ice_sched_query_res_alloc(hw);\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_SCHED,\n-\t\t\t \"Failed to get scheduler allocated resources\\n\");\n+\t\tice_debug(hw, ICE_DBG_SCHED, \"Failed to get scheduler allocated resources\\n\");\n \t\tgoto err_unroll_alloc;\n \t}\n \tice_sched_get_psm_clk_freq(hw);\n@@ -770,7 +769,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)\n \tstatus = ice_sched_init_port(hw->port_info);\n \tif (status)\n \t\tgoto err_unroll_sched;\n-\n \tpcaps = (struct ice_aqc_get_phy_caps_data *)\n \t\tice_malloc(hw, sizeof(*pcaps));\n \tif (!pcaps) {\n@@ -783,7 +781,8 @@ enum ice_status ice_init_hw(struct ice_hw *hw)\n \t\t\t\t ICE_AQC_REPORT_TOPO_CAP, pcaps, NULL);\n \tice_free(hw, pcaps);\n \tif (status)\n-\t\tgoto err_unroll_sched;\n+\t\tice_debug(hw, ICE_DBG_PHY, \"%s: Get PHY capabilities failed, continuing anyway\\n\",\n+\t\t\t __func__);\n \n \t/* Initialize port_info struct with link information */\n \tstatus = ice_aq_get_link_info(hw->port_info, false, NULL, NULL);\n@@ -898,8 +897,7 @@ enum ice_status ice_check_reset(struct ice_hw *hw)\n \t}\n \n \tif (cnt == grst_timeout) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Global reset polling failed to complete.\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Global reset polling failed to complete.\\n\");\n \t\treturn ICE_ERR_RESET_FAILED;\n \t}\n \n@@ -917,16 +915,14 @@ enum ice_status ice_check_reset(struct ice_hw *hw)\n \tfor (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) {\n \t\treg = rd32(hw, GLNVM_ULD) & uld_mask;\n \t\tif (reg == uld_mask) {\n-\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"Global reset processes done. %d\\n\", cnt);\n+\t\t\tice_debug(hw, ICE_DBG_INIT, \"Global reset processes done. %d\\n\", cnt);\n \t\t\tbreak;\n \t\t}\n \t\tice_msec_delay(10, true);\n \t}\n \n \tif (cnt == ICE_PF_RESET_WAIT_COUNT) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Wait for Reset Done timed out. GLNVM_ULD = 0x%x\\n\",\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Wait for Reset Done timed out. GLNVM_ULD = 0x%x\\n\",\n \t\t\t reg);\n \t\treturn ICE_ERR_RESET_FAILED;\n \t}\n@@ -978,8 +974,7 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw)\n \t}\n \n \tif (cnt == ICE_PF_RESET_WAIT_COUNT) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"PF reset polling failed to complete.\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"PF reset polling failed to complete.\\n\");\n \t\treturn ICE_ERR_RESET_FAILED;\n \t}\n \n@@ -1626,8 +1621,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,\n \t\tgoto ice_acquire_res_exit;\n \n \tif (status)\n-\t\tice_debug(hw, ICE_DBG_RES,\n-\t\t\t \"resource %d acquire type %d failed.\\n\", res, access);\n+\t\tice_debug(hw, ICE_DBG_RES, \"resource %d acquire type %d failed.\\n\", res, access);\n \n \t/* If necessary, poll until the current lock owner timeouts */\n \ttimeout = time_left;\n@@ -1650,11 +1644,9 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,\n ice_acquire_res_exit:\n \tif (status == ICE_ERR_AQ_NO_WORK) {\n \t\tif (access == ICE_RES_WRITE)\n-\t\t\tice_debug(hw, ICE_DBG_RES,\n-\t\t\t\t \"resource indicates no work to do.\\n\");\n+\t\t\tice_debug(hw, ICE_DBG_RES, \"resource indicates no work to do.\\n\");\n \t\telse\n-\t\t\tice_debug(hw, ICE_DBG_RES,\n-\t\t\t\t \"Warning: ICE_ERR_AQ_NO_WORK not expected\\n\");\n+\t\t\tice_debug(hw, ICE_DBG_RES, \"Warning: ICE_ERR_AQ_NO_WORK not expected\\n\");\n \t}\n \treturn status;\n }\n@@ -1846,60 +1838,48 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,\n \tswitch (cap) {\n \tcase ICE_AQC_CAPS_VALID_FUNCTIONS:\n \t\tcaps->valid_functions = number;\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: valid_functions (bitmap) = %d\\n\", prefix,\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: valid_functions (bitmap) = %d\\n\", prefix,\n \t\t\t caps->valid_functions);\n \t\tbreak;\n \tcase ICE_AQC_CAPS_DCB:\n \t\tcaps->dcb = (number == 1);\n \t\tcaps->active_tc_bitmap = logical_id;\n \t\tcaps->maxtc = phys_id;\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: dcb = %d\\n\", prefix, caps->dcb);\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: active_tc_bitmap = %d\\n\", prefix,\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: dcb = %d\\n\", prefix, caps->dcb);\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: active_tc_bitmap = %d\\n\", prefix,\n \t\t\t caps->active_tc_bitmap);\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: maxtc = %d\\n\", prefix, caps->maxtc);\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: maxtc = %d\\n\", prefix, caps->maxtc);\n \t\tbreak;\n \tcase ICE_AQC_CAPS_RSS:\n \t\tcaps->rss_table_size = number;\n \t\tcaps->rss_table_entry_width = logical_id;\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: rss_table_size = %d\\n\", prefix,\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: rss_table_size = %d\\n\", prefix,\n \t\t\t caps->rss_table_size);\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: rss_table_entry_width = %d\\n\", prefix,\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: rss_table_entry_width = %d\\n\", prefix,\n \t\t\t caps->rss_table_entry_width);\n \t\tbreak;\n \tcase ICE_AQC_CAPS_RXQS:\n \t\tcaps->num_rxq = number;\n \t\tcaps->rxq_first_id = phys_id;\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: num_rxq = %d\\n\", prefix,\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: num_rxq = %d\\n\", prefix,\n \t\t\t caps->num_rxq);\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: rxq_first_id = %d\\n\", prefix,\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: rxq_first_id = %d\\n\", prefix,\n \t\t\t caps->rxq_first_id);\n \t\tbreak;\n \tcase ICE_AQC_CAPS_TXQS:\n \t\tcaps->num_txq = number;\n \t\tcaps->txq_first_id = phys_id;\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: num_txq = %d\\n\", prefix,\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: num_txq = %d\\n\", prefix,\n \t\t\t caps->num_txq);\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: txq_first_id = %d\\n\", prefix,\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: txq_first_id = %d\\n\", prefix,\n \t\t\t caps->txq_first_id);\n \t\tbreak;\n \tcase ICE_AQC_CAPS_MSIX:\n \t\tcaps->num_msix_vectors = number;\n \t\tcaps->msix_vector_first_id = phys_id;\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: num_msix_vectors = %d\\n\", prefix,\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: num_msix_vectors = %d\\n\", prefix,\n \t\t\t caps->num_msix_vectors);\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"%s: msix_vector_first_id = %d\\n\", prefix,\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: msix_vector_first_id = %d\\n\", prefix,\n \t\t\t caps->msix_vector_first_id);\n \t\tbreak;\n \tcase ICE_AQC_CAPS_MAX_MTU:\n@@ -1933,8 +1913,7 @@ ice_recalc_port_limited_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps)\n \tif (hw->dev_caps.num_funcs > 4) {\n \t\t/* Max 4 TCs per port */\n \t\tcaps->maxtc = 4;\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"reducing maxtc to %d (based on #ports)\\n\",\n+\t\tice_debug(hw, ICE_DBG_INIT, \"reducing maxtc to %d (based on #ports)\\n\",\n \t\t\t caps->maxtc);\n \t}\n }\n@@ -1983,11 +1962,9 @@ ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,\n \t\tGLQF_FD_SIZE_FD_BSIZE_S;\n \tfunc_p->fd_fltr_best_effort = val;\n \n-\tice_debug(hw, ICE_DBG_INIT,\n-\t\t \"func caps: fd_fltr_guar = %d\\n\",\n+\tice_debug(hw, ICE_DBG_INIT, \"func caps: fd_fltr_guar = %d\\n\",\n \t\t func_p->fd_fltr_guar);\n-\tice_debug(hw, ICE_DBG_INIT,\n-\t\t \"func caps: fd_fltr_best_effort = %d\\n\",\n+\tice_debug(hw, ICE_DBG_INIT, \"func caps: fd_fltr_best_effort = %d\\n\",\n \t\t func_p->fd_fltr_best_effort);\n }\n \n@@ -2033,8 +2010,7 @@ ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,\n \t\tdefault:\n \t\t\t/* Don't list common capabilities as unknown */\n \t\t\tif (!found)\n-\t\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t\t \"func caps: unknown capability[%d]: 0x%x\\n\",\n+\t\t\t\tice_debug(hw, ICE_DBG_INIT, \"func caps: unknown capability[%d]: 0x%x\\n\",\n \t\t\t\t\t i, cap);\n \t\t\tbreak;\n \t\t}\n@@ -2145,8 +2121,7 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,\n \t\tdefault:\n \t\t\t/* Don't list common capabilities as unknown */\n \t\t\tif (!found)\n-\t\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t\t \"dev caps: unknown capability[%d]: 0x%x\\n\",\n+\t\t\t\tice_debug(hw, ICE_DBG_INIT, \"dev caps: unknown capability[%d]: 0x%x\\n\",\n \t\t\t\t\t i, cap);\n \t\t\tbreak;\n \t\t}\n@@ -2598,8 +2573,7 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,\n \n \t/* Ensure that only valid bits of cfg->caps can be turned on. */\n \tif (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) {\n-\t\tice_debug(hw, ICE_DBG_PHY,\n-\t\t\t \"Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\\n\",\n+\t\tice_debug(hw, ICE_DBG_PHY, \"Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\\n\",\n \t\t\t cfg->caps);\n \n \t\tcfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK;\n@@ -3083,8 +3057,7 @@ enum ice_status ice_get_link_status(struct ice_port_info *pi, bool *link_up)\n \t\tstatus = ice_update_link_info(pi);\n \n \t\tif (status)\n-\t\t\tice_debug(pi->hw, ICE_DBG_LINK,\n-\t\t\t\t \"get link status error, status = %d\\n\",\n+\t\t\tice_debug(pi->hw, ICE_DBG_LINK, \"get link status error, status = %d\\n\",\n \t\t\t\t status);\n \t}\n \n@@ -3879,8 +3852,7 @@ ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,\n \t\t * of the endianness of the machine.\n \t\t */\n \t\tif (ce_info[f].width > (ce_info[f].size_of * BITS_PER_BYTE)) {\n-\t\t\tice_debug(hw, ICE_DBG_QCTX,\n-\t\t\t\t \"Field %d width of %d bits larger than size of %d byte(s) ... skipping write\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_QCTX, \"Field %d width of %d bits larger than size of %d byte(s) ... skipping write\\n\",\n \t\t\t\t f, ce_info[f].width, ce_info[f].size_of);\n \t\t\tcontinue;\n \t\t}\n@@ -4692,8 +4664,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,\n \tstatus = ice_get_pfa_module_tlv(hw, &tlv, &tlv_len,\n \t\t\t\t\tICE_SR_LINK_DEFAULT_OVERRIDE_PTR);\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Failed to read link override TLV.\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read link override TLV.\\n\");\n \t\treturn status;\n \t}\n \n@@ -4704,8 +4675,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,\n \t/* link options first */\n \tstatus = ice_read_sr_word(hw, tlv_start, &buf);\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Failed to read override link options.\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read override link options.\\n\");\n \t\treturn status;\n \t}\n \tldo->options = buf & ICE_LINK_OVERRIDE_OPT_M;\n@@ -4716,8 +4686,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,\n \toffset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_FEC_OFFSET;\n \tstatus = ice_read_sr_word(hw, offset, &buf);\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Failed to read override phy config.\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read override phy config.\\n\");\n \t\treturn status;\n \t}\n \tldo->fec_options = buf & ICE_LINK_OVERRIDE_FEC_OPT_M;\n@@ -4727,8 +4696,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,\n \tfor (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) {\n \t\tstatus = ice_read_sr_word(hw, (offset + i), &buf);\n \t\tif (status) {\n-\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"Failed to read override link options.\\n\");\n+\t\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read override link options.\\n\");\n \t\t\treturn status;\n \t\t}\n \t\t/* shift 16 bits at a time to fill 64 bits */\n@@ -4741,8 +4709,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,\n \tfor (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) {\n \t\tstatus = ice_read_sr_word(hw, (offset + i), &buf);\n \t\tif (status) {\n-\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"Failed to read override link options.\\n\");\n+\t\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read override link options.\\n\");\n \t\t\treturn status;\n \t\t}\n \t\t/* shift 16 bits at a time to fill 64 bits */\ndiff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c\nindex f278ef636..111288184 100644\n--- a/drivers/net/ice/base/ice_controlq.c\n+++ b/drivers/net/ice/base/ice_controlq.c\n@@ -697,8 +697,7 @@ enum ice_status ice_init_all_ctrlq(struct ice_hw *hw)\n \t\tif (status != ICE_ERR_AQ_FW_CRITICAL)\n \t\t\tbreak;\n \n-\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t \"Retry Admin Queue init due to FW critical error\\n\");\n+\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"Retry Admin Queue init due to FW critical error\\n\");\n \t\tice_shutdown_ctrlq(hw, ICE_CTL_Q_ADMIN);\n \t\tice_msec_delay(ICE_CTL_Q_ADMIN_INIT_MSEC, true);\n \t} while (retry++ < ICE_CTL_Q_ADMIN_INIT_TIMEOUT);\n@@ -793,8 +792,7 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)\n \tdetails = ICE_CTL_Q_DETAILS(*sq, ntc);\n \n \twhile (rd32(hw, cq->sq.head) != ntc) {\n-\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t \"ntc %d head %d.\\n\", ntc, rd32(hw, cq->sq.head));\n+\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"ntc %d head %d.\\n\", ntc, rd32(hw, cq->sq.head));\n \t\tice_memset(desc, 0, sizeof(*desc), ICE_DMA_MEM);\n \t\tice_memset(details, 0, sizeof(*details), ICE_NONDMA_MEM);\n \t\tntc++;\n@@ -832,8 +830,7 @@ static void ice_debug_cq(struct ice_hw *hw, void *desc, void *buf, u16 buf_len)\n \tdatalen = LE16_TO_CPU(cq_desc->datalen);\n \tflags = LE16_TO_CPU(cq_desc->flags);\n \n-\tice_debug(hw, ICE_DBG_AQ_DESC,\n-\t\t \"CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\\n\",\n+\tice_debug(hw, ICE_DBG_AQ_DESC, \"CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\\n\",\n \t\t LE16_TO_CPU(cq_desc->opcode), flags, datalen,\n \t\t LE16_TO_CPU(cq_desc->retval));\n \tice_debug(hw, ICE_DBG_AQ_DESC, \"\\tcookie (h,l) 0x%08X 0x%08X\\n\",\n@@ -906,8 +903,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \tcq->sq_last_status = ICE_AQ_RC_OK;\n \n \tif (!cq->sq.count) {\n-\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t \"Control Send queue not initialized.\\n\");\n+\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"Control Send queue not initialized.\\n\");\n \t\tstatus = ICE_ERR_AQ_EMPTY;\n \t\tgoto sq_send_command_error;\n \t}\n@@ -919,8 +915,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \n \tif (buf) {\n \t\tif (buf_size > cq->sq_buf_size) {\n-\t\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t\t \"Invalid buffer size for Control Send queue: %d.\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"Invalid buffer size for Control Send queue: %d.\\n\",\n \t\t\t\t buf_size);\n \t\t\tstatus = ICE_ERR_INVAL_SIZE;\n \t\t\tgoto sq_send_command_error;\n@@ -933,8 +928,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \n \tval = rd32(hw, cq->sq.head);\n \tif (val >= cq->num_sq_entries) {\n-\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t \"head overrun at %d in the Control Send Queue ring\\n\",\n+\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"head overrun at %d in the Control Send Queue ring\\n\",\n \t\t\t val);\n \t\tstatus = ICE_ERR_AQ_EMPTY;\n \t\tgoto sq_send_command_error;\n@@ -952,8 +946,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \t * called in a separate thread in case of asynchronous completions.\n \t */\n \tif (ice_clean_sq(hw, cq) == 0) {\n-\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t \"Error: Control Send Queue is full.\\n\");\n+\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"Error: Control Send Queue is full.\\n\");\n \t\tstatus = ICE_ERR_AQ_FULL;\n \t\tgoto sq_send_command_error;\n \t}\n@@ -982,8 +975,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \t}\n \n \t/* Debug desc and buffer */\n-\tice_debug(hw, ICE_DBG_AQ_DESC,\n-\t\t \"ATQ: Control Send queue desc and buffer:\\n\");\n+\tice_debug(hw, ICE_DBG_AQ_DESC, \"ATQ: Control Send queue desc and buffer:\\n\");\n \n \tice_debug_cq(hw, (void *)desc_on_ring, buf, buf_size);\n \n@@ -1009,8 +1001,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \t\t\tu16 copy_size = LE16_TO_CPU(desc->datalen);\n \n \t\t\tif (copy_size > buf_size) {\n-\t\t\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t\t\t \"Return len %d > than buf len %d\\n\",\n+\t\t\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"Return len %d > than buf len %d\\n\",\n \t\t\t\t\t copy_size, buf_size);\n \t\t\t\tstatus = ICE_ERR_AQ_ERROR;\n \t\t\t} else {\n@@ -1020,8 +1011,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \t\t}\n \t\tretval = LE16_TO_CPU(desc->retval);\n \t\tif (retval) {\n-\t\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t\t \"Control Send Queue command 0x%04X completed with error 0x%X\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"Control Send Queue command 0x%04X completed with error 0x%X\\n\",\n \t\t\t\t LE16_TO_CPU(desc->opcode),\n \t\t\t\t retval);\n \n@@ -1034,8 +1024,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \t\tcq->sq_last_status = (enum ice_aq_err)retval;\n \t}\n \n-\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t \"ATQ: desc and buffer writeback:\\n\");\n+\tice_debug(hw, ICE_DBG_AQ_MSG, \"ATQ: desc and buffer writeback:\\n\");\n \n \tice_debug_cq(hw, (void *)desc, buf, buf_size);\n \n@@ -1051,8 +1040,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \t\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"Critical FW error.\\n\");\n \t\t\tstatus = ICE_ERR_AQ_FW_CRITICAL;\n \t\t} else {\n-\t\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t\t \"Control Send Queue Writeback timeout.\\n\");\n+\t\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"Control Send Queue Writeback timeout.\\n\");\n \t\t\tstatus = ICE_ERR_AQ_TIMEOUT;\n \t\t}\n \t}\n@@ -1137,8 +1125,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \tice_acquire_lock(&cq->rq_lock);\n \n \tif (!cq->rq.count) {\n-\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t \"Control Receive queue not initialized.\\n\");\n+\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"Control Receive queue not initialized.\\n\");\n \t\tret_code = ICE_ERR_AQ_EMPTY;\n \t\tgoto clean_rq_elem_err;\n \t}\n@@ -1160,8 +1147,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \tflags = LE16_TO_CPU(desc->flags);\n \tif (flags & ICE_AQ_FLAG_ERR) {\n \t\tret_code = ICE_ERR_AQ_ERROR;\n-\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t \"Control Receive Queue Event 0x%04X received with error 0x%X\\n\",\n+\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"Control Receive Queue Event 0x%04X received with error 0x%X\\n\",\n \t\t\t LE16_TO_CPU(desc->opcode),\n \t\t\t cq->rq_last_status);\n \t}\ndiff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c\nindex d4b2e4f29..923d99448 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.c\n+++ b/drivers/net/ice/base/ice_flex_pipe.c\n@@ -712,8 +712,7 @@ ice_acquire_global_cfg_lock(struct ice_hw *hw,\n \t\t\t\t ICE_GLOBAL_CFG_LOCK_TIMEOUT);\n \n \tif (status == ICE_ERR_AQ_NO_WORK)\n-\t\tice_debug(hw, ICE_DBG_PKG,\n-\t\t\t \"Global config lock: No work to do\\n\");\n+\t\tice_debug(hw, ICE_DBG_PKG, \"Global config lock: No work to do\\n\");\n \n \treturn status;\n }\n@@ -920,8 +919,7 @@ ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count)\n \t\t\t\t\t last, &offset, &info, NULL);\n \n \t\tif (status) {\n-\t\t\tice_debug(hw, ICE_DBG_PKG,\n-\t\t\t\t \"Update pkg failed: err %d off %d inf %d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_PKG, \"Update pkg failed: err %d off %d inf %d\\n\",\n \t\t\t\t status, offset, info);\n \t\t\tbreak;\n \t\t}\n@@ -999,8 +997,7 @@ ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)\n \t\t/* Save AQ status from download package */\n \t\thw->pkg_dwnld_status = hw->adminq.sq_last_status;\n \t\tif (status) {\n-\t\t\tice_debug(hw, ICE_DBG_PKG,\n-\t\t\t\t \"Pkg download failed: err %d off %d inf %d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_PKG, \"Pkg download failed: err %d off %d inf %d\\n\",\n \t\t\t\t status, offset, info);\n \t\t\tbreak;\n \t\t}\n@@ -1097,8 +1094,7 @@ ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)\n \t\t\t meta_seg->pkg_ver.update, meta_seg->pkg_ver.draft,\n \t\t\t meta_seg->pkg_name);\n \t} else {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Did not find metadata segment in driver package\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Did not find metadata segment in driver package\\n\");\n \t\treturn ICE_ERR_CFG;\n \t}\n \n@@ -1115,8 +1111,7 @@ ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)\n \t\t\t seg_hdr->seg_format_ver.draft,\n \t\t\t seg_hdr->seg_id);\n \t} else {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Did not find ice segment in driver package\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Did not find ice segment in driver package\\n\");\n \t\treturn ICE_ERR_CFG;\n \t}\n \n@@ -1339,8 +1334,7 @@ ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,\n \t\t (*seg)->hdr.seg_format_ver.minor >\n \t\t\tpkg->pkg_info[i].ver.minor) {\n \t\t\tstatus = ICE_ERR_FW_DDP_MISMATCH;\n-\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"OS package is not compatible with NVM.\\n\");\n+\t\t\tice_debug(hw, ICE_DBG_INIT, \"OS package is not compatible with NVM.\\n\");\n \t\t}\n \t\t/* done processing NVM package so break */\n \t\tbreak;\n@@ -1408,8 +1402,7 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)\n \tice_init_pkg_hints(hw, seg);\n \tstatus = ice_download_pkg(hw, seg);\n \tif (status == ICE_ERR_AQ_NO_WORK) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"package previously loaded - no work.\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"package previously loaded - no work.\\n\");\n \t\tstatus = ICE_SUCCESS;\n \t}\n \n@@ -4059,8 +4052,7 @@ ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)\n \t\tif (ent->profile_cookie == hdl)\n \t\t\treturn true;\n \n-\tice_debug(hw, ICE_DBG_INIT,\n-\t\t \"Characteristic list for VSI group %d not found.\\n\",\n+\tice_debug(hw, ICE_DBG_INIT, \"Characteristic list for VSI group %d not found.\\n\",\n \t\t vsig);\n \treturn false;\n }\n@@ -5372,8 +5364,7 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,\n \t\t\tif (attr_used_cnt < ICE_MAX_PTG_ATTRS)\n \t\t\t\tattr_used[attr_used_cnt++] = &t->tcam[i];\n \t\t\telse\n-\t\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t\t \"Warn: ICE_MAX_PTG_ATTRS exceeded\\n\");\n+\t\t\t\tice_debug(hw, ICE_DBG_INIT, \"Warn: ICE_MAX_PTG_ATTRS exceeded\\n\");\n \t\t}\n \t}\n \ndiff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c\nindex 98c07778b..3bc78f87b 100644\n--- a/drivers/net/ice/base/ice_flow.c\n+++ b/drivers/net/ice/base/ice_flow.c\n@@ -1856,8 +1856,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,\n \n \tstatus = ice_flow_proc_segs(hw, params);\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_FLOW,\n-\t\t\t \"Error processing a flow's packet segments\\n\");\n+\t\tice_debug(hw, ICE_DBG_FLOW, \"Error processing a flow's packet segments\\n\");\n \t\tgoto out;\n \t}\n \n@@ -2106,8 +2105,7 @@ ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,\n \t\tif (!status)\n \t\t\tice_set_bit(vsi_handle, prof->vsis);\n \t\telse\n-\t\t\tice_debug(hw, ICE_DBG_FLOW,\n-\t\t\t\t \"HW profile add failed, %d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_FLOW, \"HW profile add failed, %d\\n\",\n \t\t\t\t status);\n \t}\n \n@@ -2138,8 +2136,7 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,\n \t\tif (!status)\n \t\t\tice_clear_bit(vsi_handle, prof->vsis);\n \t\telse\n-\t\t\tice_debug(hw, ICE_DBG_FLOW,\n-\t\t\t\t \"HW profile remove failed, %d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_FLOW, \"HW profile remove failed, %d\\n\",\n \t\t\t\t status);\n \t}\n \ndiff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c\nindex 22d7d9439..b4fb28bfb 100644\n--- a/drivers/net/ice/base/ice_nvm.c\n+++ b/drivers/net/ice/base/ice_nvm.c\n@@ -78,8 +78,7 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,\n \n \t/* Verify the length of the read if this is for the Shadow RAM */\n \tif (read_shadow_ram && ((offset + inlen) > (hw->nvm.sr_words * 2u))) {\n-\t\tice_debug(hw, ICE_DBG_NVM,\n-\t\t\t \"NVM error: requested data is beyond Shadow RAM limit\\n\");\n+\t\tice_debug(hw, ICE_DBG_NVM, \"NVM error: requested data is beyond Shadow RAM limit\\n\");\n \t\treturn ICE_ERR_PARAM;\n \t}\n \n@@ -340,16 +339,14 @@ ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)\n \t */\n \tpba_size--;\n \tif (pba_num_size < (((u32)pba_size * 2) + 1)) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Buffer too small for PBA data.\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Buffer too small for PBA data.\\n\");\n \t\treturn ICE_ERR_PARAM;\n \t}\n \n \tfor (i = 0; i < pba_size; i++) {\n \t\tstatus = ice_read_sr_word(hw, (pba_tlv + 2 + 1) + i, &pba_word);\n \t\tif (status != ICE_SUCCESS) {\n-\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"Failed to read PBA Block word %d.\\n\", i);\n+\t\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read PBA Block word %d.\\n\", i);\n \t\t\treturn status;\n \t\t}\n \n@@ -378,8 +375,7 @@ static enum ice_status ice_get_orom_ver_info(struct ice_hw *hw)\n \tstatus = ice_get_pfa_module_tlv(hw, &boot_cfg_tlv, &boot_cfg_tlv_len,\n \t\t\t\t\tICE_SR_BOOT_CFG_PTR);\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Failed to read Boot Configuration Block TLV.\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read Boot Configuration Block TLV.\\n\");\n \t\treturn status;\n \t}\n \n@@ -387,8 +383,7 @@ static enum ice_status ice_get_orom_ver_info(struct ice_hw *hw)\n \t * (Combo Image Version High and Combo Image Version Low)\n \t */\n \tif (boot_cfg_tlv_len < 2) {\n-\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t \"Invalid Boot Configuration Block TLV size.\\n\");\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Invalid Boot Configuration Block TLV size.\\n\");\n \t\treturn ICE_ERR_INVAL_SIZE;\n \t}\n \n@@ -444,14 +439,12 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)\n \t\tstatus = ice_read_flat_nvm(hw, offset, &len, &data, false);\n \t\tif (status == ICE_ERR_AQ_ERROR &&\n \t\t hw->adminq.sq_last_status == ICE_AQ_RC_EINVAL) {\n-\t\t\tice_debug(hw, ICE_DBG_NVM,\n-\t\t\t\t \"%s: New upper bound of %u bytes\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_NVM, \"%s: New upper bound of %u bytes\\n\",\n \t\t\t\t __func__, offset);\n \t\t\tstatus = ICE_SUCCESS;\n \t\t\tmax_size = offset;\n \t\t} else if (!status) {\n-\t\t\tice_debug(hw, ICE_DBG_NVM,\n-\t\t\t\t \"%s: New lower bound of %u bytes\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_NVM, \"%s: New lower bound of %u bytes\\n\",\n \t\t\t\t __func__, offset);\n \t\t\tmin_size = offset;\n \t\t} else {\n@@ -460,8 +453,7 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)\n \t\t}\n \t}\n \n-\tice_debug(hw, ICE_DBG_NVM,\n-\t\t \"Predicted flash size is %u bytes\\n\", max_size);\n+\tice_debug(hw, ICE_DBG_NVM, \"Predicted flash size is %u bytes\\n\", max_size);\n \n \thw->nvm.flash_size = max_size;\n \n@@ -504,8 +496,7 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)\n \t} else {\n \t\t/* Blank programming mode */\n \t\tnvm->blank_nvm_mode = true;\n-\t\tice_debug(hw, ICE_DBG_NVM,\n-\t\t\t \"NVM init error: unsupported blank mode.\\n\");\n+\t\tice_debug(hw, ICE_DBG_NVM, \"NVM init error: unsupported blank mode.\\n\");\n \t\treturn ICE_ERR_NVM_BLANK_MODE;\n \t}\n \n@@ -805,8 +796,7 @@ ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,\n \t\tbreak;\n \t}\n \n-\tice_debug(hw, ICE_DBG_NVM,\n-\t\t \"NVM access: writing register %08x with value %08x\\n\",\n+\tice_debug(hw, ICE_DBG_NVM, \"NVM access: writing register %08x with value %08x\\n\",\n \t\t cmd->offset, data->regval);\n \n \t/* Write the data field to the specified register */\ndiff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c\nindex f5f3b85d6..d05fbfccd 100644\n--- a/drivers/net/ice/base/ice_sched.c\n+++ b/drivers/net/ice/base/ice_sched.c\n@@ -165,8 +165,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,\n \tparent = ice_sched_find_node_by_teid(pi->root,\n \t\t\t\t\t LE32_TO_CPU(info->parent_teid));\n \tif (!parent) {\n-\t\tice_debug(hw, ICE_DBG_SCHED,\n-\t\t\t \"Parent Node not found for parent_teid=0x%x\\n\",\n+\t\tice_debug(hw, ICE_DBG_SCHED, \"Parent Node not found for parent_teid=0x%x\\n\",\n \t\t\t LE32_TO_CPU(info->parent_teid));\n \t\treturn ICE_ERR_PARAM;\n \t}\n@@ -742,8 +741,7 @@ static void ice_sched_clear_rl_prof(struct ice_port_info *pi)\n \t\t\trl_prof_elem->prof_id_ref = 0;\n \t\t\tstatus = ice_sched_del_rl_profile(hw, rl_prof_elem);\n \t\t\tif (status) {\n-\t\t\t\tice_debug(hw, ICE_DBG_SCHED,\n-\t\t\t\t\t \"Remove rl profile failed\\n\");\n+\t\t\t\tice_debug(hw, ICE_DBG_SCHED, \"Remove rl profile failed\\n\");\n \t\t\t\t/* On error, free mem required */\n \t\t\t\tLIST_DEL(&rl_prof_elem->list_entry);\n \t\t\t\tice_free(hw, rl_prof_elem);\n@@ -930,8 +928,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,\n \tfor (i = 0; i < num_nodes; i++) {\n \t\tstatus = ice_sched_add_node(pi, layer, &buf->generic[i]);\n \t\tif (status != ICE_SUCCESS) {\n-\t\t\tice_debug(hw, ICE_DBG_SCHED,\n-\t\t\t\t \"add nodes in SW DB failed status =%d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_SCHED, \"add nodes in SW DB failed status =%d\\n\",\n \t\t\t\t status);\n \t\t\tbreak;\n \t\t}\n@@ -939,8 +936,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,\n \t\tteid = LE32_TO_CPU(buf->generic[i].node_teid);\n \t\tnew_node = ice_sched_find_node_by_teid(parent, teid);\n \t\tif (!new_node) {\n-\t\t\tice_debug(hw, ICE_DBG_SCHED,\n-\t\t\t\t \"Node is missing for teid =%d\\n\", teid);\n+\t\t\tice_debug(hw, ICE_DBG_SCHED, \"Node is missing for teid =%d\\n\", teid);\n \t\t\tbreak;\n \t\t}\n \n@@ -1297,8 +1293,7 @@ struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)\n \tice_release_lock(&pi->sched_lock);\n \n \tif (!node)\n-\t\tice_debug(pi->hw, ICE_DBG_SCHED,\n-\t\t\t \"Node not found for teid=0x%x\\n\", teid);\n+\t\tice_debug(pi->hw, ICE_DBG_SCHED, \"Node not found for teid=0x%x\\n\", teid);\n \n \treturn node;\n }\n@@ -2048,8 +2043,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)\n \t\t\tcontinue;\n \n \t\tif (ice_sched_is_leaf_node_present(vsi_node)) {\n-\t\t\tice_debug(pi->hw, ICE_DBG_SCHED,\n-\t\t\t\t \"VSI has leaf nodes in TC %d\\n\", i);\n+\t\t\tice_debug(pi->hw, ICE_DBG_SCHED, \"VSI has leaf nodes in TC %d\\n\", i);\n \t\t\tstatus = ICE_ERR_IN_USE;\n \t\t\tgoto exit_sched_rm_vsi_cfg;\n \t\t}\n@@ -2891,8 +2885,7 @@ static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)\n \t\t\t\t\t &pi->rl_prof_list[ln],\n \t\t\t\t\t ice_aqc_rl_profile_info, list_entry) {\n \t\t\tif (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))\n-\t\t\t\tice_debug(pi->hw, ICE_DBG_SCHED,\n-\t\t\t\t\t \"Removed rl profile\\n\");\n+\t\t\t\tice_debug(pi->hw, ICE_DBG_SCHED, \"Removed rl profile\\n\");\n \t\t}\n \t}\n }\n@@ -4143,8 +4136,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,\n \t\t\t/* Remove old profile ID from database */\n \t\t\tstatus = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);\n \t\t\tif (status && status != ICE_ERR_IN_USE)\n-\t\t\t\tice_debug(pi->hw, ICE_DBG_SCHED,\n-\t\t\t\t\t \"Remove rl profile failed\\n\");\n+\t\t\t\tice_debug(pi->hw, ICE_DBG_SCHED, \"Remove rl profile failed\\n\");\n \t\t\tbreak;\n \t\t}\n \tif (status == ICE_ERR_IN_USE)\ndiff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex 69fa64ac9..a82af6fa0 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -1823,8 +1823,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)\n \tstatus = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,\n \t\t\t\t ice_aqc_opc_free_res, NULL);\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t \"VEB counter resource could not be freed\\n\");\n+\t\tice_debug(hw, ICE_DBG_SW, \"VEB counter resource could not be freed\\n\");\n \t\tret_status = status;\n \t}\n \n@@ -2218,8 +2217,7 @@ ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,\n \t\t\treturn ICE_ERR_PARAM;\n \t\tbreak;\n \tdefault:\n-\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t \"Error due to unsupported rule_type %u\\n\", rule_type);\n+\t\tice_debug(hw, ICE_DBG_SW, \"Error due to unsupported rule_type %u\\n\", rule_type);\n \t\treturn ICE_ERR_OUT_OF_RANGE;\n \t}\n \n@@ -2241,8 +2239,7 @@ ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,\n \t\t\t * than ICE_MAX_VSI, if not return with error.\n \t\t\t */\n \t\t\tif (id >= ICE_MAX_VSI) {\n-\t\t\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t\t\t \"Error VSI index (%u) out-of-range\\n\",\n+\t\t\t\tice_debug(hw, ICE_DBG_SW, \"Error VSI index (%u) out-of-range\\n\",\n \t\t\t\t\t id);\n \t\t\t\tice_free(hw, mr_list);\n \t\t\t\treturn ICE_ERR_OUT_OF_RANGE;\n@@ -2649,8 +2646,7 @@ ice_init_port_info(struct ice_port_info *pi, u16 vsi_port_num, u8 type,\n \t\tpi->dflt_rx_vsi_num = ICE_DFLT_VSI_INVAL;\n \t\tbreak;\n \tdefault:\n-\t\tice_debug(pi->hw, ICE_DBG_SW,\n-\t\t\t \"incorrect VSI/port type received\\n\");\n+\t\tice_debug(pi->hw, ICE_DBG_SW, \"incorrect VSI/port type received\\n\");\n \t\tbreak;\n \t}\n }\n@@ -2714,8 +2710,7 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)\n \t\t\tcase ICE_AQC_GET_SW_CONF_RESP_PHYS_PORT:\n \t\t\tcase ICE_AQC_GET_SW_CONF_RESP_VIRT_PORT:\n \t\t\t\tif (j == num_total_ports) {\n-\t\t\t\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t\t\t\t \"more ports than expected\\n\");\n+\t\t\t\t\tice_debug(hw, ICE_DBG_SW, \"more ports than expected\\n\");\n \t\t\t\t\tstatus = ICE_ERR_CFG;\n \t\t\t\t\tgoto out;\n \t\t\t\t}\n@@ -3709,8 +3704,7 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,\n \t\ttmp_fltr_info.vsi_handle = rem_vsi_handle;\n \t\tstatus = ice_update_pkt_fwd_rule(hw, &tmp_fltr_info);\n \t\tif (status) {\n-\t\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t\t \"Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_SW, \"Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\\n\",\n \t\t\t\t tmp_fltr_info.fwd_id.hw_vsi_id, status);\n \t\t\treturn status;\n \t\t}\n@@ -3726,8 +3720,7 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,\n \t\t/* Remove the VSI list since it is no longer used */\n \t\tstatus = ice_remove_vsi_list_rule(hw, vsi_list_id, lkup_type);\n \t\tif (status) {\n-\t\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t\t \"Failed to remove VSI list %d, error %d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_SW, \"Failed to remove VSI list %d, error %d\\n\",\n \t\t\t\t vsi_list_id, status);\n \t\t\treturn status;\n \t\t}\n@@ -4188,8 +4181,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,\n \t\t */\n \t\tif (v_list_itr->vsi_count > 1 &&\n \t\t v_list_itr->vsi_list_info->ref_cnt > 1) {\n-\t\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t\t \"Invalid configuration: Optimization to reuse VSI list with more than one VSI is not being done yet\\n\");\n+\t\t\tice_debug(hw, ICE_DBG_SW, \"Invalid configuration: Optimization to reuse VSI list with more than one VSI is not being done yet\\n\");\n \t\t\tstatus = ICE_ERR_CFG;\n \t\t\tgoto exit;\n \t\t}\n@@ -5403,8 +5395,7 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle,\n \t\tice_remove_eth_mac(hw, &remove_list_head);\n \t\tbreak;\n \tcase ICE_SW_LKUP_DFLT:\n-\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t \"Remove filters for this lookup type hasn't been implemented yet\\n\");\n+\t\tice_debug(hw, ICE_DBG_SW, \"Remove filters for this lookup type hasn't been implemented yet\\n\");\n \t\tbreak;\n \tcase ICE_SW_LKUP_LAST:\n \t\tice_debug(hw, ICE_DBG_SW, \"Unsupported lookup type\\n\");\n@@ -5526,8 +5517,7 @@ ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,\n \tstatus = ice_aq_alloc_free_res(hw, 1, buf, buf_len,\n \t\t\t\t ice_aqc_opc_free_res, NULL);\n \tif (status)\n-\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t \"counter resource could not be freed\\n\");\n+\t\tice_debug(hw, ICE_DBG_SW, \"counter resource could not be freed\\n\");\n \n \tice_free(hw, buf);\n \treturn status;\n@@ -6306,8 +6296,7 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,\n \t\t\t * that can be used.\n \t\t\t */\n \t\t\tif (chain_idx >= ICE_MAX_FV_WORDS) {\n-\t\t\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t\t\t \"No chain index available\\n\");\n+\t\t\t\tice_debug(hw, ICE_DBG_SW, \"No chain index available\\n\");\n \t\t\t\tstatus = ICE_ERR_MAX_LIMIT;\n \t\t\t\tgoto err_unroll;\n \t\t\t}\n@@ -7948,8 +7937,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,\n \t\t */\n \t\tstatus = ice_update_pkt_fwd_rule(hw, &tmp_fltr);\n \t\tif (status) {\n-\t\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t\t \"Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_SW, \"Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\\n\",\n \t\t\t\t tmp_fltr.fwd_id.hw_vsi_id, status);\n \t\t\treturn status;\n \t\t}\n@@ -7958,8 +7946,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,\n \t\t/* Remove the VSI list since it is no longer used */\n \t\tstatus = ice_remove_vsi_list_rule(hw, vsi_list_id, lkup_type);\n \t\tif (status) {\n-\t\t\tice_debug(hw, ICE_DBG_SW,\n-\t\t\t\t \"Failed to remove VSI list %d, error %d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_SW, \"Failed to remove VSI list %d, error %d\\n\",\n \t\t\t\t vsi_list_id, status);\n \t\t\treturn status;\n \t\t}\n", "prefixes": [ "v2", "17/40" ] }