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GET /api/patches/77396/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 77396,
    "url": "http://patches.dpdk.org/api/patches/77396/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-10-qi.z.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200911131954.15999-10-qi.z.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200911131954.15999-10-qi.z.zhang@intel.com",
    "date": "2020-09-11T13:19:23",
    "name": "[v2,09/40] net/ice/base: replace single-element array used for C struct hack",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "ac33f4173f30808b80fddf8697b9b0ea16e98fb9",
    "submitter": {
        "id": 504,
        "url": "http://patches.dpdk.org/api/people/504/?format=api",
        "name": "Qi Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-10-qi.z.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 12148,
            "url": "http://patches.dpdk.org/api/series/12148/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12148",
            "date": "2020-09-11T13:19:15",
            "name": "ice base code update",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/12148/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/77396/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/77396/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CC8D7A04B7;\n\tFri, 11 Sep 2020 15:17:46 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 23BBC1C192;\n\tFri, 11 Sep 2020 15:16:20 +0200 (CEST)",
            "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 3CB541C128\n for <dev@dpdk.org>; Fri, 11 Sep 2020 15:16:14 +0200 (CEST)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Sep 2020 06:16:13 -0700",
            "from dpdk51.sh.intel.com ([10.67.111.82])\n by FMSMGA003.fm.intel.com with ESMTP; 11 Sep 2020 06:16:12 -0700"
        ],
        "IronPort-SDR": [
            "\n hU1UOQCFc6YxbVd2VqJODLL+YXn/USy8x9/iUUrI3FvHOrOj51QuJNbDJUS7mDrX1EjwTh6sID\n C+JhSKhlhv3A==",
            "\n 68RsYDnKVt1JJLBatZTPrH0Mr2/WNNFzhHOVPCPJVHk7H1tCp77wNBO3TAcrumavYYDSuROYyJ\n woaKhKzLC+xA=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9740\"; a=\"146482170\"",
            "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"146482170\"",
            "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"342296508\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Qi Zhang <qi.z.zhang@intel.com>",
        "To": "ferruh.yigit@intel.com",
        "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Bruce Allan <bruce.w.allan@intel.com>",
        "Date": "Fri, 11 Sep 2020 21:19:23 +0800",
        "Message-Id": "<20200911131954.15999-10-qi.z.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.13.6",
        "In-Reply-To": "<20200911131954.15999-1-qi.z.zhang@intel.com>",
        "References": "<20200907112826.48493-1-qi.z.zhang@intel.com>\n <20200911131954.15999-1-qi.z.zhang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2 09/40] net/ice/base: replace single-element\n\tarray used for C struct hack",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Convert the pre-C90-extension \"C struct hack\" method (using a single-\nelement array at the end of a structure for implementing variable-length\ntypes) to the preferred use of C99 flexible array member.\n\nSigned-off-by: Bruce Allan <bruce.w.allan@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_adminq_cmd.h | 22 +++++-----\n drivers/net/ice/base/ice_common.c     | 77 ++++++++++++++++++-----------------\n drivers/net/ice/base/ice_dcb.h        | 10 +----\n drivers/net/ice/base/ice_flex_pipe.c  | 33 ++++++++++-----\n drivers/net/ice/base/ice_flex_type.h  | 49 +++++++++-------------\n drivers/net/ice/base/ice_sched.c      | 10 +++--\n drivers/net/ice/base/ice_switch.c     | 32 ++++++---------\n drivers/net/ice/base/ice_switch.h     | 24 ++++-------\n drivers/net/ice/base/ice_type.h       |  7 ++++\n drivers/net/ice/ice_rxtx.c            | 43 ++++++++++++-------\n 10 files changed, 158 insertions(+), 149 deletions(-)",
    "diff": "diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h\nindex df41cce06..d7a57fe6b 100644\n--- a/drivers/net/ice/base/ice_adminq_cmd.h\n+++ b/drivers/net/ice/base/ice_adminq_cmd.h\n@@ -312,7 +312,7 @@ struct ice_aqc_alloc_free_res_elem {\n #define ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_M\t\\\n \t\t\t\t(0xF << ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_S)\n \t__le16 num_elems;\n-\tstruct ice_aqc_res_elem elem[1];\n+\tstruct ice_aqc_res_elem elem[STRUCT_HACK_VAR_LEN];\n };\n \n /* Get Allocated Resource Descriptors Command (indirect 0x020A) */\n@@ -812,7 +812,7 @@ struct ice_sw_rule_lkup_rx_tx {\n \t * lookup-type\n \t */\n \t__le16 hdr_len;\n-\tu8 hdr[1];\n+\tu8 hdr[STRUCT_HACK_VAR_LEN];\n };\n \n /* Add/Update/Remove large action command/response entry\n@@ -872,7 +872,7 @@ struct ice_sw_rule_lg_act {\n #define ICE_LG_ACT_STAT_COUNT\t\t0x7\n #define ICE_LG_ACT_STAT_COUNT_S\t\t3\n #define ICE_LG_ACT_STAT_COUNT_M\t\t(0x7F << ICE_LG_ACT_STAT_COUNT_S)\n-\t__le32 act[1]; /* array of size for actions */\n+\t__le32 act[STRUCT_HACK_VAR_LEN]; /* array of size for actions */\n };\n \n /* Add/Update/Remove VSI list command/response entry\n@@ -882,7 +882,7 @@ struct ice_sw_rule_lg_act {\n struct ice_sw_rule_vsi_list {\n \t__le16 index; /* Index of VSI/Prune list */\n \t__le16 number_vsi;\n-\t__le16 vsi[1]; /* Array of number_vsi VSI numbers */\n+\t__le16 vsi[STRUCT_HACK_VAR_LEN]; /* Array of number_vsi VSI numbers */\n };\n \n #pragma pack(1)\n@@ -989,7 +989,7 @@ struct ice_aqc_txsched_move_grp_info_hdr {\n \n struct ice_aqc_move_elem {\n \tstruct ice_aqc_txsched_move_grp_info_hdr hdr;\n-\t__le32 teid[1];\n+\t__le32 teid[STRUCT_HACK_VAR_LEN];\n };\n \n struct ice_aqc_elem_info_bw {\n@@ -1042,7 +1042,7 @@ struct ice_aqc_txsched_topo_grp_info_hdr {\n \n struct ice_aqc_add_elem {\n \tstruct ice_aqc_txsched_topo_grp_info_hdr hdr;\n-\tstruct ice_aqc_txsched_elem_data generic[1];\n+\tstruct ice_aqc_txsched_elem_data generic[STRUCT_HACK_VAR_LEN];\n };\n \n struct ice_aqc_get_topo_elem {\n@@ -1053,7 +1053,7 @@ struct ice_aqc_get_topo_elem {\n \n struct ice_aqc_delete_elem {\n \tstruct ice_aqc_txsched_topo_grp_info_hdr hdr;\n-\t__le32 teid[1];\n+\t__le32 teid[STRUCT_HACK_VAR_LEN];\n };\n \n /* Query Port ETS (indirect 0x040E)\n@@ -2426,7 +2426,7 @@ struct ice_aqc_add_tx_qgrp {\n \t__le32 parent_teid;\n \tu8 num_txqs;\n \tu8 rsvd[3];\n-\tstruct ice_aqc_add_txqs_perq txqs[1];\n+\tstruct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];\n };\n \n /* Disable Tx LAN Queues (indirect 0x0C31) */\n@@ -2470,7 +2470,7 @@ struct ice_aqc_dis_txq_item {\n \t\t\t(0 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)\n #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_RDMA_QSET\t\\\n \t\t\t(1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)\n-\t__le16 q_id[1];\n+\t__le16 q_id[STRUCT_HACK_VAR_LEN];\n };\n \n #pragma pack()\n@@ -2514,7 +2514,7 @@ struct ice_aqc_move_txqs_elem {\n struct ice_aqc_move_txqs_data {\n \t__le32 src_teid;\n \t__le32 dest_teid;\n-\tstruct ice_aqc_move_txqs_elem txqs[1];\n+\tstruct ice_aqc_move_txqs_elem txqs[STRUCT_HACK_VAR_LEN];\n };\n \n /* Download Package (indirect 0x0C40) */\n@@ -2567,7 +2567,7 @@ struct ice_aqc_get_pkg_info {\n /* Get Package Info List response buffer format (0x0C43) */\n struct ice_aqc_get_pkg_info_resp {\n \t__le32 count;\n-\tstruct ice_aqc_get_pkg_info pkg_info[1];\n+\tstruct ice_aqc_get_pkg_info pkg_info[STRUCT_HACK_VAR_LEN];\n };\n \n /* Driver Shared Parameters (direct, 0x0C90) */\ndiff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex 92b2df741..d9ad3217a 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -1739,9 +1739,8 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)\n \tenum ice_status status;\n \tu16 buf_len;\n \n-\tbuf_len = ice_struct_size(buf, elem, num - 1);\n-\tbuf = (struct ice_aqc_alloc_free_res_elem *)\n-\t\tice_malloc(hw, buf_len);\n+\tbuf_len = ice_struct_size(buf, elem, num);\n+\tbuf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);\n \tif (!buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n \n@@ -1757,7 +1756,7 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)\n \tif (status)\n \t\tgoto ice_alloc_res_exit;\n \n-\tice_memcpy(res, buf->elem, sizeof(buf->elem) * num,\n+\tice_memcpy(res, buf->elem, sizeof(*buf->elem) * num,\n \t\t   ICE_NONDMA_TO_NONDMA);\n \n ice_alloc_res_exit:\n@@ -1778,7 +1777,7 @@ enum ice_status ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)\n \tenum ice_status status;\n \tu16 buf_len;\n \n-\tbuf_len = ice_struct_size(buf, elem, num - 1);\n+\tbuf_len = ice_struct_size(buf, elem, num);\n \tbuf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);\n \tif (!buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n@@ -1786,7 +1785,7 @@ enum ice_status ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)\n \t/* Prepare buffer to free resource. */\n \tbuf->num_elems = CPU_TO_LE16(num);\n \tbuf->res_type = CPU_TO_LE16(type);\n-\tice_memcpy(buf->elem, res, sizeof(buf->elem) * num,\n+\tice_memcpy(buf->elem, res, sizeof(*buf->elem) * num,\n \t\t   ICE_NONDMA_TO_NONDMA);\n \n \tstatus = ice_aq_alloc_free_res(hw, num, buf, buf_len,\n@@ -3474,10 +3473,10 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,\n \t\t   struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,\n \t\t   struct ice_sq_cd *cd)\n {\n-\tu16 i, sum_header_size, sum_q_size = 0;\n \tstruct ice_aqc_add_tx_qgrp *list;\n \tstruct ice_aqc_add_txqs *cmd;\n \tstruct ice_aq_desc desc;\n+\tu16 i, sum_size = 0;\n \n \tice_debug(hw, ICE_DBG_TRACE, \"%s\\n\", __func__);\n \n@@ -3491,18 +3490,13 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,\n \tif (num_qgrps > ICE_LAN_TXQ_MAX_QGRPS)\n \t\treturn ICE_ERR_PARAM;\n \n-\tsum_header_size = num_qgrps *\n-\t\t(sizeof(*qg_list) - sizeof(*qg_list->txqs));\n-\n-\tlist = qg_list;\n-\tfor (i = 0; i < num_qgrps; i++) {\n-\t\tstruct ice_aqc_add_txqs_perq *q = list->txqs;\n-\n-\t\tsum_q_size += list->num_txqs * sizeof(*q);\n-\t\tlist = (struct ice_aqc_add_tx_qgrp *)(q + list->num_txqs);\n+\tfor (i = 0, list = qg_list; i < num_qgrps; i++) {\n+\t\tsum_size += ice_struct_size(list, txqs, list->num_txqs);\n+\t\tlist = (struct ice_aqc_add_tx_qgrp *)(list->txqs +\n+\t\t\t\t\t\t      list->num_txqs);\n \t}\n \n-\tif (buf_size != (sum_header_size + sum_q_size))\n+\tif (buf_size != sum_size)\n \t\treturn ICE_ERR_PARAM;\n \n \tdesc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);\n@@ -3530,6 +3524,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,\n \t\t   enum ice_disq_rst_src rst_src, u16 vmvf_num,\n \t\t   struct ice_sq_cd *cd)\n {\n+\tstruct ice_aqc_dis_txq_item *item;\n \tstruct ice_aqc_dis_txqs *cmd;\n \tstruct ice_aq_desc desc;\n \tenum ice_status status;\n@@ -3573,16 +3568,16 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,\n \t */\n \tdesc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);\n \n-\tfor (i = 0; i < num_qgrps; ++i) {\n-\t\t/* Calculate the size taken up by the queue IDs in this group */\n-\t\tsz += qg_list[i].num_qs * sizeof(qg_list[i].q_id);\n-\n-\t\t/* Add the size of the group header */\n-\t\tsz += sizeof(qg_list[i]) - sizeof(qg_list[i].q_id);\n+\tfor (i = 0, item = qg_list; i < num_qgrps; i++) {\n+\t\tu16 item_size = ice_struct_size(item, q_id, item->num_qs);\n \n \t\t/* If the num of queues is even, add 2 bytes of padding */\n-\t\tif ((qg_list[i].num_qs % 2) == 0)\n-\t\t\tsz += 2;\n+\t\tif ((item->num_qs % 2) == 0)\n+\t\t\titem_size += 2;\n+\n+\t\tsz += item_size;\n+\n+\t\titem = (struct ice_aqc_dis_txq_item *)((u8 *)item + item_size);\n \t}\n \n \tif (buf_size != sz)\n@@ -4268,24 +4263,32 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,\n \t\tstruct ice_sq_cd *cd)\n {\n \tenum ice_status status = ICE_ERR_DOES_NOT_EXIST;\n-\tstruct ice_aqc_dis_txq_item qg_list;\n+\tstruct ice_aqc_dis_txq_item *qg_list;\n \tstruct ice_q_ctx *q_ctx;\n-\tu16 i;\n+\tstruct ice_hw *hw;\n+\tu16 i, buf_size;\n \n \tif (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)\n \t\treturn ICE_ERR_CFG;\n \n+\thw = pi->hw;\n+\n \tif (!num_queues) {\n \t\t/* if queue is disabled already yet the disable queue command\n \t\t * has to be sent to complete the VF reset, then call\n \t\t * ice_aq_dis_lan_txq without any queue information\n \t\t */\n \t\tif (rst_src)\n-\t\t\treturn ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src,\n+\t\t\treturn ice_aq_dis_lan_txq(hw, 0, NULL, 0, rst_src,\n \t\t\t\t\t\t  vmvf_num, NULL);\n \t\treturn ICE_ERR_CFG;\n \t}\n \n+\tbuf_size = ice_struct_size(qg_list, q_id, 1);\n+\tqg_list = (struct ice_aqc_dis_txq_item *)ice_malloc(hw, buf_size);\n+\tif (!qg_list)\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\n \tice_acquire_lock(&pi->sched_lock);\n \n \tfor (i = 0; i < num_queues; i++) {\n@@ -4294,23 +4297,22 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,\n \t\tnode = ice_sched_find_node_by_teid(pi->root, q_teids[i]);\n \t\tif (!node)\n \t\t\tcontinue;\n-\t\tq_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handles[i]);\n+\t\tq_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handles[i]);\n \t\tif (!q_ctx) {\n-\t\t\tice_debug(pi->hw, ICE_DBG_SCHED, \"invalid queue handle%d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_SCHED, \"invalid queue handle%d\\n\",\n \t\t\t\t  q_handles[i]);\n \t\t\tcontinue;\n \t\t}\n \t\tif (q_ctx->q_handle != q_handles[i]) {\n-\t\t\tice_debug(pi->hw, ICE_DBG_SCHED, \"Err:handles %d %d\\n\",\n+\t\t\tice_debug(hw, ICE_DBG_SCHED, \"Err:handles %d %d\\n\",\n \t\t\t\t  q_ctx->q_handle, q_handles[i]);\n \t\t\tcontinue;\n \t\t}\n-\t\tqg_list.parent_teid = node->info.parent_teid;\n-\t\tqg_list.num_qs = 1;\n-\t\tqg_list.q_id[0] = CPU_TO_LE16(q_ids[i]);\n-\t\tstatus = ice_aq_dis_lan_txq(pi->hw, 1, &qg_list,\n-\t\t\t\t\t    sizeof(qg_list), rst_src, vmvf_num,\n-\t\t\t\t\t    cd);\n+\t\tqg_list->parent_teid = node->info.parent_teid;\n+\t\tqg_list->num_qs = 1;\n+\t\tqg_list->q_id[0] = CPU_TO_LE16(q_ids[i]);\n+\t\tstatus = ice_aq_dis_lan_txq(hw, 1, qg_list, buf_size, rst_src,\n+\t\t\t\t\t    vmvf_num, cd);\n \n \t\tif (status != ICE_SUCCESS)\n \t\t\tbreak;\n@@ -4318,6 +4320,7 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,\n \t\tq_ctx->q_handle = ICE_INVAL_Q_HANDLE;\n \t}\n \tice_release_lock(&pi->sched_lock);\n+\tice_free(hw, qg_list);\n \treturn status;\n }\n \ndiff --git a/drivers/net/ice/base/ice_dcb.h b/drivers/net/ice/base/ice_dcb.h\nindex 83b6e4d8f..8f0e09d50 100644\n--- a/drivers/net/ice/base/ice_dcb.h\n+++ b/drivers/net/ice/base/ice_dcb.h\n@@ -103,17 +103,11 @@\n #define ICE_IEEE_APP_TLV_LEN\t\t11\n \n #pragma pack(1)\n-/* IEEE 802.1AB LLDP TLV structure */\n-struct ice_lldp_generic_tlv {\n-\t__be16 typelen;\n-\tu8 tlvinfo[1];\n-};\n-\n /* IEEE 802.1AB LLDP Organization specific TLV */\n struct ice_lldp_org_tlv {\n \t__be16 typelen;\n \t__be32 ouisubtype;\n-\tu8 tlvinfo[1];\n+\tu8 tlvinfo[STRUCT_HACK_VAR_LEN];\n };\n #pragma pack()\n \n@@ -136,7 +130,7 @@ struct ice_cee_feat_tlv {\n #define ICE_CEE_FEAT_TLV_WILLING_M\t0x40\n #define ICE_CEE_FEAT_TLV_ERR_M\t\t0x20\n \tu8 subtype;\n-\tu8 tlvinfo[1];\n+\tu8 tlvinfo[STRUCT_HACK_VAR_LEN];\n };\n \n #pragma pack(1)\ndiff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c\nindex bf8530e89..25d79b5c4 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.c\n+++ b/drivers/net/ice/base/ice_flex_pipe.c\n@@ -1138,7 +1138,7 @@ static enum ice_status ice_get_pkg_info(struct ice_hw *hw)\n \n \tice_debug(hw, ICE_DBG_TRACE, \"%s\\n\", __func__);\n \n-\tsize = ice_struct_size(pkg_info, pkg_info, ICE_PKG_CNT - 1);\n+\tsize = ice_struct_size(pkg_info, pkg_info, ICE_PKG_CNT);\n \tpkg_info = (struct ice_aqc_get_pkg_info_resp *)ice_malloc(hw, size);\n \tif (!pkg_info)\n \t\treturn ICE_ERR_NO_MEMORY;\n@@ -1197,7 +1197,7 @@ static enum ice_status ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len)\n \tu32 seg_count;\n \tu32 i;\n \n-\tif (len < sizeof(*pkg))\n+\tif (len < ice_struct_size(pkg, seg_offset, 1))\n \t\treturn ICE_ERR_BUF_TOO_SHORT;\n \n \tif (pkg->pkg_format_ver.major != ICE_PKG_FMT_VER_MAJ ||\n@@ -1212,7 +1212,7 @@ static enum ice_status ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len)\n \t\treturn ICE_ERR_CFG;\n \n \t/* make sure segment array fits in package length */\n-\tif (len < ice_struct_size(pkg, seg_offset, seg_count - 1))\n+\tif (len < ice_struct_size(pkg, seg_offset, seg_count))\n \t\treturn ICE_ERR_BUF_TOO_SHORT;\n \n \t/* all segments must fit within length */\n@@ -1321,7 +1321,7 @@ ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,\n \t}\n \n \t/* Check if FW is compatible with the OS package */\n-\tsize = ice_struct_size(pkg, pkg_info, ICE_PKG_CNT - 1);\n+\tsize = ice_struct_size(pkg, pkg_info, ICE_PKG_CNT);\n \tpkg = (struct ice_aqc_get_pkg_info_resp *)ice_malloc(hw, size);\n \tif (!pkg)\n \t\treturn ICE_ERR_NO_MEMORY;\n@@ -2049,14 +2049,14 @@ ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port)\n \n \tsect_rx = (struct ice_boost_tcam_section *)\n \t\tice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,\n-\t\t\t\t\t  sizeof(*sect_rx));\n+\t\t\t\t\t  ice_struct_size(sect_rx, tcam, 1));\n \tif (!sect_rx)\n \t\tgoto ice_create_tunnel_err;\n \tsect_rx->count = CPU_TO_LE16(1);\n \n \tsect_tx = (struct ice_boost_tcam_section *)\n \t\tice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,\n-\t\t\t\t\t  sizeof(*sect_tx));\n+\t\t\t\t\t  ice_struct_size(sect_tx, tcam, 1));\n \tif (!sect_tx)\n \t\tgoto ice_create_tunnel_err;\n \tsect_tx->count = CPU_TO_LE16(1);\n@@ -2134,7 +2134,7 @@ enum ice_status ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all)\n \t}\n \n \t/* size of section - there is at least one entry */\n-\tsize = ice_struct_size(sect_rx, tcam, count - 1);\n+\tsize = ice_struct_size(sect_rx, tcam, count);\n \n \tbld = ice_pkg_buf_alloc(hw);\n \tif (!bld) {\n@@ -4092,7 +4092,9 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,\n \n \t\t\tid = ice_sect_id(blk, ICE_VEC_TBL);\n \t\t\tp = (struct ice_pkg_es *)\n-\t\t\t\tice_pkg_buf_alloc_section(bld, id, sizeof(*p) +\n+\t\t\t\tice_pkg_buf_alloc_section(bld, id,\n+\t\t\t\t\t\t\t  ice_struct_size(p, es,\n+\t\t\t\t\t\t\t\t\t  1) +\n \t\t\t\t\t\t\t  vec_size -\n \t\t\t\t\t\t\t  sizeof(p->es[0]));\n \n@@ -4129,7 +4131,10 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,\n \n \t\t\tid = ice_sect_id(blk, ICE_PROF_TCAM);\n \t\t\tp = (struct ice_prof_id_section *)\n-\t\t\t\tice_pkg_buf_alloc_section(bld, id, sizeof(*p));\n+\t\t\t\tice_pkg_buf_alloc_section(bld, id,\n+\t\t\t\t\t\t\t  ice_struct_size(p,\n+\t\t\t\t\t\t\t\t\t  entry,\n+\t\t\t\t\t\t\t\t\t  1));\n \n \t\t\tif (!p)\n \t\t\t\treturn ICE_ERR_MAX_LIMIT;\n@@ -4166,7 +4171,10 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,\n \n \t\t\tid = ice_sect_id(blk, ICE_XLT1);\n \t\t\tp = (struct ice_xlt1_section *)\n-\t\t\t\tice_pkg_buf_alloc_section(bld, id, sizeof(*p));\n+\t\t\t\tice_pkg_buf_alloc_section(bld, id,\n+\t\t\t\t\t\t\t  ice_struct_size(p,\n+\t\t\t\t\t\t\t\t\t  value,\n+\t\t\t\t\t\t\t\t\t  1));\n \n \t\t\tif (!p)\n \t\t\t\treturn ICE_ERR_MAX_LIMIT;\n@@ -4201,7 +4209,10 @@ ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,\n \t\tcase ICE_VSIG_REM:\n \t\t\tid = ice_sect_id(blk, ICE_XLT2);\n \t\t\tp = (struct ice_xlt2_section *)\n-\t\t\t\tice_pkg_buf_alloc_section(bld, id, sizeof(*p));\n+\t\t\t\tice_pkg_buf_alloc_section(bld, id,\n+\t\t\t\t\t\t\t  ice_struct_size(p,\n+\t\t\t\t\t\t\t\t\t  value,\n+\t\t\t\t\t\t\t\t\t  1));\n \n \t\t\tif (!p)\n \t\t\t\treturn ICE_ERR_MAX_LIMIT;\ndiff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h\nindex b58007fb3..8f33efdd6 100644\n--- a/drivers/net/ice/base/ice_flex_type.h\n+++ b/drivers/net/ice/base/ice_flex_type.h\n@@ -27,7 +27,7 @@ struct ice_fv {\n struct ice_pkg_hdr {\n \tstruct ice_pkg_ver pkg_format_ver;\n \t__le32 seg_count;\n-\t__le32 seg_offset[1];\n+\t__le32 seg_offset[STRUCT_HACK_VAR_LEN];\n };\n \n /* generic segment */\n@@ -58,12 +58,12 @@ struct ice_device_id_entry {\n struct ice_seg {\n \tstruct ice_generic_seg_hdr hdr;\n \t__le32 device_table_count;\n-\tstruct ice_device_id_entry device_table[1];\n+\tstruct ice_device_id_entry device_table[STRUCT_HACK_VAR_LEN];\n };\n \n struct ice_nvm_table {\n \t__le32 table_count;\n-\t__le32 vers[1];\n+\t__le32 vers[STRUCT_HACK_VAR_LEN];\n };\n \n struct ice_buf {\n@@ -73,7 +73,7 @@ struct ice_buf {\n \n struct ice_buf_table {\n \t__le32 buf_count;\n-\tstruct ice_buf buf_array[1];\n+\tstruct ice_buf buf_array[STRUCT_HACK_VAR_LEN];\n };\n \n /* global metadata specific segment */\n@@ -106,11 +106,12 @@ struct ice_section_entry {\n struct ice_buf_hdr {\n \t__le16 section_count;\n \t__le16 data_end;\n-\tstruct ice_section_entry section_entry[1];\n+\tstruct ice_section_entry section_entry[STRUCT_HACK_VAR_LEN];\n };\n \n #define ICE_MAX_ENTRIES_IN_BUF(hd_sz, ent_sz) ((ICE_PKG_BUF_SIZE - \\\n-\tsizeof(struct ice_buf_hdr) - (hd_sz)) / (ent_sz))\n+\tice_struct_size((struct ice_buf_hdr *)0, section_entry, 1) - (hd_sz)) /\\\n+\t(ent_sz))\n \n /* ice package section IDs */\n #define ICE_SID_XLT0_SW\t\t\t10\n@@ -400,17 +401,17 @@ struct ice_label {\n \n struct ice_label_section {\n \t__le16 count;\n-\tstruct ice_label label[1];\n+\tstruct ice_label label[STRUCT_HACK_VAR_LEN];\n };\n \n #define ICE_MAX_LABELS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \\\n-\tsizeof(struct ice_label_section) - sizeof(struct ice_label), \\\n-\tsizeof(struct ice_label))\n+\tice_struct_size((struct ice_label_section *)0, label, 1) - \\\n+\tsizeof(struct ice_label), sizeof(struct ice_label))\n \n struct ice_sw_fv_section {\n \t__le16 count;\n \t__le16 base_offset;\n-\tstruct ice_fv fv[1];\n+\tstruct ice_fv fv[STRUCT_HACK_VAR_LEN];\n };\n \n struct ice_sw_fv_list_entry {\n@@ -455,43 +456,32 @@ struct ice_boost_tcam_entry {\n struct ice_boost_tcam_section {\n \t__le16 count;\n \t__le16 reserved;\n-\tstruct ice_boost_tcam_entry tcam[1];\n+\tstruct ice_boost_tcam_entry tcam[STRUCT_HACK_VAR_LEN];\n };\n \n #define ICE_MAX_BST_TCAMS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \\\n-\tsizeof(struct ice_boost_tcam_section) - \\\n+\tice_struct_size((struct ice_boost_tcam_section *)0, tcam, 1) - \\\n \tsizeof(struct ice_boost_tcam_entry), \\\n \tsizeof(struct ice_boost_tcam_entry))\n \n-#pragma pack(1)\n struct ice_xlt1_section {\n \t__le16 count;\n \t__le16 offset;\n-\tu8 value[1];\n+\tu8 value[STRUCT_HACK_VAR_LEN];\n };\n-#pragma pack()\n-\n-#define ICE_XLT1_SIZE(n)\t(sizeof(struct ice_xlt1_section) + \\\n-\t\t\t\t (sizeof(u8) * ((n) - 1)))\n \n struct ice_xlt2_section {\n \t__le16 count;\n \t__le16 offset;\n-\t__le16 value[1];\n+\t__le16 value[STRUCT_HACK_VAR_LEN];\n };\n \n-#define ICE_XLT2_SIZE(n)\t(sizeof(struct ice_xlt2_section) + \\\n-\t\t\t\t (sizeof(u16) * ((n) - 1)))\n-\n struct ice_prof_redir_section {\n \t__le16 count;\n \t__le16 offset;\n-\tu8 redir_value[1];\n+\tu8 redir_value[STRUCT_HACK_VAR_LEN];\n };\n \n-#define ICE_PROF_REDIR_SIZE(n)\t(sizeof(struct ice_prof_redir_section) + \\\n-\t\t\t\t (sizeof(u8) * ((n) - 1)))\n-\n /* package buffer building */\n \n struct ice_buf_build {\n@@ -548,7 +538,7 @@ struct ice_tunnel_table {\n struct ice_pkg_es {\n \t__le16 count;\n \t__le16 offset;\n-\tstruct ice_fv_word es[1];\n+\tstruct ice_fv_word es[STRUCT_HACK_VAR_LEN];\n };\n \n struct ice_es {\n@@ -703,11 +693,12 @@ struct ice_prof_tcam_entry {\n \tu8 prof_id;\n };\n \n+#pragma pack()\n+\n struct ice_prof_id_section {\n \t__le16 count;\n-\tstruct ice_prof_tcam_entry entry[1];\n+\tstruct ice_prof_tcam_entry entry[STRUCT_HACK_VAR_LEN];\n };\n-#pragma pack()\n \n struct ice_prof_tcam {\n \tu32 sid;\ndiff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c\nindex edd90aecb..e189e95f7 100644\n--- a/drivers/net/ice/base/ice_sched.c\n+++ b/drivers/net/ice/base/ice_sched.c\n@@ -237,7 +237,7 @@ ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,\n \tenum ice_status status;\n \tu16 buf_size;\n \n-\tbuf_size = sizeof(*buf) + sizeof(u32) * (num_nodes - 1);\n+\tbuf_size = ice_struct_size(buf, teid, num_nodes);\n \tbuf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);\n \tif (!buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n@@ -892,7 +892,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,\n \tu16 buf_size;\n \tu32 teid;\n \n-\tbuf_size = ice_struct_size(buf, generic, num_nodes - 1);\n+\tbuf_size = ice_struct_size(buf, generic, num_nodes);\n \tbuf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);\n \tif (!buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n@@ -2260,6 +2260,7 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,\n \tstruct ice_sched_node *node;\n \tu16 i, grps_movd = 0;\n \tstruct ice_hw *hw;\n+\tu16 buf_len;\n \n \thw = pi->hw;\n \n@@ -2271,7 +2272,8 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,\n \t    hw->max_children[parent->tx_sched_layer])\n \t\treturn ICE_ERR_AQ_FULL;\n \n-\tbuf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));\n+\tbuf_len = ice_struct_size(buf, teid, 1);\n+\tbuf = (struct ice_aqc_move_elem *)ice_malloc(hw, buf_len);\n \tif (!buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n \n@@ -2286,7 +2288,7 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,\n \t\tbuf->hdr.dest_parent_teid = parent->info.node_teid;\n \t\tbuf->teid[0] = node->info.node_teid;\n \t\tbuf->hdr.num_elems = CPU_TO_LE16(1);\n-\t\tstatus = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),\n+\t\tstatus = ice_aq_move_sched_elems(hw, 1, buf, buf_len,\n \t\t\t\t\t\t &grps_movd, NULL);\n \t\tif (status && grps_movd != 1) {\n \t\t\tstatus = ICE_ERR_CFG;\ndiff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex 875922459..858a73222 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -1478,9 +1478,8 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,\n \tenum ice_status status;\n \tu16 buf_len;\n \n-\tbuf_len = sizeof(*sw_buf);\n-\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)\n-\t\t   ice_malloc(hw, buf_len);\n+\tbuf_len = ice_struct_size(sw_buf, elem, 1);\n+\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);\n \tif (!sw_buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n \n@@ -1560,9 +1559,8 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)\n \tenum ice_status status, ret_status;\n \tu16 buf_len;\n \n-\tbuf_len = sizeof(*sw_buf);\n-\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)\n-\t\t   ice_malloc(hw, buf_len);\n+\tbuf_len = ice_struct_size(sw_buf, elem, 1);\n+\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);\n \tif (!sw_buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n \n@@ -2103,9 +2101,8 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,\n \tenum ice_status status;\n \tu16 buf_len;\n \n-\tbuf_len = sizeof(*sw_buf);\n-\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)\n-\t\tice_malloc(hw, buf_len);\n+\tbuf_len = ice_struct_size(sw_buf, elem, 1);\n+\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);\n \tif (!sw_buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n \tsw_buf->num_elems = CPU_TO_LE16(1);\n@@ -2387,7 +2384,7 @@ enum ice_status ice_alloc_recipe(struct ice_hw *hw, u16 *rid)\n \tenum ice_status status;\n \tu16 buf_len;\n \n-\tbuf_len = sizeof(*sw_buf);\n+\tbuf_len = ice_struct_size(sw_buf, elem, 1);\n \tsw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);\n \tif (!sw_buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n@@ -5253,9 +5250,8 @@ ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,\n \tu16 buf_len;\n \n \t/* Allocate resource */\n-\tbuf_len = sizeof(*buf);\n-\tbuf = (struct ice_aqc_alloc_free_res_elem *)\n-\t\tice_malloc(hw, buf_len);\n+\tbuf_len = ice_struct_size(buf, elem, 1);\n+\tbuf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);\n \tif (!buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n \n@@ -5292,9 +5288,8 @@ ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,\n \tu16 buf_len;\n \n \t/* Free resource */\n-\tbuf_len = sizeof(*buf);\n-\tbuf = (struct ice_aqc_alloc_free_res_elem *)\n-\t\tice_malloc(hw, buf_len);\n+\tbuf_len = ice_struct_size(buf, elem, 1);\n+\tbuf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);\n \tif (!buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n \n@@ -5354,9 +5349,8 @@ ice_alloc_res_lg_act(struct ice_hw *hw, u16 *l_id, u16 num_acts)\n \t\treturn ICE_ERR_PARAM;\n \n \t/* Allocate resource for large action */\n-\tbuf_len = sizeof(*sw_buf);\n-\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)\n-\t\tice_malloc(hw, buf_len);\n+\tbuf_len = ice_struct_size(sw_buf, elem, 1);\n+\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);\n \tif (!sw_buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n \ndiff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h\nindex fe7b86f12..aa446774c 100644\n--- a/drivers/net/ice/base/ice_switch.h\n+++ b/drivers/net/ice/base/ice_switch.h\n@@ -45,25 +45,17 @@\n \n #define DUMMY_ETH_HDR_LEN\t\t16\n #define ICE_SW_RULE_RX_TX_ETH_HDR_SIZE \\\n-\t(sizeof(struct ice_aqc_sw_rules_elem) - \\\n-\t FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \\\n-\t sizeof(struct ice_sw_rule_lkup_rx_tx) + DUMMY_ETH_HDR_LEN - 1)\n+\t(offsetof(struct ice_aqc_sw_rules_elem, pdata.lkup_tx_rx.hdr) + \\\n+\t (DUMMY_ETH_HDR_LEN * \\\n+\t  sizeof(((struct ice_sw_rule_lkup_rx_tx *)0)->hdr[0])))\n #define ICE_SW_RULE_RX_TX_NO_HDR_SIZE \\\n-\t(sizeof(struct ice_aqc_sw_rules_elem) - \\\n-\t FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \\\n-\t sizeof(struct ice_sw_rule_lkup_rx_tx) - 1)\n+\t(offsetof(struct ice_aqc_sw_rules_elem, pdata.lkup_tx_rx.hdr))\n #define ICE_SW_RULE_LG_ACT_SIZE(n) \\\n-\t(sizeof(struct ice_aqc_sw_rules_elem) - \\\n-\t FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \\\n-\t sizeof(struct ice_sw_rule_lg_act) - \\\n-\t FIELD_SIZEOF(struct ice_sw_rule_lg_act, act) + \\\n-\t ((n) * FIELD_SIZEOF(struct ice_sw_rule_lg_act, act)))\n+\t(offsetof(struct ice_aqc_sw_rules_elem, pdata.lg_act.act) + \\\n+\t ((n) * sizeof(((struct ice_sw_rule_lg_act *)0)->act[0])))\n #define ICE_SW_RULE_VSI_LIST_SIZE(n) \\\n-\t(sizeof(struct ice_aqc_sw_rules_elem) - \\\n-\t FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \\\n-\t sizeof(struct ice_sw_rule_vsi_list) - \\\n-\t FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi) + \\\n-\t ((n) * FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi)))\n+\t(offsetof(struct ice_aqc_sw_rules_elem, pdata.vsi_list.vsi) + \\\n+\t ((n) * sizeof(((struct ice_sw_rule_vsi_list *)0)->vsi[0])))\n \n /* Worst case buffer length for ice_aqc_opc_get_res_alloc */\n #define ICE_MAX_RES_TYPES 0x80\ndiff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h\nindex 3775689a9..be6bdf9e7 100644\n--- a/drivers/net/ice/base/ice_type.h\n+++ b/drivers/net/ice/base/ice_type.h\n@@ -34,6 +34,13 @@\n \n #define IS_ASCII(_ch)\t((_ch) < 0x80)\n \n+#define STRUCT_HACK_VAR_LEN\n+/**\n+ * ice_struct_size - size of struct with C99 flexible array member\n+ * @ptr: pointer to structure\n+ * @field: flexible array member (last member of the structure)\n+ * @num: number of elements of that flexible array member\n+ */\n #define ice_struct_size(ptr, field, num) \\\n \t(sizeof(*(ptr)) + sizeof(*(ptr)->field) * (num))\n \ndiff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex ad5844231..fecb13459 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -459,8 +459,9 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \tint err;\n \tstruct ice_vsi *vsi;\n \tstruct ice_hw *hw;\n-\tstruct ice_aqc_add_tx_qgrp txq_elem;\n+\tstruct ice_aqc_add_tx_qgrp *txq_elem;\n \tstruct ice_tlan_ctx tx_ctx;\n+\tint buf_len;\n \n \tPMD_INIT_FUNC_TRACE();\n \n@@ -477,13 +478,17 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \t\treturn -EINVAL;\n \t}\n \n+\tbuf_len = ice_struct_size(txq_elem, txqs, 1);\n+\ttxq_elem = ice_malloc(hw, buf_len);\n+\tif (!txq_elem)\n+\t\treturn -ENOMEM;\n+\n \tvsi = txq->vsi;\n \thw = ICE_VSI_TO_HW(vsi);\n \n-\tmemset(&txq_elem, 0, sizeof(txq_elem));\n \tmemset(&tx_ctx, 0, sizeof(tx_ctx));\n-\ttxq_elem.num_txqs = 1;\n-\ttxq_elem.txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);\n+\ttxq_elem->num_txqs = 1;\n+\ttxq_elem->txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);\n \n \ttx_ctx.base = txq->tx_ring_dma / ICE_QUEUE_BASE_ADDR_UNIT;\n \ttx_ctx.qlen = txq->nb_tx_desc;\n@@ -495,7 +500,7 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \ttx_ctx.tso_qnum = txq->reg_idx; /* index for tso state structure */\n \ttx_ctx.legacy_int = 1; /* Legacy or Advanced Host Interface */\n \n-\tice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,\n+\tice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem->txqs[0].txq_ctx,\n \t\t    ice_tlan_ctx_info);\n \n \ttxq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx);\n@@ -505,15 +510,18 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \n \t/* Fix me, we assume TC always 0 here */\n \terr = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, tx_queue_id, 1,\n-\t\t\t&txq_elem, sizeof(txq_elem), NULL);\n+\t\t\ttxq_elem, buf_len, NULL);\n \tif (err) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to add lan txq\");\n+\t\trte_free(txq_elem);\n \t\treturn -EIO;\n \t}\n \t/* store the schedule node id */\n-\ttxq->q_teid = txq_elem.txqs[0].q_teid;\n+\ttxq->q_teid = txq_elem->txqs[0].q_teid;\n \n \tdev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;\n+\n+\trte_free(txq_elem);\n \treturn 0;\n }\n \n@@ -637,8 +645,9 @@ ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \tint err;\n \tstruct ice_vsi *vsi;\n \tstruct ice_hw *hw;\n-\tstruct ice_aqc_add_tx_qgrp txq_elem;\n+\tstruct ice_aqc_add_tx_qgrp *txq_elem;\n \tstruct ice_tlan_ctx tx_ctx;\n+\tint buf_len;\n \n \tPMD_INIT_FUNC_TRACE();\n \n@@ -649,13 +658,17 @@ ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \t\treturn -EINVAL;\n \t}\n \n+\tbuf_len = ice_struct_size(txq_elem, txqs, 1);\n+\ttxq_elem = ice_malloc(hw, buf_len);\n+\tif (!txq_elem)\n+\t\treturn -ENOMEM;\n+\n \tvsi = txq->vsi;\n \thw = ICE_VSI_TO_HW(vsi);\n \n-\tmemset(&txq_elem, 0, sizeof(txq_elem));\n \tmemset(&tx_ctx, 0, sizeof(tx_ctx));\n-\ttxq_elem.num_txqs = 1;\n-\ttxq_elem.txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);\n+\ttxq_elem->num_txqs = 1;\n+\ttxq_elem->txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);\n \n \ttx_ctx.base = txq->tx_ring_dma / ICE_QUEUE_BASE_ADDR_UNIT;\n \ttx_ctx.qlen = txq->nb_tx_desc;\n@@ -667,7 +680,7 @@ ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \ttx_ctx.tso_qnum = txq->reg_idx; /* index for tso state structure */\n \ttx_ctx.legacy_int = 1; /* Legacy or Advanced Host Interface */\n \n-\tice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,\n+\tice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem->txqs[0].txq_ctx,\n \t\t    ice_tlan_ctx_info);\n \n \ttxq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx);\n@@ -677,14 +690,16 @@ ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \n \t/* Fix me, we assume TC always 0 here */\n \terr = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, tx_queue_id, 1,\n-\t\t\t      &txq_elem, sizeof(txq_elem), NULL);\n+\t\t\t      txq_elem, buf_len, NULL);\n \tif (err) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to add FDIR txq\");\n+\t\trte_free(txq_elem);\n \t\treturn -EIO;\n \t}\n \t/* store the schedule node id */\n-\ttxq->q_teid = txq_elem.txqs[0].q_teid;\n+\ttxq->q_teid = txq_elem->txqs[0].q_teid;\n \n+\trte_free(txq_elem);\n \treturn 0;\n }\n \n",
    "prefixes": [
        "v2",
        "09/40"
    ]
}