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GET /api/patches/77394/?format=api
{ "id": 77394, "url": "http://patches.dpdk.org/api/patches/77394/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-8-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200911131954.15999-8-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200911131954.15999-8-qi.z.zhang@intel.com", "date": "2020-09-11T13:19:21", "name": "[v2,07/40] net/ice/base: cleanup misleading comment", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "b622db73b61a3d3e7cc648c2696d54f07fb6ff2c", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-8-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 12148, "url": "http://patches.dpdk.org/api/series/12148/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12148", "date": "2020-09-11T13:19:15", "name": "ice base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/12148/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/77394/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/77394/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AD1F4A04B7;\n\tFri, 11 Sep 2020 15:17:18 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D7B591C12B;\n\tFri, 11 Sep 2020 15:16:14 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id F2C201C11C\n for <dev@dpdk.org>; Fri, 11 Sep 2020 15:16:10 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Sep 2020 06:16:10 -0700", "from dpdk51.sh.intel.com ([10.67.111.82])\n by FMSMGA003.fm.intel.com with ESMTP; 11 Sep 2020 06:16:09 -0700" ], "IronPort-SDR": [ "\n CUxHjIJ5zHrTpotfiG/T1iOgf2gYhlgPjiZThYdJfSIuWz5Ft723jkAMYf71Gh0E4VK4ECL762\n +i+3ksnr7noQ==", "\n LgWXzl7rUX2GBayam4pURb85pvTOvoiH6P6i8rT/YpL+l9Q14DSH4k+1TC3bmUd652lfrsA4f7\n 06pDn+91ryXA==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9740\"; a=\"146482151\"", "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"146482151\"", "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"342296480\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "ferruh.yigit@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Bruce Allan <bruce.w.allan@intel.com>", "Date": "Fri, 11 Sep 2020 21:19:21 +0800", "Message-Id": "<20200911131954.15999-8-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20200911131954.15999-1-qi.z.zhang@intel.com>", "References": "<20200907112826.48493-1-qi.z.zhang@intel.com>\n <20200911131954.15999-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 07/40] net/ice/base: cleanup misleading comment", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The maximum Admin Queue buffer size and NVM shadow RAM sector size are both\n4 Kilobytes. Some comments refer to those as 4Kb which can be confused with\n4 Kilobits. Update the comments to use the commonly used KB symbol instead.\n\nSigned-off-by: Bruce Allan <bruce.w.allan@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_nvm.c | 8 ++++----\n 1 file changed, 4 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c\nindex bfeade6f9..2befe68d7 100644\n--- a/drivers/net/ice/base/ice_nvm.c\n+++ b/drivers/net/ice/base/ice_nvm.c\n@@ -58,7 +58,7 @@ ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,\n *\n * Reads a portion of the NVM, as a flat memory space. This function correctly\n * breaks read requests across Shadow RAM sectors and ensures that no single\n- * read request exceeds the maximum 4Kb read for a single AdminQ command.\n+ * read request exceeds the maximum 4KB read for a single AdminQ command.\n *\n * Returns a status code on failure. Note that the data pointer may be\n * partially updated if some reads succeed before a failure.\n@@ -86,10 +86,10 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,\n \tdo {\n \t\tu32 read_size, sector_offset;\n \n-\t\t/* ice_aq_read_nvm cannot read more than 4Kb at a time.\n+\t\t/* ice_aq_read_nvm cannot read more than 4KB at a time.\n \t\t * Additionally, a read from the Shadow RAM may not cross over\n \t\t * a sector boundary. Conveniently, the sector size is also\n-\t\t * 4Kb.\n+\t\t * 4KB.\n \t\t */\n \t\tsector_offset = offset % ICE_AQ_MAX_BUF_LEN;\n \t\tread_size = MIN_T(u32, ICE_AQ_MAX_BUF_LEN - sector_offset,\n@@ -164,7 +164,7 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)\n \n \tice_debug(hw, ICE_DBG_TRACE, \"%s\\n\", __func__);\n \n-\t/* ice_read_flat_nvm takes into account the 4Kb AdminQ and Shadow RAM\n+\t/* ice_read_flat_nvm takes into account the 4KB AdminQ and Shadow RAM\n \t * sector restrictions necessary when reading from the NVM.\n \t */\n \tstatus = ice_read_flat_nvm(hw, offset * 2, &bytes, (u8 *)data, true);\n", "prefixes": [ "v2", "07/40" ] }