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GET /api/patches/77390/?format=api
{ "id": 77390, "url": "http://patches.dpdk.org/api/patches/77390/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-4-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200911131954.15999-4-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200911131954.15999-4-qi.z.zhang@intel.com", "date": "2020-09-11T13:19:17", "name": "[v2,03/40] net/ice/base: avoid unnecessary single-member variable-length structs", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f72dc81f9f35c11dd47bd0aa3171d6b932527113", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-4-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 12148, "url": "http://patches.dpdk.org/api/series/12148/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12148", "date": "2020-09-11T13:19:15", "name": "ice base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/12148/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/77390/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/77390/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 83FBBA04B7;\n\tFri, 11 Sep 2020 15:16:33 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 28B2E1C10B;\n\tFri, 11 Sep 2020 15:16:08 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 2A98C1C0CC\n for <dev@dpdk.org>; Fri, 11 Sep 2020 15:16:03 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Sep 2020 06:16:03 -0700", "from dpdk51.sh.intel.com ([10.67.111.82])\n by FMSMGA003.fm.intel.com with ESMTP; 11 Sep 2020 06:16:01 -0700" ], "IronPort-SDR": [ "\n 5qqJGTz6DdHbibdi6On6k3jVSZfMdGDVVGsCJ8R5GjDt1XvppImDOWVGU0UhqGLZ7z5EUQdB/w\n EQPLZlNdvwqg==", "\n GJXvXZ0Gtorb6hGpfTKZ1qGJL7Jk9wqBTli7jFoS6RQwC5JO6UWCNgXEFtV98kSkxqMklwQVDR\n qtZ53JVckmpQ==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9740\"; a=\"146482103\"", "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"146482103\"", "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"342296427\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "ferruh.yigit@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Bruce Allan <bruce.w.allan@intel.com>", "Date": "Fri, 11 Sep 2020 21:19:17 +0800", "Message-Id": "<20200911131954.15999-4-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20200911131954.15999-1-qi.z.zhang@intel.com>", "References": "<20200907112826.48493-1-qi.z.zhang@intel.com>\n <20200911131954.15999-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 03/40] net/ice/base: avoid unnecessary\n\tsingle-member variable-length structs", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "There are a number of structures that consist of a one-element array as the\nonly struct member. Some of those are unused (ice_aqc_add_get_recipe_data,\nice_aqc_get_port_options_data, ice_aqc_dis_txq, etc.) so remove them.\nOthers are used to index into a buffer/array consisting of a variable\nnumber of a different data or structure type. Those are unnecessary since\nwe can use simple pointer arithmetic or index directly into the buffer to\naccess individual elements of the buffer/array.\n\nAdditional code cleanups were done near areas affected by this change.\n\nSigned-off-by: Bruce Allan <bruce.w.allan@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_adminq_cmd.h | 63 ++---------------------------\n drivers/net/ice/base/ice_common.c | 4 +-\n drivers/net/ice/base/ice_common.h | 2 +-\n drivers/net/ice/base/ice_dcb.c | 4 +-\n drivers/net/ice/base/ice_sched.c | 76 ++++++++++++++++-------------------\n drivers/net/ice/base/ice_sched.h | 10 ++---\n drivers/net/ice/base/ice_switch.c | 38 +++++++++---------\n drivers/net/ice/base/ice_switch.h | 10 ++---\n drivers/net/ice/ice_ethdev.c | 6 +--\n 9 files changed, 75 insertions(+), 138 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h\nindex e17369f5e..df41cce06 100644\n--- a/drivers/net/ice/base/ice_adminq_cmd.h\n+++ b/drivers/net/ice/base/ice_adminq_cmd.h\n@@ -224,13 +224,6 @@ struct ice_aqc_get_sw_cfg_resp_elem {\n #define ICE_AQC_GET_SW_CONF_RESP_IS_VF\t\tBIT(15)\n };\n \n-/* The response buffer is as follows. Note that the length of the\n- * elements array varies with the length of the command response.\n- */\n-struct ice_aqc_get_sw_cfg_resp {\n-\tstruct ice_aqc_get_sw_cfg_resp_elem elements[1];\n-};\n-\n /* These resource type defines are used for all switch resource\n * commands where a resource type is required, such as:\n * Get Resource Allocation command (indirect 0x0204)\n@@ -294,15 +287,6 @@ struct ice_aqc_get_res_resp_elem {\n \t__le16 total_free; /* Resources un-allocated/not reserved by any PF */\n };\n \n-/* Buffer for Get Resource command */\n-struct ice_aqc_get_res_resp {\n-\t/* Number of resource entries to be calculated using\n-\t * datalen/sizeof(struct ice_aqc_cmd_resp)).\n-\t * Value of 'datalen' gets updated as part of response.\n-\t */\n-\tstruct ice_aqc_get_res_resp_elem elem[1];\n-};\n-\n /* Allocate Resources command (indirect 0x0208)\n * Free Resources command (indirect 0x0209)\n */\n@@ -350,10 +334,6 @@ struct ice_aqc_get_allocd_res_desc {\n \t__le32 addr_low;\n };\n \n-struct ice_aqc_get_allocd_res_desc_resp {\n-\tstruct ice_aqc_res_elem elem[1];\n-};\n-\n /* Add VSI (indirect 0x0210)\n * Update VSI (indirect 0x0211)\n * Get VSI (indirect 0x0212)\n@@ -729,13 +709,6 @@ struct ice_aqc_recipe_data_elem {\n \tu8 rsvd2[20];\n };\n \n-/* This struct contains a number of entries as per the\n- * num_sub_recipes in the command\n- */\n-struct ice_aqc_add_get_recipe_data {\n-\tstruct ice_aqc_recipe_data_elem recipe[1];\n-};\n-\n /* Set/Get Recipes to Profile Association (direct 0x0291/0x0293) */\n struct ice_aqc_recipe_to_profile {\n \t__le16 profile_id;\n@@ -757,7 +730,6 @@ struct ice_aqc_sw_rules {\n \t__le32 addr_low;\n };\n \n-#pragma pack(1)\n /* Add/Update/Get/Remove lookup Rx/Tx command/response entry\n * This structures describes the lookup rules and associated actions. \"index\"\n * is returned as part of a response to a successful Add command, and can be\n@@ -842,7 +814,6 @@ struct ice_sw_rule_lkup_rx_tx {\n \t__le16 hdr_len;\n \tu8 hdr[1];\n };\n-#pragma pack()\n \n /* Add/Update/Remove large action command/response entry\n * \"index\" is returned as part of a response to a successful Add command, and\n@@ -851,7 +822,6 @@ struct ice_sw_rule_lkup_rx_tx {\n struct ice_sw_rule_lg_act {\n \t__le16 index; /* Index in large action table */\n \t__le16 size;\n-\t__le32 act[1]; /* array of size for actions */\n \t/* Max number of large actions */\n #define ICE_MAX_LG_ACT\t4\n \t/* Bit 0:1 - Action type */\n@@ -902,6 +872,7 @@ struct ice_sw_rule_lg_act {\n #define ICE_LG_ACT_STAT_COUNT\t\t0x7\n #define ICE_LG_ACT_STAT_COUNT_S\t\t3\n #define ICE_LG_ACT_STAT_COUNT_M\t\t(0x7F << ICE_LG_ACT_STAT_COUNT_S)\n+\t__le32 act[1]; /* array of size for actions */\n };\n \n /* Add/Update/Remove VSI list command/response entry\n@@ -1009,14 +980,6 @@ struct ice_aqc_sched_elem_cmd {\n \t__le32 addr_low;\n };\n \n-/* This is the buffer for:\n- * Suspend Nodes (indirect 0x0409)\n- * Resume Nodes (indirect 0x040A)\n- */\n-struct ice_aqc_suspend_resume_elem {\n-\t__le32 teid[1];\n-};\n-\n struct ice_aqc_txsched_move_grp_info_hdr {\n \t__le32 src_parent_teid;\n \t__le32 dest_parent_teid;\n@@ -1082,14 +1045,6 @@ struct ice_aqc_add_elem {\n \tstruct ice_aqc_txsched_elem_data generic[1];\n };\n \n-struct ice_aqc_conf_elem {\n-\tstruct ice_aqc_txsched_elem_data generic[1];\n-};\n-\n-struct ice_aqc_get_elem {\n-\tstruct ice_aqc_txsched_elem_data generic[1];\n-};\n-\n struct ice_aqc_get_topo_elem {\n \tstruct ice_aqc_txsched_topo_grp_info_hdr hdr;\n \tstruct ice_aqc_txsched_elem_data\n@@ -1161,10 +1116,6 @@ struct ice_aqc_rl_profile_elem {\n \t__le16 rl_encode;\n };\n \n-struct ice_aqc_rl_profile_generic_elem {\n-\tstruct ice_aqc_rl_profile_elem generic[1];\n-};\n-\n /* Configure L2 Node CGD (indirect 0x0414)\n * This indirect command allows configuring a congestion domain for given L2\n * node TEIDs in the scheduler topology.\n@@ -1182,10 +1133,6 @@ struct ice_aqc_cfg_l2_node_cgd_elem {\n \tu8 reserved[3];\n };\n \n-struct ice_aqc_cfg_l2_node_cgd_data {\n-\tstruct ice_aqc_cfg_l2_node_cgd_elem elem[1];\n-};\n-\n /* Query Scheduler Resource Allocation (indirect 0x0412)\n * This indirect command retrieves the scheduler resources allocated by\n * EMP Firmware to the given PF.\n@@ -2512,23 +2459,21 @@ struct ice_aqc_dis_txqs {\n * added before the start of the next group, to allow correct\n * alignment of the parent_teid field.\n */\n+#pragma pack(1)\n struct ice_aqc_dis_txq_item {\n \t__le32 parent_teid;\n \tu8 num_qs;\n \tu8 rsvd;\n \t/* The length of the q_id array varies according to num_qs */\n-\t__le16 q_id[1];\n-\t/* This only applies from F8 onward */\n #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S\t\t15\n #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_LAN_Q\t\\\n \t\t\t(0 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)\n #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_RDMA_QSET\t\\\n \t\t\t(1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)\n+\t__le16 q_id[1];\n };\n \n-struct ice_aqc_dis_txq {\n-\tstruct ice_aqc_dis_txq_item qgrps[1];\n-};\n+#pragma pack()\n \n /* Tx LAN Queues Cleanup Event (0x0C31) */\n struct ice_aqc_txqs_cleanup {\ndiff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex ec8d46017..4be363047 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -4596,14 +4596,14 @@ ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded,\n */\n enum ice_status\n ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,\n-\t\t struct ice_aqc_get_elem *buf)\n+\t\t struct ice_aqc_txsched_elem_data *buf)\n {\n \tu16 buf_size, num_elem_ret = 0;\n \tenum ice_status status;\n \n \tbuf_size = sizeof(*buf);\n \tice_memset(buf, 0, buf_size, ICE_NONDMA_MEM);\n-\tbuf->generic[0].node_teid = CPU_TO_LE32(node_teid);\n+\tbuf->node_teid = CPU_TO_LE32(node_teid);\n \tstatus = ice_aq_query_sched_elems(hw, 1, buf, buf_size, &num_elem_ret,\n \t\t\t\t\t NULL);\n \tif (status != ICE_SUCCESS || num_elem_ret != 1)\ndiff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h\nindex 329d0b50f..1aea915ad 100644\n--- a/drivers/net/ice/base/ice_common.h\n+++ b/drivers/net/ice/base/ice_common.h\n@@ -219,7 +219,7 @@ enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw);\n void ice_print_rollback_msg(struct ice_hw *hw);\n enum ice_status\n ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,\n-\t\t struct ice_aqc_get_elem *buf);\n+\t\t struct ice_aqc_txsched_elem_data *buf);\n enum ice_status\n ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,\n \t\t struct ice_sq_cd *cd);\ndiff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c\nindex b9643b5ce..01cee227e 100644\n--- a/drivers/net/ice/base/ice_dcb.c\n+++ b/drivers/net/ice/base/ice_dcb.c\n@@ -1328,7 +1328,7 @@ ice_update_port_tc_tree_cfg(struct ice_port_info *pi,\n \t\t\t struct ice_aqc_port_ets_elem *buf)\n {\n \tstruct ice_sched_node *node, *tc_node;\n-\tstruct ice_aqc_get_elem elem;\n+\tstruct ice_aqc_txsched_elem_data elem;\n \tenum ice_status status = ICE_SUCCESS;\n \tu32 teid1, teid2;\n \tu8 i, j;\n@@ -1370,7 +1370,7 @@ ice_update_port_tc_tree_cfg(struct ice_port_info *pi,\n \t\t/* new TC */\n \t\tstatus = ice_sched_query_elem(pi->hw, teid2, &elem);\n \t\tif (!status)\n-\t\t\tstatus = ice_sched_add_node(pi, 1, &elem.generic[0]);\n+\t\t\tstatus = ice_sched_add_node(pi, 1, &elem);\n \t\tif (status)\n \t\t\tbreak;\n \t\t/* update the TC number */\ndiff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c\nindex 8ee4b708e..cf9a6a777 100644\n--- a/drivers/net/ice/base/ice_sched.c\n+++ b/drivers/net/ice/base/ice_sched.c\n@@ -130,7 +130,7 @@ ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,\n */\n enum ice_status\n ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,\n-\t\t\t struct ice_aqc_get_elem *buf, u16 buf_size,\n+\t\t\t struct ice_aqc_txsched_elem_data *buf, u16 buf_size,\n \t\t\t u16 *elems_ret, struct ice_sq_cd *cd)\n {\n \treturn ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,\n@@ -150,8 +150,8 @@ enum ice_status\n ice_sched_add_node(struct ice_port_info *pi, u8 layer,\n \t\t struct ice_aqc_txsched_elem_data *info)\n {\n+\tstruct ice_aqc_txsched_elem_data elem;\n \tstruct ice_sched_node *parent;\n-\tstruct ice_aqc_get_elem elem;\n \tstruct ice_sched_node *node;\n \tenum ice_status status;\n \tstruct ice_hw *hw;\n@@ -194,7 +194,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,\n \tnode->parent = parent;\n \tnode->tx_sched_layer = layer;\n \tparent->children[parent->num_children++] = node;\n-\tnode->info = elem.generic[0];\n+\tnode->info = elem;\n \treturn ICE_SUCCESS;\n }\n \n@@ -422,7 +422,7 @@ ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,\n */\n static enum ice_status\n ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,\n-\t\t struct ice_aqc_conf_elem *buf, u16 buf_size,\n+\t\t struct ice_aqc_txsched_elem_data *buf, u16 buf_size,\n \t\t u16 *elems_cfgd, struct ice_sq_cd *cd)\n {\n \treturn ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,\n@@ -463,8 +463,7 @@ ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,\n * Suspend scheduling elements (0x0409)\n */\n static enum ice_status\n-ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,\n-\t\t\t struct ice_aqc_suspend_resume_elem *buf,\n+ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,\n \t\t\t u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)\n {\n \treturn ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,\n@@ -484,8 +483,7 @@ ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,\n * resume scheduling elements (0x040A)\n */\n static enum ice_status\n-ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,\n-\t\t\t struct ice_aqc_suspend_resume_elem *buf,\n+ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,\n \t\t\t u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)\n {\n \treturn ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,\n@@ -526,18 +524,17 @@ static enum ice_status\n ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,\n \t\t\t bool suspend)\n {\n-\tstruct ice_aqc_suspend_resume_elem *buf;\n \tu16 i, buf_size, num_elem_ret = 0;\n \tenum ice_status status;\n+\t__le32 *buf;\n \n \tbuf_size = sizeof(*buf) * num_nodes;\n-\tbuf = (struct ice_aqc_suspend_resume_elem *)\n-\t\tice_malloc(hw, buf_size);\n+\tbuf = (__le32 *)ice_malloc(hw, buf_size);\n \tif (!buf)\n \t\treturn ICE_ERR_NO_MEMORY;\n \n \tfor (i = 0; i < num_nodes; i++)\n-\t\tbuf->teid[i] = CPU_TO_LE32(node_teids[i]);\n+\t\tbuf[i] = CPU_TO_LE32(node_teids[i]);\n \n \tif (suspend)\n \t\tstatus = ice_aq_suspend_sched_elems(hw, num_nodes, buf,\n@@ -610,7 +607,7 @@ ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)\n */\n static enum ice_status\n ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,\n-\t\t u16 num_profiles, struct ice_aqc_rl_profile_generic_elem *buf,\n+\t\t u16 num_profiles, struct ice_aqc_rl_profile_elem *buf,\n \t\t u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)\n {\n \tstruct ice_aqc_rl_profile *cmd;\n@@ -641,13 +638,11 @@ ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,\n */\n static enum ice_status\n ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,\n-\t\t struct ice_aqc_rl_profile_generic_elem *buf,\n-\t\t u16 buf_size, u16 *num_profiles_added,\n-\t\t struct ice_sq_cd *cd)\n+\t\t struct ice_aqc_rl_profile_elem *buf, u16 buf_size,\n+\t\t u16 *num_profiles_added, struct ice_sq_cd *cd)\n {\n-\treturn ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles,\n-\t\t\t\t num_profiles, buf,\n-\t\t\t\t buf_size, num_profiles_added, cd);\n+\treturn ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles,\n+\t\t\t\t buf, buf_size, num_profiles_added, cd);\n }\n \n /**\n@@ -662,8 +657,8 @@ ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,\n */\n enum ice_status\n ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,\n-\t\t\tstruct ice_aqc_rl_profile_generic_elem *buf,\n-\t\t\tu16 buf_size, struct ice_sq_cd *cd)\n+\t\t\tstruct ice_aqc_rl_profile_elem *buf, u16 buf_size,\n+\t\t\tstruct ice_sq_cd *cd)\n {\n \treturn ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,\n \t\t\t\t num_profiles, buf, buf_size, NULL, cd);\n@@ -682,13 +677,12 @@ ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,\n */\n static enum ice_status\n ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,\n-\t\t\t struct ice_aqc_rl_profile_generic_elem *buf,\n-\t\t\t u16 buf_size, u16 *num_profiles_removed,\n-\t\t\t struct ice_sq_cd *cd)\n+\t\t\t struct ice_aqc_rl_profile_elem *buf, u16 buf_size,\n+\t\t\t u16 *num_profiles_removed, struct ice_sq_cd *cd)\n {\n \treturn ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,\n-\t\t\t\t num_profiles, buf,\n-\t\t\t\t buf_size, num_profiles_removed, cd);\n+\t\t\t\t num_profiles, buf, buf_size,\n+\t\t\t\t num_profiles_removed, cd);\n }\n \n /**\n@@ -704,7 +698,7 @@ static enum ice_status\n ice_sched_del_rl_profile(struct ice_hw *hw,\n \t\t\t struct ice_aqc_rl_profile_info *rl_info)\n {\n-\tstruct ice_aqc_rl_profile_generic_elem *buf;\n+\tstruct ice_aqc_rl_profile_elem *buf;\n \tu16 num_profiles_removed;\n \tenum ice_status status;\n \tu16 num_profiles = 1;\n@@ -713,8 +707,7 @@ ice_sched_del_rl_profile(struct ice_hw *hw,\n \t\treturn ICE_ERR_IN_USE;\n \n \t/* Safe to remove profile ID */\n-\tbuf = (struct ice_aqc_rl_profile_generic_elem *)\n-\t\t&rl_info->profile;\n+\tbuf = &rl_info->profile;\n \tstatus = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),\n \t\t\t\t\t &num_profiles_removed, NULL);\n \tif (status || num_profiles_removed != num_profiles)\n@@ -860,7 +853,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw)\n */\n enum ice_status\n ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,\n-\t\t struct ice_aqc_cfg_l2_node_cgd_data *buf,\n+\t\t struct ice_aqc_cfg_l2_node_cgd_elem *buf,\n \t\t u16 buf_size, struct ice_sq_cd *cd)\n {\n \tstruct ice_aqc_cfg_l2_node_cgd *cmd;\n@@ -1602,7 +1595,7 @@ ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,\n */\n static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)\n {\n-\tstruct ice_aqc_get_elem buf;\n+\tstruct ice_aqc_txsched_elem_data buf;\n \tenum ice_status status;\n \tu32 node_teid;\n \n@@ -1611,7 +1604,7 @@ static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)\n \tif (status != ICE_SUCCESS)\n \t\treturn false;\n \n-\tif (memcmp(buf.generic, &node->info, sizeof(*buf.generic))) {\n+\tif (memcmp(&buf, &node->info, sizeof(buf))) {\n \t\tice_debug(hw, ICE_DBG_SCHED, \"Node mismatch for teid=0x%x\\n\",\n \t\t\t node_teid);\n \t\treturn false;\n@@ -2140,7 +2133,7 @@ bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)\n */\n enum ice_status\n ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,\n-\t\t\t struct ice_aqc_get_elem *buf, u16 buf_size,\n+\t\t\t struct ice_aqc_txsched_elem_data *buf, u16 buf_size,\n \t\t\t struct ice_sq_cd *cd)\n {\n \tstruct ice_aqc_query_node_to_root *cmd;\n@@ -2904,7 +2897,7 @@ static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)\n * @node: pointer to node\n * @info: node info to update\n *\n- * It updates the HW DB, and local SW DB of node. It updates the scheduling\n+ * Update the HW DB, and local SW DB of node. Update the scheduling\n * parameters of node from argument info data buffer (Info->data buf) and\n * returns success or error on config sched element failure. The caller\n * needs to hold scheduler lock.\n@@ -2913,18 +2906,18 @@ static enum ice_status\n ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,\n \t\t struct ice_aqc_txsched_elem_data *info)\n {\n-\tstruct ice_aqc_conf_elem buf;\n+\tstruct ice_aqc_txsched_elem_data buf;\n \tenum ice_status status;\n \tu16 elem_cfgd = 0;\n \tu16 num_elems = 1;\n \n-\tbuf.generic[0] = *info;\n+\tbuf = *info;\n \t/* Parent TEID is reserved field in this aq call */\n-\tbuf.generic[0].parent_teid = 0;\n+\tbuf.parent_teid = 0;\n \t/* Element type is reserved field in this aq call */\n-\tbuf.generic[0].data.elem_type = 0;\n+\tbuf.data.elem_type = 0;\n \t/* Flags is reserved field in this aq call */\n-\tbuf.generic[0].data.flags = 0;\n+\tbuf.data.flags = 0;\n \n \t/* Update HW DB */\n \t/* Configure element node */\n@@ -3875,9 +3868,9 @@ static struct ice_aqc_rl_profile_info *\n ice_sched_add_rl_profile(struct ice_port_info *pi,\n \t\t\t enum ice_rl_type rl_type, u32 bw, u8 layer_num)\n {\n-\tstruct ice_aqc_rl_profile_generic_elem *buf;\n \tstruct ice_aqc_rl_profile_info *rl_prof_elem;\n \tu16 profiles_added = 0, num_profiles = 1;\n+\tstruct ice_aqc_rl_profile_elem *buf;\n \tenum ice_status status;\n \tstruct ice_hw *hw;\n \tu8 profile_type;\n@@ -3926,8 +3919,7 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,\n \trl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);\n \n \t/* Create new entry in HW DB */\n-\tbuf = (struct ice_aqc_rl_profile_generic_elem *)\n-\t\t&rl_prof_elem->profile;\n+\tbuf = &rl_prof_elem->profile;\n \tstatus = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),\n \t\t\t\t &profiles_added, NULL);\n \tif (status || profiles_added != num_profiles)\ndiff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h\nindex 57bf4b59d..da2604c75 100644\n--- a/drivers/net/ice/base/ice_sched.h\n+++ b/drivers/net/ice/base/ice_sched.h\n@@ -75,15 +75,15 @@ struct ice_sched_agg_info {\n /* FW AQ command calls */\n enum ice_status\n ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,\n-\t\t\tstruct ice_aqc_rl_profile_generic_elem *buf,\n-\t\t\tu16 buf_size, struct ice_sq_cd *cd);\n+\t\t\tstruct ice_aqc_rl_profile_elem *buf, u16 buf_size,\n+\t\t\tstruct ice_sq_cd *cd);\n enum ice_status\n ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,\n-\t\t struct ice_aqc_cfg_l2_node_cgd_data *buf, u16 buf_size,\n+\t\t struct ice_aqc_cfg_l2_node_cgd_elem *buf, u16 buf_size,\n \t\t struct ice_sq_cd *cd);\n enum ice_status\n ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,\n-\t\t\t struct ice_aqc_get_elem *buf, u16 buf_size,\n+\t\t\t struct ice_aqc_txsched_elem_data *buf, u16 buf_size,\n \t\t\t u16 *elems_ret, struct ice_sq_cd *cd);\n enum ice_status ice_sched_init_port(struct ice_port_info *pi);\n enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw);\n@@ -117,7 +117,7 @@ ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,\n bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);\n enum ice_status\n ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,\n-\t\t\t struct ice_aqc_get_elem *buf, u16 buf_size,\n+\t\t\t struct ice_aqc_txsched_elem_data *buf, u16 buf_size,\n \t\t\t struct ice_sq_cd *cd);\n \n /* Tx scheduler rate limiter functions */\ndiff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex ebf405f7a..e0eebe3d5 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -1421,7 +1421,7 @@ ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list)\n * @num_elems: pointer to number of elements\n * @cd: pointer to command details structure or NULL\n *\n- * Get switch configuration (0x0200) to be placed in 'buff'.\n+ * Get switch configuration (0x0200) to be placed in buf.\n * This admin command returns information such as initial VSI/port number\n * and switch ID it belongs to.\n *\n@@ -1438,13 +1438,13 @@ ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list)\n * parsing the response buffer.\n */\n static enum ice_status\n-ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf,\n+ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp_elem *buf,\n \t\t u16 buf_size, u16 *req_desc, u16 *num_elems,\n \t\t struct ice_sq_cd *cd)\n {\n \tstruct ice_aqc_get_sw_cfg *cmd;\n-\tenum ice_status status;\n \tstruct ice_aq_desc desc;\n+\tenum ice_status status;\n \n \tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_sw_cfg);\n \tcmd = &desc.params.get_sw_conf;\n@@ -2438,7 +2438,7 @@ ice_init_port_info(struct ice_port_info *pi, u16 vsi_port_num, u8 type,\n */\n enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)\n {\n-\tstruct ice_aqc_get_sw_cfg_resp *rbuf;\n+\tstruct ice_aqc_get_sw_cfg_resp_elem *rbuf;\n \tenum ice_status status;\n \tu8 num_total_ports;\n \tu16 req_desc = 0;\n@@ -2448,7 +2448,7 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)\n \n \tnum_total_ports = 1;\n \n-\trbuf = (struct ice_aqc_get_sw_cfg_resp *)\n+\trbuf = (struct ice_aqc_get_sw_cfg_resp_elem *)\n \t\tice_malloc(hw, ICE_SW_CFG_MAX_BUF_LEN);\n \n \tif (!rbuf)\n@@ -2460,19 +2460,19 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)\n \t * writing a non-zero value in req_desc\n \t */\n \tdo {\n+\t\tstruct ice_aqc_get_sw_cfg_resp_elem *ele;\n+\n \t\tstatus = ice_aq_get_sw_cfg(hw, rbuf, ICE_SW_CFG_MAX_BUF_LEN,\n \t\t\t\t\t &req_desc, &num_elems, NULL);\n \n \t\tif (status)\n \t\t\tbreak;\n \n-\t\tfor (i = 0; i < num_elems; i++) {\n-\t\t\tstruct ice_aqc_get_sw_cfg_resp_elem *ele;\n+\t\tfor (i = 0, ele = rbuf; i < num_elems; i++, ele++) {\n \t\t\tu16 pf_vf_num, swid, vsi_port_num;\n \t\t\tbool is_vf = false;\n \t\t\tu8 res_type;\n \n-\t\t\tele = rbuf[i].elements;\n \t\t\tvsi_port_num = LE16_TO_CPU(ele->vsi_port_num) &\n \t\t\t\tICE_AQC_GET_SW_CONF_RESP_VSI_PORT_NUM_M;\n \n@@ -3613,17 +3613,18 @@ ice_remove_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,\n * ice_aq_get_res_alloc - get allocated resources\n * @hw: pointer to the HW struct\n * @num_entries: pointer to u16 to store the number of resource entries returned\n- * @buf: pointer to user-supplied buffer\n- * @buf_size: size of buff\n+ * @buf: pointer to buffer\n+ * @buf_size: size of buf\n * @cd: pointer to command details structure or NULL\n *\n- * The user-supplied buffer must be large enough to store the resource\n+ * The caller-supplied buffer must be large enough to store the resource\n * information for all resource types. Each resource type is an\n- * ice_aqc_get_res_resp_data_elem structure.\n+ * ice_aqc_get_res_resp_elem structure.\n */\n enum ice_status\n-ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,\n-\t\t u16 buf_size, struct ice_sq_cd *cd)\n+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,\n+\t\t struct ice_aqc_get_res_resp_elem *buf, u16 buf_size,\n+\t\t struct ice_sq_cd *cd)\n {\n \tstruct ice_aqc_get_res_alloc *resp;\n \tenum ice_status status;\n@@ -3650,8 +3651,8 @@ ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,\n * ice_aq_get_res_descs - get allocated resource descriptors\n * @hw: pointer to the hardware structure\n * @num_entries: number of resource entries in buffer\n- * @buf: Indirect buffer to hold data parameters and response\n- * @buf_size: size of buffer for indirect commands\n+ * @buf: structure to hold response data buffer\n+ * @buf_size: size of buffer\n * @res_type: resource type\n * @res_shared: is resource shared\n * @desc_id: input - first desc ID to start; output - next desc ID\n@@ -3659,9 +3660,8 @@ ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,\n */\n enum ice_status\n ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,\n-\t\t struct ice_aqc_get_allocd_res_desc_resp *buf,\n-\t\t u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,\n-\t\t struct ice_sq_cd *cd)\n+\t\t struct ice_aqc_res_elem *buf, u16 buf_size, u16 res_type,\n+\t\t bool res_shared, u16 *desc_id, struct ice_sq_cd *cd)\n {\n \tstruct ice_aqc_get_allocd_res_desc *cmd;\n \tstruct ice_aq_desc desc;\ndiff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h\nindex 77c70d3b2..fe7b86f12 100644\n--- a/drivers/net/ice/base/ice_switch.h\n+++ b/drivers/net/ice/base/ice_switch.h\n@@ -408,13 +408,13 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,\n enum ice_status\n ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);\n enum ice_status\n-ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,\n-\t\t u16 buf_size, struct ice_sq_cd *cd);\n+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,\n+\t\t struct ice_aqc_get_res_resp_elem *buf, u16 buf_size,\n+\t\t struct ice_sq_cd *cd);\n enum ice_status\n ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,\n-\t\t struct ice_aqc_get_allocd_res_desc_resp *buf,\n-\t\t u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,\n-\t\t struct ice_sq_cd *cd);\n+\t\t struct ice_aqc_res_elem *buf, u16 buf_size, u16 res_type,\n+\t\t bool res_shared, u16 *desc_id, struct ice_sq_cd *cd);\n enum ice_status\n ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);\n enum ice_status\ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex c5dac2e32..d06b05da0 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -2056,7 +2056,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,\n \t\tuint16_t num, uint16_t desc_id,\n \t\tuint16_t *prof_buf, uint16_t *num_prof)\n {\n-\tstruct ice_aqc_get_allocd_res_desc_resp *resp_buf;\n+\tstruct ice_aqc_res_elem *resp_buf;\n \tint ret;\n \tuint16_t buf_len;\n \tbool res_shared = 1;\n@@ -2065,7 +2065,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,\n \tstruct ice_aqc_get_allocd_res_desc *cmd =\n \t\t\t&aq_desc.params.get_res_desc;\n \n-\tbuf_len = sizeof(resp_buf->elem) * num;\n+\tbuf_len = sizeof(*resp_buf) * num;\n \tresp_buf = ice_malloc(hw, buf_len);\n \tif (!resp_buf)\n \t\treturn -ENOMEM;\n@@ -2084,7 +2084,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,\n \telse\n \t\tgoto exit;\n \n-\tice_memcpy(prof_buf, resp_buf->elem, sizeof(resp_buf->elem) *\n+\tice_memcpy(prof_buf, resp_buf, sizeof(*resp_buf) *\n \t\t\t(*num_prof), ICE_NONDMA_TO_NONDMA);\n \n exit:\n", "prefixes": [ "v2", "03/40" ] }