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{
    "id": 77267,
    "url": "http://patches.dpdk.org/api/patches/77267/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200911015603.88359-6-ajit.khaparde@broadcom.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200911015603.88359-6-ajit.khaparde@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200911015603.88359-6-ajit.khaparde@broadcom.com",
    "date": "2020-09-11T01:55:43",
    "name": "[05/25] net/bnxt: fix to break the ipv4 and ipv6 ingress rule",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "d17fa383689cc49d72d3003a6f886c2c1393f9ef",
    "submitter": {
        "id": 501,
        "url": "http://patches.dpdk.org/api/people/501/?format=api",
        "name": "Ajit Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "delegate": {
        "id": 1766,
        "url": "http://patches.dpdk.org/api/users/1766/?format=api",
        "username": "ajitkhaparde",
        "first_name": "Ajit",
        "last_name": "Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200911015603.88359-6-ajit.khaparde@broadcom.com/mbox/",
    "series": [
        {
            "id": 12116,
            "url": "http://patches.dpdk.org/api/series/12116/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12116",
            "date": "2020-09-11T01:55:38",
            "name": "patchset for bnxt",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/12116/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/77267/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/77267/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
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        "X-Relaying-Domain": "broadcom.com",
        "From": "Ajit Khaparde <ajit.khaparde@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "Kishore Padmanabha <kishore.padmanabha@broadcom.com>,\n Mike Baucom <michael.baucom@broadcom.com>",
        "Date": "Thu, 10 Sep 2020 18:55:43 -0700",
        "Message-Id": "<20200911015603.88359-6-ajit.khaparde@broadcom.com>",
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        "References": "<20200911015603.88359-1-ajit.khaparde@broadcom.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH 05/25] net/bnxt: fix to break the ipv4 and ipv6\n\tingress rule",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\n\nThe ingress rule to match on ipv4 and ipv6 is now two rules to\nmake sure both rules can coexist at the same time. Added count\naction only for ingress flows.\n\nFixes: fe82f3e02701 (\"net/bnxt: support exact match templates\")\n\nSigned-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\nReviewed-by: Mike Baucom <michael.baucom@broadcom.com>\n---\n drivers/net/bnxt/tf_ulp/ulp_template_db_act.c |  298 +-\n .../net/bnxt/tf_ulp/ulp_template_db_class.c   | 5522 +++++++++++------\n .../net/bnxt/tf_ulp/ulp_template_db_enum.h    |   66 +-\n .../net/bnxt/tf_ulp/ulp_template_db_field.h   |  767 ++-\n 4 files changed, 4088 insertions(+), 2565 deletions(-)",
    "diff": "diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c\nindex b669a1408..22142c137 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c\n@@ -36,64 +36,61 @@ uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {\n \t[BNXT_ULP_ACT_HID_0020] = 25,\n \t[BNXT_ULP_ACT_HID_0901] = 26,\n \t[BNXT_ULP_ACT_HID_0121] = 27,\n-\t[BNXT_ULP_ACT_HID_0006] = 28,\n-\t[BNXT_ULP_ACT_HID_0804] = 29,\n-\t[BNXT_ULP_ACT_HID_0105] = 30,\n-\t[BNXT_ULP_ACT_HID_0024] = 31,\n-\t[BNXT_ULP_ACT_HID_0905] = 32,\n-\t[BNXT_ULP_ACT_HID_0125] = 33,\n-\t[BNXT_ULP_ACT_HID_0001] = 34,\n-\t[BNXT_ULP_ACT_HID_0005] = 35,\n-\t[BNXT_ULP_ACT_HID_0009] = 36,\n-\t[BNXT_ULP_ACT_HID_000d] = 37,\n-\t[BNXT_ULP_ACT_HID_0021] = 38,\n-\t[BNXT_ULP_ACT_HID_0029] = 39,\n-\t[BNXT_ULP_ACT_HID_0025] = 40,\n-\t[BNXT_ULP_ACT_HID_002d] = 41,\n-\t[BNXT_ULP_ACT_HID_0801] = 42,\n-\t[BNXT_ULP_ACT_HID_0809] = 43,\n-\t[BNXT_ULP_ACT_HID_0805] = 44,\n-\t[BNXT_ULP_ACT_HID_080d] = 45,\n-\t[BNXT_ULP_ACT_HID_0c15] = 46,\n-\t[BNXT_ULP_ACT_HID_0c19] = 47,\n-\t[BNXT_ULP_ACT_HID_02f6] = 48,\n-\t[BNXT_ULP_ACT_HID_04f8] = 49,\n-\t[BNXT_ULP_ACT_HID_01df] = 50,\n-\t[BNXT_ULP_ACT_HID_07e5] = 51,\n-\t[BNXT_ULP_ACT_HID_06ce] = 52,\n-\t[BNXT_ULP_ACT_HID_02fa] = 53,\n-\t[BNXT_ULP_ACT_HID_04fc] = 54,\n-\t[BNXT_ULP_ACT_HID_01e3] = 55,\n-\t[BNXT_ULP_ACT_HID_07e9] = 56,\n-\t[BNXT_ULP_ACT_HID_06d2] = 57,\n-\t[BNXT_ULP_ACT_HID_03f7] = 58,\n-\t[BNXT_ULP_ACT_HID_05f9] = 59,\n-\t[BNXT_ULP_ACT_HID_02e0] = 60,\n-\t[BNXT_ULP_ACT_HID_08e6] = 61,\n-\t[BNXT_ULP_ACT_HID_07cf] = 62,\n-\t[BNXT_ULP_ACT_HID_03fb] = 63,\n-\t[BNXT_ULP_ACT_HID_05fd] = 64,\n-\t[BNXT_ULP_ACT_HID_02e4] = 65,\n-\t[BNXT_ULP_ACT_HID_08ea] = 66,\n-\t[BNXT_ULP_ACT_HID_07d3] = 67,\n-\t[BNXT_ULP_ACT_HID_040d] = 68,\n-\t[BNXT_ULP_ACT_HID_040f] = 69,\n-\t[BNXT_ULP_ACT_HID_0413] = 70,\n-\t[BNXT_ULP_ACT_HID_0c0d] = 71,\n+\t[BNXT_ULP_ACT_HID_0004] = 28,\n+\t[BNXT_ULP_ACT_HID_0006] = 29,\n+\t[BNXT_ULP_ACT_HID_0804] = 30,\n+\t[BNXT_ULP_ACT_HID_0105] = 31,\n+\t[BNXT_ULP_ACT_HID_0024] = 32,\n+\t[BNXT_ULP_ACT_HID_0905] = 33,\n+\t[BNXT_ULP_ACT_HID_0125] = 34,\n+\t[BNXT_ULP_ACT_HID_0001] = 35,\n+\t[BNXT_ULP_ACT_HID_0005] = 36,\n+\t[BNXT_ULP_ACT_HID_0009] = 37,\n+\t[BNXT_ULP_ACT_HID_000d] = 38,\n+\t[BNXT_ULP_ACT_HID_0021] = 39,\n+\t[BNXT_ULP_ACT_HID_0029] = 40,\n+\t[BNXT_ULP_ACT_HID_0025] = 41,\n+\t[BNXT_ULP_ACT_HID_002d] = 42,\n+\t[BNXT_ULP_ACT_HID_0801] = 43,\n+\t[BNXT_ULP_ACT_HID_0809] = 44,\n+\t[BNXT_ULP_ACT_HID_0805] = 45,\n+\t[BNXT_ULP_ACT_HID_080d] = 46,\n+\t[BNXT_ULP_ACT_HID_0c15] = 47,\n+\t[BNXT_ULP_ACT_HID_0c19] = 48,\n+\t[BNXT_ULP_ACT_HID_02f6] = 49,\n+\t[BNXT_ULP_ACT_HID_04f8] = 50,\n+\t[BNXT_ULP_ACT_HID_01df] = 51,\n+\t[BNXT_ULP_ACT_HID_07e5] = 52,\n+\t[BNXT_ULP_ACT_HID_06ce] = 53,\n+\t[BNXT_ULP_ACT_HID_02fa] = 54,\n+\t[BNXT_ULP_ACT_HID_04fc] = 55,\n+\t[BNXT_ULP_ACT_HID_01e3] = 56,\n+\t[BNXT_ULP_ACT_HID_07e9] = 57,\n+\t[BNXT_ULP_ACT_HID_06d2] = 58,\n+\t[BNXT_ULP_ACT_HID_03f7] = 59,\n+\t[BNXT_ULP_ACT_HID_05f9] = 60,\n+\t[BNXT_ULP_ACT_HID_02e0] = 61,\n+\t[BNXT_ULP_ACT_HID_08e6] = 62,\n+\t[BNXT_ULP_ACT_HID_07cf] = 63,\n+\t[BNXT_ULP_ACT_HID_03fb] = 64,\n+\t[BNXT_ULP_ACT_HID_05fd] = 65,\n+\t[BNXT_ULP_ACT_HID_02e4] = 66,\n+\t[BNXT_ULP_ACT_HID_08ea] = 67,\n+\t[BNXT_ULP_ACT_HID_07d3] = 68,\n+\t[BNXT_ULP_ACT_HID_040d] = 69,\n+\t[BNXT_ULP_ACT_HID_040f] = 70,\n+\t[BNXT_ULP_ACT_HID_0413] = 71,\n \t[BNXT_ULP_ACT_HID_0567] = 72,\n \t[BNXT_ULP_ACT_HID_0a49] = 73,\n \t[BNXT_ULP_ACT_HID_050e] = 74,\n-\t[BNXT_ULP_ACT_HID_0d0e] = 75,\n-\t[BNXT_ULP_ACT_HID_0668] = 76,\n-\t[BNXT_ULP_ACT_HID_0b4a] = 77,\n-\t[BNXT_ULP_ACT_HID_0411] = 78,\n-\t[BNXT_ULP_ACT_HID_056b] = 79,\n-\t[BNXT_ULP_ACT_HID_0a4d] = 80,\n-\t[BNXT_ULP_ACT_HID_0c11] = 81,\n-\t[BNXT_ULP_ACT_HID_0512] = 82,\n-\t[BNXT_ULP_ACT_HID_0d12] = 83,\n-\t[BNXT_ULP_ACT_HID_066c] = 84,\n-\t[BNXT_ULP_ACT_HID_0b4e] = 85\n+\t[BNXT_ULP_ACT_HID_0668] = 75,\n+\t[BNXT_ULP_ACT_HID_0b4a] = 76,\n+\t[BNXT_ULP_ACT_HID_0411] = 77,\n+\t[BNXT_ULP_ACT_HID_056b] = 78,\n+\t[BNXT_ULP_ACT_HID_0a4d] = 79,\n+\t[BNXT_ULP_ACT_HID_0512] = 80,\n+\t[BNXT_ULP_ACT_HID_066c] = 81,\n+\t[BNXT_ULP_ACT_HID_0b4e] = 82\n };\n \n struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n@@ -332,6 +329,13 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t.act_tid = 2\n \t},\n \t[28] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_0004,\n+\t.act_sig = { .bits =\n+\t\tBNXT_ULP_ACTION_BIT_COUNT |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n+\t.act_tid = 2\n+\t},\n+\t[29] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0006,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -339,7 +343,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 2\n \t},\n-\t[29] = {\n+\t[30] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0804,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -347,7 +351,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 2\n \t},\n-\t[30] = {\n+\t[31] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0105,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -355,7 +359,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 2\n \t},\n-\t[31] = {\n+\t[32] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0024,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -363,7 +367,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 2\n \t},\n-\t[32] = {\n+\t[33] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0905,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -372,7 +376,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 2\n \t},\n-\t[33] = {\n+\t[34] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0125,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -381,14 +385,14 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 2\n \t},\n-\t[34] = {\n+\t[35] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0001,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[35] = {\n+\t[36] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0005,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n@@ -396,7 +400,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[36] = {\n+\t[37] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0009,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n@@ -404,7 +408,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[37] = {\n+\t[38] = {\n \t.act_hid = BNXT_ULP_ACT_HID_000d,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n@@ -413,7 +417,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[38] = {\n+\t[39] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0021,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n@@ -421,7 +425,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[39] = {\n+\t[40] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0029,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n@@ -430,7 +434,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[40] = {\n+\t[41] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0025,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n@@ -439,7 +443,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[41] = {\n+\t[42] = {\n \t.act_hid = BNXT_ULP_ACT_HID_002d,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n@@ -449,7 +453,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[42] = {\n+\t[43] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0801,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n@@ -457,7 +461,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[43] = {\n+\t[44] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0809,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n@@ -466,7 +470,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[44] = {\n+\t[45] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0805,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n@@ -475,7 +479,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[45] = {\n+\t[46] = {\n \t.act_hid = BNXT_ULP_ACT_HID_080d,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n@@ -485,14 +489,14 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[46] = {\n+\t[47] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0c15,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_VXLAN_ENCAP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[47] = {\n+\t[48] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0c19,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_VXLAN_ENCAP |\n@@ -500,14 +504,14 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[48] = {\n+\t[49] = {\n \t.act_hid = BNXT_ULP_ACT_HID_02f6,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_SET_IPV4_SRC |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[49] = {\n+\t[50] = {\n \t.act_hid = BNXT_ULP_ACT_HID_04f8,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_SET_IPV4_SRC |\n@@ -515,14 +519,14 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[50] = {\n+\t[51] = {\n \t.act_hid = BNXT_ULP_ACT_HID_01df,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_SET_IPV4_DST |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[51] = {\n+\t[52] = {\n \t.act_hid = BNXT_ULP_ACT_HID_07e5,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_SET_IPV4_DST |\n@@ -531,7 +535,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[52] = {\n+\t[53] = {\n \t.act_hid = BNXT_ULP_ACT_HID_06ce,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_SET_IPV4_SRC |\n@@ -541,7 +545,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[53] = {\n+\t[54] = {\n \t.act_hid = BNXT_ULP_ACT_HID_02fa,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -549,7 +553,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[54] = {\n+\t[55] = {\n \t.act_hid = BNXT_ULP_ACT_HID_04fc,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -558,7 +562,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[55] = {\n+\t[56] = {\n \t.act_hid = BNXT_ULP_ACT_HID_01e3,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -566,7 +570,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[56] = {\n+\t[57] = {\n \t.act_hid = BNXT_ULP_ACT_HID_07e9,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -576,7 +580,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[57] = {\n+\t[58] = {\n \t.act_hid = BNXT_ULP_ACT_HID_06d2,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -587,7 +591,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[58] = {\n+\t[59] = {\n \t.act_hid = BNXT_ULP_ACT_HID_03f7,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -595,7 +599,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[59] = {\n+\t[60] = {\n \t.act_hid = BNXT_ULP_ACT_HID_05f9,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -604,7 +608,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[60] = {\n+\t[61] = {\n \t.act_hid = BNXT_ULP_ACT_HID_02e0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -612,7 +616,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[61] = {\n+\t[62] = {\n \t.act_hid = BNXT_ULP_ACT_HID_08e6,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -622,7 +626,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[62] = {\n+\t[63] = {\n \t.act_hid = BNXT_ULP_ACT_HID_07cf,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -633,7 +637,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[63] = {\n+\t[64] = {\n \t.act_hid = BNXT_ULP_ACT_HID_03fb,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -642,7 +646,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[64] = {\n+\t[65] = {\n \t.act_hid = BNXT_ULP_ACT_HID_05fd,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -652,7 +656,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[65] = {\n+\t[66] = {\n \t.act_hid = BNXT_ULP_ACT_HID_02e4,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -661,7 +665,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[66] = {\n+\t[67] = {\n \t.act_hid = BNXT_ULP_ACT_HID_08ea,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -672,7 +676,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[67] = {\n+\t[68] = {\n \t.act_hid = BNXT_ULP_ACT_HID_07d3,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -684,20 +688,20 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[68] = {\n+\t[69] = {\n \t.act_hid = BNXT_ULP_ACT_HID_040d,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 6\n \t},\n-\t[69] = {\n+\t[70] = {\n \t.act_hid = BNXT_ULP_ACT_HID_040f,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DROP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 6\n \t},\n-\t[70] = {\n+\t[71] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0413,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DROP |\n@@ -705,13 +709,6 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 6\n \t},\n-\t[71] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_0c0d,\n-\t.act_sig = { .bits =\n-\t\tBNXT_ULP_ACTION_BIT_POP_VLAN |\n-\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n-\t.act_tid = 6\n-\t},\n \t[72] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0567,\n \t.act_sig = { .bits =\n@@ -737,14 +734,6 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t.act_tid = 6\n \t},\n \t[75] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_0d0e,\n-\t.act_sig = { .bits =\n-\t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n-\t\tBNXT_ULP_ACTION_BIT_POP_VLAN |\n-\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n-\t.act_tid = 6\n-\t},\n-\t[76] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0668,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -754,7 +743,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 6\n \t},\n-\t[77] = {\n+\t[76] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0b4a,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n@@ -763,14 +752,14 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 6\n \t},\n-\t[78] = {\n+\t[77] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0411,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 6\n \t},\n-\t[79] = {\n+\t[78] = {\n \t.act_hid = BNXT_ULP_ACT_HID_056b,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -780,7 +769,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 6\n \t},\n-\t[80] = {\n+\t[79] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0a4d,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -789,15 +778,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 6\n \t},\n-\t[81] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_0c11,\n-\t.act_sig = { .bits =\n-\t\tBNXT_ULP_ACTION_BIT_COUNT |\n-\t\tBNXT_ULP_ACTION_BIT_POP_VLAN |\n-\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n-\t.act_tid = 6\n-\t},\n-\t[82] = {\n+\t[80] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0512,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -805,16 +786,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 6\n \t},\n-\t[83] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_0d12,\n-\t.act_sig = { .bits =\n-\t\tBNXT_ULP_ACTION_BIT_COUNT |\n-\t\tBNXT_ULP_ACTION_BIT_DEC_TTL |\n-\t\tBNXT_ULP_ACTION_BIT_POP_VLAN |\n-\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n-\t.act_tid = 6\n-\t},\n-\t[84] = {\n+\t[81] = {\n \t.act_hid = BNXT_ULP_ACT_HID_066c,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -825,7 +797,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 6\n \t},\n-\t[85] = {\n+\t[82] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0b4e,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_COUNT |\n@@ -1064,7 +1036,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_act_tbl_list[] = {\n \t},\n \t{\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n-\t.resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,\n+\t.resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6,\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,\n \t.cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET,\n@@ -1462,11 +1434,21 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\tBNXT_ULP_SYM_DECAP_FUNC_THRU_L2,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST,\n+\t.result_operand = {\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,\n+\t\t(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 12,\n@@ -2364,11 +2346,21 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\tBNXT_ULP_SYM_DECAP_FUNC_THRU_L2,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST,\n+\t.result_operand = {\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,\n+\t\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,\n+\t\t(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 12,\n@@ -2593,17 +2585,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT,\n-\t.result_operand = {\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff,\n-\t\t(uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c\nindex 1f650e0d7..3d133d2ff 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c\n@@ -11,36 +11,36 @@\n uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {\n \t[BNXT_ULP_CLASS_HID_0138] = 1,\n \t[BNXT_ULP_CLASS_HID_03f0] = 2,\n-\t[BNXT_ULP_CLASS_HID_0134] = 3,\n-\t[BNXT_ULP_CLASS_HID_03fc] = 4,\n-\t[BNXT_ULP_CLASS_HID_0139] = 5,\n-\t[BNXT_ULP_CLASS_HID_03f1] = 6,\n-\t[BNXT_ULP_CLASS_HID_068b] = 7,\n-\t[BNXT_ULP_CLASS_HID_0143] = 8,\n-\t[BNXT_ULP_CLASS_HID_0135] = 9,\n-\t[BNXT_ULP_CLASS_HID_03fd] = 10,\n-\t[BNXT_ULP_CLASS_HID_0687] = 11,\n-\t[BNXT_ULP_CLASS_HID_014f] = 12,\n-\t[BNXT_ULP_CLASS_HID_0118] = 13,\n-\t[BNXT_ULP_CLASS_HID_03d0] = 14,\n-\t[BNXT_ULP_CLASS_HID_0114] = 15,\n-\t[BNXT_ULP_CLASS_HID_03dc] = 16,\n-\t[BNXT_ULP_CLASS_HID_0119] = 17,\n-\t[BNXT_ULP_CLASS_HID_03d1] = 18,\n-\t[BNXT_ULP_CLASS_HID_06ab] = 19,\n-\t[BNXT_ULP_CLASS_HID_0163] = 20,\n-\t[BNXT_ULP_CLASS_HID_0115] = 21,\n-\t[BNXT_ULP_CLASS_HID_03dd] = 22,\n-\t[BNXT_ULP_CLASS_HID_06a7] = 23,\n-\t[BNXT_ULP_CLASS_HID_016f] = 24,\n-\t[BNXT_ULP_CLASS_HID_0128] = 25,\n-\t[BNXT_ULP_CLASS_HID_03e0] = 26,\n-\t[BNXT_ULP_CLASS_HID_0124] = 27,\n-\t[BNXT_ULP_CLASS_HID_03ec] = 28,\n-\t[BNXT_ULP_CLASS_HID_0129] = 29,\n-\t[BNXT_ULP_CLASS_HID_03e1] = 30,\n-\t[BNXT_ULP_CLASS_HID_069b] = 31,\n-\t[BNXT_ULP_CLASS_HID_0153] = 32,\n+\t[BNXT_ULP_CLASS_HID_0139] = 3,\n+\t[BNXT_ULP_CLASS_HID_03f1] = 4,\n+\t[BNXT_ULP_CLASS_HID_068b] = 5,\n+\t[BNXT_ULP_CLASS_HID_0143] = 6,\n+\t[BNXT_ULP_CLASS_HID_0118] = 7,\n+\t[BNXT_ULP_CLASS_HID_03d0] = 8,\n+\t[BNXT_ULP_CLASS_HID_0119] = 9,\n+\t[BNXT_ULP_CLASS_HID_03d1] = 10,\n+\t[BNXT_ULP_CLASS_HID_06ab] = 11,\n+\t[BNXT_ULP_CLASS_HID_0163] = 12,\n+\t[BNXT_ULP_CLASS_HID_0128] = 13,\n+\t[BNXT_ULP_CLASS_HID_03e0] = 14,\n+\t[BNXT_ULP_CLASS_HID_0129] = 15,\n+\t[BNXT_ULP_CLASS_HID_03e1] = 16,\n+\t[BNXT_ULP_CLASS_HID_069b] = 17,\n+\t[BNXT_ULP_CLASS_HID_0153] = 18,\n+\t[BNXT_ULP_CLASS_HID_0134] = 19,\n+\t[BNXT_ULP_CLASS_HID_03fc] = 20,\n+\t[BNXT_ULP_CLASS_HID_0135] = 21,\n+\t[BNXT_ULP_CLASS_HID_03fd] = 22,\n+\t[BNXT_ULP_CLASS_HID_0687] = 23,\n+\t[BNXT_ULP_CLASS_HID_014f] = 24,\n+\t[BNXT_ULP_CLASS_HID_0114] = 25,\n+\t[BNXT_ULP_CLASS_HID_03dc] = 26,\n+\t[BNXT_ULP_CLASS_HID_0115] = 27,\n+\t[BNXT_ULP_CLASS_HID_03dd] = 28,\n+\t[BNXT_ULP_CLASS_HID_06a7] = 29,\n+\t[BNXT_ULP_CLASS_HID_016f] = 30,\n+\t[BNXT_ULP_CLASS_HID_0124] = 31,\n+\t[BNXT_ULP_CLASS_HID_03ec] = 32,\n \t[BNXT_ULP_CLASS_HID_0125] = 33,\n \t[BNXT_ULP_CLASS_HID_03ed] = 34,\n \t[BNXT_ULP_CLASS_HID_0697] = 35,\n@@ -153,36 +153,36 @@ uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {\n \t[BNXT_ULP_CLASS_HID_077f] = 142,\n \t[BNXT_ULP_CLASS_HID_01e1] = 143,\n \t[BNXT_ULP_CLASS_HID_0329] = 144,\n-\t[BNXT_ULP_CLASS_HID_01dd] = 145,\n-\t[BNXT_ULP_CLASS_HID_0315] = 146,\n-\t[BNXT_ULP_CLASS_HID_01c1] = 147,\n-\t[BNXT_ULP_CLASS_HID_0309] = 148,\n-\t[BNXT_ULP_CLASS_HID_003d] = 149,\n-\t[BNXT_ULP_CLASS_HID_02f5] = 150,\n-\t[BNXT_ULP_CLASS_HID_01d1] = 151,\n-\t[BNXT_ULP_CLASS_HID_0319] = 152,\n-\t[BNXT_ULP_CLASS_HID_01cd] = 153,\n-\t[BNXT_ULP_CLASS_HID_0305] = 154,\n-\t[BNXT_ULP_CLASS_HID_01e2] = 155,\n-\t[BNXT_ULP_CLASS_HID_032a] = 156,\n-\t[BNXT_ULP_CLASS_HID_0650] = 157,\n-\t[BNXT_ULP_CLASS_HID_0198] = 158,\n-\t[BNXT_ULP_CLASS_HID_01de] = 159,\n-\t[BNXT_ULP_CLASS_HID_0316] = 160,\n-\t[BNXT_ULP_CLASS_HID_066c] = 161,\n-\t[BNXT_ULP_CLASS_HID_01a4] = 162,\n-\t[BNXT_ULP_CLASS_HID_01c2] = 163,\n-\t[BNXT_ULP_CLASS_HID_030a] = 164,\n-\t[BNXT_ULP_CLASS_HID_0670] = 165,\n-\t[BNXT_ULP_CLASS_HID_01b8] = 166,\n-\t[BNXT_ULP_CLASS_HID_003e] = 167,\n-\t[BNXT_ULP_CLASS_HID_02f6] = 168,\n-\t[BNXT_ULP_CLASS_HID_078c] = 169,\n-\t[BNXT_ULP_CLASS_HID_0044] = 170,\n-\t[BNXT_ULP_CLASS_HID_01d2] = 171,\n-\t[BNXT_ULP_CLASS_HID_031a] = 172,\n-\t[BNXT_ULP_CLASS_HID_0660] = 173,\n-\t[BNXT_ULP_CLASS_HID_01a8] = 174,\n+\t[BNXT_ULP_CLASS_HID_01c1] = 145,\n+\t[BNXT_ULP_CLASS_HID_0309] = 146,\n+\t[BNXT_ULP_CLASS_HID_01d1] = 147,\n+\t[BNXT_ULP_CLASS_HID_0319] = 148,\n+\t[BNXT_ULP_CLASS_HID_01e2] = 149,\n+\t[BNXT_ULP_CLASS_HID_032a] = 150,\n+\t[BNXT_ULP_CLASS_HID_0650] = 151,\n+\t[BNXT_ULP_CLASS_HID_0198] = 152,\n+\t[BNXT_ULP_CLASS_HID_01c2] = 153,\n+\t[BNXT_ULP_CLASS_HID_030a] = 154,\n+\t[BNXT_ULP_CLASS_HID_0670] = 155,\n+\t[BNXT_ULP_CLASS_HID_01b8] = 156,\n+\t[BNXT_ULP_CLASS_HID_01d2] = 157,\n+\t[BNXT_ULP_CLASS_HID_031a] = 158,\n+\t[BNXT_ULP_CLASS_HID_0660] = 159,\n+\t[BNXT_ULP_CLASS_HID_01a8] = 160,\n+\t[BNXT_ULP_CLASS_HID_01dd] = 161,\n+\t[BNXT_ULP_CLASS_HID_0315] = 162,\n+\t[BNXT_ULP_CLASS_HID_003d] = 163,\n+\t[BNXT_ULP_CLASS_HID_02f5] = 164,\n+\t[BNXT_ULP_CLASS_HID_01cd] = 165,\n+\t[BNXT_ULP_CLASS_HID_0305] = 166,\n+\t[BNXT_ULP_CLASS_HID_01de] = 167,\n+\t[BNXT_ULP_CLASS_HID_0316] = 168,\n+\t[BNXT_ULP_CLASS_HID_066c] = 169,\n+\t[BNXT_ULP_CLASS_HID_01a4] = 170,\n+\t[BNXT_ULP_CLASS_HID_003e] = 171,\n+\t[BNXT_ULP_CLASS_HID_02f6] = 172,\n+\t[BNXT_ULP_CLASS_HID_078c] = 173,\n+\t[BNXT_ULP_CLASS_HID_0044] = 174,\n \t[BNXT_ULP_CLASS_HID_01ce] = 175,\n \t[BNXT_ULP_CLASS_HID_0306] = 176,\n \t[BNXT_ULP_CLASS_HID_067c] = 177,\n@@ -218,10 +218,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.wc_pri = 1\n \t},\n \t[3] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0134,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0139,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n@@ -232,10 +233,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.wc_pri = 2\n \t},\n \t[4] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_03fc,\n+\t.class_hid = BNXT_ULP_CLASS_HID_03f1,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n@@ -245,7 +247,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.wc_pri = 3\n \t},\n \t[5] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0139,\n+\t.class_hid = BNXT_ULP_CLASS_HID_068b,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n@@ -255,12 +257,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n \t.class_tid = 6,\n \t.wc_pri = 4\n \t},\n \t[6] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_03f1,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0143,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n@@ -269,47 +272,47 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n \t.class_tid = 6,\n \t.wc_pri = 5\n \t},\n \t[7] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_068b,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0118,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n \t.class_tid = 6,\n \t.wc_pri = 6\n \t},\n \t[8] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0143,\n+\t.class_hid = BNXT_ULP_CLASS_HID_03d0,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n \t.class_tid = 6,\n \t.wc_pri = 7\n \t},\n \t[9] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0135,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0119,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n@@ -320,11 +323,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.wc_pri = 8\n \t},\n \t[10] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_03fd,\n+\t.class_hid = BNXT_ULP_CLASS_HID_03d1,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n@@ -334,11 +338,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.wc_pri = 9\n \t},\n \t[11] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0687,\n+\t.class_hid = BNXT_ULP_CLASS_HID_06ab,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n@@ -350,11 +355,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.wc_pri = 10\n \t},\n \t[12] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_014f,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0163,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n@@ -365,11 +371,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.wc_pri = 11\n \t},\n \t[13] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0118,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0128,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n@@ -380,11 +386,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.wc_pri = 12\n \t},\n \t[14] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_03d0,\n+\t.class_hid = BNXT_ULP_CLASS_HID_03e0,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n@@ -394,11 +400,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.wc_pri = 13\n \t},\n \t[15] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0114,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0129,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n@@ -409,11 +416,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.wc_pri = 14\n \t},\n \t[16] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_03dc,\n+\t.class_hid = BNXT_ULP_CLASS_HID_03e1,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n@@ -423,254 +431,246 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.wc_pri = 15\n \t},\n \t[17] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0119,\n+\t.class_hid = BNXT_ULP_CLASS_HID_069b,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n \t.class_tid = 6,\n \t.wc_pri = 16\n \t},\n \t[18] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_03d1,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0153,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n \t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n \t.class_tid = 6,\n \t.wc_pri = 17\n \t},\n \t[19] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_06ab,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0134,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 18\n+\t.class_tid = 7,\n+\t.wc_pri = 0\n \t},\n \t[20] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0163,\n+\t.class_hid = BNXT_ULP_CLASS_HID_03fc,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 19\n+\t.class_tid = 7,\n+\t.wc_pri = 1\n \t},\n \t[21] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0115,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0135,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 20\n+\t.class_tid = 7,\n+\t.wc_pri = 2\n \t},\n \t[22] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_03dd,\n+\t.class_hid = BNXT_ULP_CLASS_HID_03fd,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 21\n+\t.class_tid = 7,\n+\t.wc_pri = 3\n \t},\n \t[23] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_06a7,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0687,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF7_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 22\n+\t.class_tid = 7,\n+\t.wc_pri = 4\n \t},\n \t[24] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_016f,\n+\t.class_hid = BNXT_ULP_CLASS_HID_014f,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 23\n+\t.class_tid = 7,\n+\t.wc_pri = 5\n \t},\n \t[25] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0128,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0114,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 24\n+\t.class_tid = 7,\n+\t.wc_pri = 6\n \t},\n \t[26] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_03e0,\n+\t.class_hid = BNXT_ULP_CLASS_HID_03dc,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 25\n+\t.class_tid = 7,\n+\t.wc_pri = 7\n \t},\n \t[27] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0124,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0115,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 26\n+\t.class_tid = 7,\n+\t.wc_pri = 8\n \t},\n \t[28] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_03ec,\n+\t.class_hid = BNXT_ULP_CLASS_HID_03dd,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 27\n+\t.class_tid = 7,\n+\t.wc_pri = 9\n \t},\n \t[29] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0129,\n+\t.class_hid = BNXT_ULP_CLASS_HID_06a7,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF7_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 28\n+\t.class_tid = 7,\n+\t.wc_pri = 10\n \t},\n \t[30] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_03e1,\n+\t.class_hid = BNXT_ULP_CLASS_HID_016f,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 29\n+\t.class_tid = 7,\n+\t.wc_pri = 11\n \t},\n \t[31] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_069b,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0124,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 30\n+\t.class_tid = 7,\n+\t.wc_pri = 12\n \t},\n \t[32] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0153,\n+\t.class_hid = BNXT_ULP_CLASS_HID_03ec,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 31\n+\t.class_tid = 7,\n+\t.wc_pri = 13\n \t},\n \t[33] = {\n \t.class_hid = BNXT_ULP_CLASS_HID_0125,\n@@ -681,12 +681,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 32\n+\t.class_tid = 7,\n+\t.wc_pri = 14\n \t},\n \t[34] = {\n \t.class_hid = BNXT_ULP_CLASS_HID_03ed,\n@@ -697,11 +697,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 33\n+\t.class_tid = 7,\n+\t.wc_pri = 15\n \t},\n \t[35] = {\n \t.class_hid = BNXT_ULP_CLASS_HID_0697,\n@@ -712,13 +712,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF7_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 34\n+\t.class_tid = 7,\n+\t.wc_pri = 16\n \t},\n \t[36] = {\n \t.class_hid = BNXT_ULP_CLASS_HID_015f,\n@@ -729,12 +729,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF6_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF7_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 6,\n-\t.wc_pri = 35\n+\t.class_tid = 7,\n+\t.wc_pri = 17\n \t},\n \t[37] = {\n \t.class_hid = BNXT_ULP_CLASS_HID_0452,\n@@ -744,14 +744,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF7_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF7_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF8_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 7,\n+\t.class_tid = 8,\n \t.wc_pri = 0\n \t},\n \t[38] = {\n@@ -762,13 +762,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF7_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 7,\n+\t.class_tid = 8,\n \t.wc_pri = 1\n \t},\n \t[39] = {\n@@ -779,13 +779,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF7_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF8_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 7,\n+\t.class_tid = 8,\n \t.wc_pri = 2\n \t},\n \t[40] = {\n@@ -796,12 +796,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 7,\n+\t.class_tid = 8,\n \t.wc_pri = 3\n \t},\n \t[41] = {\n@@ -812,14 +812,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF8_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF9_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 8,\n+\t.class_tid = 9,\n \t.wc_pri = 0\n \t},\n \t[42] = {\n@@ -830,13 +830,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 8,\n+\t.class_tid = 9,\n \t.wc_pri = 1\n \t},\n \t[43] = {\n@@ -847,13 +847,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF8_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF9_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 8,\n+\t.class_tid = 9,\n \t.wc_pri = 2\n \t},\n \t[44] = {\n@@ -864,12 +864,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 8,\n+\t.class_tid = 9,\n \t.wc_pri = 3\n \t},\n \t[45] = {\n@@ -880,14 +880,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF9_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF9_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF10_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 9,\n+\t.class_tid = 10,\n \t.wc_pri = 0\n \t},\n \t[46] = {\n@@ -898,13 +898,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF9_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF10_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 9,\n+\t.class_tid = 10,\n \t.wc_pri = 1\n \t},\n \t[47] = {\n@@ -915,13 +915,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF9_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 9,\n+\t.class_tid = 10,\n \t.wc_pri = 2\n \t},\n \t[48] = {\n@@ -932,12 +932,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 9,\n+\t.class_tid = 10,\n \t.wc_pri = 3\n \t},\n \t[49] = {\n@@ -948,14 +948,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF10_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF11_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 10,\n+\t.class_tid = 11,\n \t.wc_pri = 0\n \t},\n \t[50] = {\n@@ -966,13 +966,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF10_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF11_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 10,\n+\t.class_tid = 11,\n \t.wc_pri = 1\n \t},\n \t[51] = {\n@@ -983,13 +983,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 10,\n+\t.class_tid = 11,\n \t.wc_pri = 2\n \t},\n \t[52] = {\n@@ -1000,12 +1000,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 10,\n+\t.class_tid = 11,\n \t.wc_pri = 3\n \t},\n \t[53] = {\n@@ -1016,15 +1016,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 0\n \t},\n \t[54] = {\n@@ -1035,14 +1035,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 1\n \t},\n \t[55] = {\n@@ -1053,14 +1053,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 2\n \t},\n \t[56] = {\n@@ -1071,13 +1071,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 3\n \t},\n \t[57] = {\n@@ -1089,16 +1089,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 4\n \t},\n \t[58] = {\n@@ -1110,15 +1110,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 5\n \t},\n \t[59] = {\n@@ -1130,15 +1130,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 6\n \t},\n \t[60] = {\n@@ -1150,14 +1150,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 7\n \t},\n \t[61] = {\n@@ -1169,15 +1169,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 8\n \t},\n \t[62] = {\n@@ -1189,14 +1189,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 9\n \t},\n \t[63] = {\n@@ -1208,14 +1208,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 10\n \t},\n \t[64] = {\n@@ -1227,13 +1227,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF11_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 11,\n+\t.class_tid = 12,\n \t.wc_pri = 11\n \t},\n \t[65] = {\n@@ -1244,15 +1244,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 0\n \t},\n \t[66] = {\n@@ -1263,14 +1263,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 1\n \t},\n \t[67] = {\n@@ -1281,14 +1281,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 2\n \t},\n \t[68] = {\n@@ -1299,13 +1299,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 3\n \t},\n \t[69] = {\n@@ -1317,16 +1317,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 4\n \t},\n \t[70] = {\n@@ -1338,15 +1338,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 5\n \t},\n \t[71] = {\n@@ -1358,15 +1358,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 6\n \t},\n \t[72] = {\n@@ -1378,14 +1378,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 7\n \t},\n \t[73] = {\n@@ -1397,15 +1397,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 8\n \t},\n \t[74] = {\n@@ -1417,14 +1417,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 9\n \t},\n \t[75] = {\n@@ -1436,14 +1436,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 10\n \t},\n \t[76] = {\n@@ -1455,13 +1455,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF12_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 12,\n+\t.class_tid = 13,\n \t.wc_pri = 11\n \t},\n \t[77] = {\n@@ -1472,15 +1472,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 0\n \t},\n \t[78] = {\n@@ -1491,14 +1491,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 1\n \t},\n \t[79] = {\n@@ -1509,14 +1509,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 2\n \t},\n \t[80] = {\n@@ -1527,13 +1527,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 3\n \t},\n \t[81] = {\n@@ -1545,16 +1545,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 4\n \t},\n \t[82] = {\n@@ -1566,15 +1566,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 5\n \t},\n \t[83] = {\n@@ -1586,15 +1586,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 6\n \t},\n \t[84] = {\n@@ -1606,14 +1606,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 7\n \t},\n \t[85] = {\n@@ -1625,15 +1625,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 8\n \t},\n \t[86] = {\n@@ -1645,14 +1645,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 9\n \t},\n \t[87] = {\n@@ -1664,14 +1664,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 10\n \t},\n \t[88] = {\n@@ -1683,13 +1683,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF13_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 13,\n+\t.class_tid = 14,\n \t.wc_pri = 11\n \t},\n \t[89] = {\n@@ -1700,15 +1700,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 0\n \t},\n \t[90] = {\n@@ -1719,14 +1719,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 1\n \t},\n \t[91] = {\n@@ -1737,14 +1737,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 2\n \t},\n \t[92] = {\n@@ -1755,13 +1755,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 3\n \t},\n \t[93] = {\n@@ -1773,16 +1773,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 4\n \t},\n \t[94] = {\n@@ -1794,15 +1794,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 5\n \t},\n \t[95] = {\n@@ -1814,15 +1814,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 6\n \t},\n \t[96] = {\n@@ -1834,14 +1834,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 7\n \t},\n \t[97] = {\n@@ -1853,15 +1853,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 8\n \t},\n \t[98] = {\n@@ -1873,14 +1873,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 9\n \t},\n \t[99] = {\n@@ -1892,14 +1892,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 10\n \t},\n \t[100] = {\n@@ -1911,13 +1911,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF14_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 14,\n+\t.class_tid = 15,\n \t.wc_pri = 11\n \t},\n \t[101] = {\n@@ -1932,19 +1932,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_I_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF15_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF15_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF15_BITMASK_O_UDP_DST_PORT |\n-\t\tBNXT_ULP_HF15_BITMASK_T_VXLAN_VNI |\n-\t\tBNXT_ULP_HF15_BITMASK_I_ETH_TYPE |\n-\t\tBNXT_ULP_HF15_BITMASK_I_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF15_BITMASK_I_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF15_BITMASK_I_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF15_BITMASK_I_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF15_BITMASK_I_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF16_BITMASK_T_VXLAN_VNI |\n+\t\tBNXT_ULP_HF16_BITMASK_I_ETH_TYPE |\n+\t\tBNXT_ULP_HF16_BITMASK_I_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF16_BITMASK_I_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF16_BITMASK_I_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF16_BITMASK_I_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF16_BITMASK_I_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 15,\n+\t.class_tid = 16,\n \t.wc_pri = 0\n \t},\n \t[102] = {\n@@ -1959,17 +1959,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_I_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF15_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF15_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF15_BITMASK_O_UDP_DST_PORT |\n-\t\tBNXT_ULP_HF15_BITMASK_T_VXLAN_VNI |\n-\t\tBNXT_ULP_HF15_BITMASK_I_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF15_BITMASK_I_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF15_BITMASK_I_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF15_BITMASK_I_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF15_BITMASK_I_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF16_BITMASK_T_VXLAN_VNI |\n+\t\tBNXT_ULP_HF16_BITMASK_I_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF16_BITMASK_I_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF16_BITMASK_I_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF16_BITMASK_I_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF16_BITMASK_I_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 15,\n+\t.class_tid = 16,\n \t.wc_pri = 1\n \t},\n \t[103] = {\n@@ -1981,14 +1981,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 0\n \t},\n \t[104] = {\n@@ -2000,13 +2000,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 1\n \t},\n \t[105] = {\n@@ -2018,13 +2018,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 2\n \t},\n \t[106] = {\n@@ -2036,12 +2036,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 3\n \t},\n \t[107] = {\n@@ -2053,13 +2053,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 4\n \t},\n \t[108] = {\n@@ -2071,12 +2071,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 5\n \t},\n \t[109] = {\n@@ -2088,12 +2088,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 6\n \t},\n \t[110] = {\n@@ -2105,11 +2105,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 7\n \t},\n \t[111] = {\n@@ -2122,15 +2122,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 8\n \t},\n \t[112] = {\n@@ -2143,14 +2143,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 9\n \t},\n \t[113] = {\n@@ -2163,14 +2163,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 10\n \t},\n \t[114] = {\n@@ -2183,13 +2183,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 11\n \t},\n \t[115] = {\n@@ -2202,14 +2202,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 12\n \t},\n \t[116] = {\n@@ -2222,13 +2222,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 13\n \t},\n \t[117] = {\n@@ -2241,13 +2241,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 14\n \t},\n \t[118] = {\n@@ -2260,12 +2260,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 15\n \t},\n \t[119] = {\n@@ -2278,14 +2278,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 16\n \t},\n \t[120] = {\n@@ -2298,13 +2298,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 17\n \t},\n \t[121] = {\n@@ -2317,13 +2317,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 18\n \t},\n \t[122] = {\n@@ -2336,12 +2336,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_OO_VLAN_VID |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 19\n \t},\n \t[123] = {\n@@ -2354,13 +2354,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 20\n \t},\n \t[124] = {\n@@ -2373,12 +2373,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 21\n \t},\n \t[125] = {\n@@ -2391,12 +2391,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 22\n \t},\n \t[126] = {\n@@ -2409,11 +2409,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF16_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF17_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 16,\n+\t.class_tid = 17,\n \t.wc_pri = 23\n \t},\n \t[127] = {\n@@ -2424,14 +2424,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF18_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 17,\n+\t.class_tid = 18,\n \t.wc_pri = 0\n \t},\n \t[128] = {\n@@ -2442,13 +2442,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF17_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF18_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 17,\n+\t.class_tid = 18,\n \t.wc_pri = 1\n \t},\n \t[129] = {\n@@ -2459,13 +2459,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 17,\n+\t.class_tid = 18,\n \t.wc_pri = 2\n \t},\n \t[130] = {\n@@ -2476,12 +2476,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 17,\n+\t.class_tid = 18,\n \t.wc_pri = 3\n \t},\n \t[131] = {\n@@ -2492,14 +2492,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF18_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF19_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 18,\n+\t.class_tid = 19,\n \t.wc_pri = 0\n \t},\n \t[132] = {\n@@ -2510,13 +2510,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF18_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF19_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 18,\n+\t.class_tid = 19,\n \t.wc_pri = 1\n \t},\n \t[133] = {\n@@ -2527,13 +2527,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |\n-\t\tBNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |\n+\t\tBNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 18,\n+\t.class_tid = 19,\n \t.wc_pri = 2\n \t},\n \t[134] = {\n@@ -2544,12 +2544,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 18,\n+\t.class_tid = 19,\n \t.wc_pri = 3\n \t},\n \t[135] = {\n@@ -2560,14 +2560,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF19_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF19_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF20_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 19,\n+\t.class_tid = 20,\n \t.wc_pri = 0\n \t},\n \t[136] = {\n@@ -2578,13 +2578,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF19_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF20_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 19,\n+\t.class_tid = 20,\n \t.wc_pri = 1\n \t},\n \t[137] = {\n@@ -2595,13 +2595,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF19_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 19,\n+\t.class_tid = 20,\n \t.wc_pri = 2\n \t},\n \t[138] = {\n@@ -2612,12 +2612,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 19,\n+\t.class_tid = 20,\n \t.wc_pri = 3\n \t},\n \t[139] = {\n@@ -2628,14 +2628,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF20_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 20,\n+\t.class_tid = 21,\n \t.wc_pri = 0\n \t},\n \t[140] = {\n@@ -2646,13 +2646,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF20_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 20,\n+\t.class_tid = 21,\n \t.wc_pri = 1\n \t},\n \t[141] = {\n@@ -2663,13 +2663,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |\n-\t\tBNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID |\n+\t\tBNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 20,\n+\t.class_tid = 21,\n \t.wc_pri = 2\n \t},\n \t[142] = {\n@@ -2680,12 +2680,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |\n-\t\tBNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |\n-\t\tBNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT |\n-\t\tBNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT |\n+\t\tBNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |\n+\t\tBNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |\n+\t\tBNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |\n+\t\tBNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 20,\n+\t.class_tid = 21,\n \t.wc_pri = 3\n \t},\n \t[143] = {\n@@ -2695,11 +2695,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 0\n \t},\n \t[144] = {\n@@ -2709,466 +2709,466 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 1\n \t},\n \t[145] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_01dd,\n+\t.class_hid = BNXT_ULP_CLASS_HID_01c1,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 2\n \t},\n \t[146] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0315,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0309,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 3\n \t},\n \t[147] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_01c1,\n+\t.class_hid = BNXT_ULP_CLASS_HID_01d1,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 4\n \t},\n \t[148] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0309,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0319,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 5\n \t},\n \t[149] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_003d,\n+\t.class_hid = BNXT_ULP_CLASS_HID_01e2,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 6\n \t},\n \t[150] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_02f5,\n+\t.class_hid = BNXT_ULP_CLASS_HID_032a,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 7\n \t},\n \t[151] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_01d1,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0650,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF22_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 8\n \t},\n \t[152] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0319,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0198,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 9\n \t},\n \t[153] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_01cd,\n+\t.class_hid = BNXT_ULP_CLASS_HID_01c2,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 10\n \t},\n \t[154] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0305,\n+\t.class_hid = BNXT_ULP_CLASS_HID_030a,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 11\n \t},\n \t[155] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_01e2,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0670,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF22_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 12\n \t},\n \t[156] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_032a,\n+\t.class_hid = BNXT_ULP_CLASS_HID_01b8,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 13\n \t},\n \t[157] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0650,\n+\t.class_hid = BNXT_ULP_CLASS_HID_01d2,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 14\n \t},\n \t[158] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0198,\n+\t.class_hid = BNXT_ULP_CLASS_HID_031a,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 15\n \t},\n \t[159] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_01de,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0660,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF22_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 16\n \t},\n \t[160] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0316,\n+\t.class_hid = BNXT_ULP_CLASS_HID_01a8,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF22_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n+\t.class_tid = 22,\n \t.wc_pri = 17\n \t},\n \t[161] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_066c,\n+\t.class_hid = BNXT_ULP_CLASS_HID_01dd,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 18\n+\t.class_tid = 23,\n+\t.wc_pri = 0\n \t},\n \t[162] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_01a4,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0315,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 19\n+\t.class_tid = 23,\n+\t.wc_pri = 1\n \t},\n \t[163] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_01c2,\n+\t.class_hid = BNXT_ULP_CLASS_HID_003d,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 20\n+\t.class_tid = 23,\n+\t.wc_pri = 2\n \t},\n \t[164] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_030a,\n+\t.class_hid = BNXT_ULP_CLASS_HID_02f5,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n \t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 21\n+\t.class_tid = 23,\n+\t.wc_pri = 3\n \t},\n \t[165] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0670,\n+\t.class_hid = BNXT_ULP_CLASS_HID_01cd,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 22\n+\t.class_tid = 23,\n+\t.wc_pri = 4\n \t},\n \t[166] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_01b8,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0305,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 23\n+\t.class_tid = 23,\n+\t.wc_pri = 5\n \t},\n \t[167] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_003e,\n+\t.class_hid = BNXT_ULP_CLASS_HID_01de,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 24\n+\t.class_tid = 23,\n+\t.wc_pri = 6\n \t},\n \t[168] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_02f6,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0316,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 25\n+\t.class_tid = 23,\n+\t.wc_pri = 7\n \t},\n \t[169] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_078c,\n+\t.class_hid = BNXT_ULP_CLASS_HID_066c,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF23_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 26\n+\t.class_tid = 23,\n+\t.wc_pri = 8\n \t},\n \t[170] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0044,\n+\t.class_hid = BNXT_ULP_CLASS_HID_01a4,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n \t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 27\n+\t.class_tid = 23,\n+\t.wc_pri = 9\n \t},\n \t[171] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_01d2,\n+\t.class_hid = BNXT_ULP_CLASS_HID_003e,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 28\n+\t.class_tid = 23,\n+\t.wc_pri = 10\n \t},\n \t[172] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_031a,\n+\t.class_hid = BNXT_ULP_CLASS_HID_02f6,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 29\n+\t.class_tid = 23,\n+\t.wc_pri = 11\n \t},\n \t[173] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0660,\n+\t.class_hid = BNXT_ULP_CLASS_HID_078c,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF23_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 30\n+\t.class_tid = 23,\n+\t.wc_pri = 12\n \t},\n \t[174] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_01a8,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0044,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_OO_VLAN |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_TCP |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV6 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 31\n+\t.class_tid = 23,\n+\t.wc_pri = 13\n \t},\n \t[175] = {\n \t.class_hid = BNXT_ULP_CLASS_HID_01ce,\n@@ -3179,12 +3179,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_TYPE |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 32\n+\t.class_tid = 23,\n+\t.wc_pri = 14\n \t},\n \t[176] = {\n \t.class_hid = BNXT_ULP_CLASS_HID_0306,\n@@ -3195,11 +3195,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 33\n+\t.class_tid = 23,\n+\t.wc_pri = 15\n \t},\n \t[177] = {\n \t.class_hid = BNXT_ULP_CLASS_HID_067c,\n@@ -3210,13 +3210,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_TYPE |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_TYPE |\n+\t\tBNXT_ULP_HF23_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 34\n+\t.class_tid = 23,\n+\t.wc_pri = 16\n \t},\n \t[178] = {\n \t.class_hid = BNXT_ULP_CLASS_HID_01b4,\n@@ -3227,12 +3227,12 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t\tBNXT_ULP_HDR_BIT_O_TCP |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_SMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_O_ETH_DMAC |\n-\t\tBNXT_ULP_HF21_BITMASK_OO_VLAN_VID |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC |\n+\t\tBNXT_ULP_HF23_BITMASK_OO_VLAN_VID |\n \t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 21,\n-\t.wc_pri = 35\n+\t.class_tid = 23,\n+\t.wc_pri = 17\n \t}\n };\n \n@@ -3282,7 +3282,7 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {\n \t[((7 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n \t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 5,\n+\t.num_tbls = 4,\n \t.start_tbl_idx = 32,\n \t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n \t},\n@@ -3290,28 +3290,28 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {\n \t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n \t.num_tbls = 5,\n-\t.start_tbl_idx = 37,\n+\t.start_tbl_idx = 36,\n \t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n \t},\n \t[((9 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n \t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n \t.num_tbls = 5,\n-\t.start_tbl_idx = 42,\n+\t.start_tbl_idx = 41,\n \t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n \t},\n \t[((10 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n \t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n \t.num_tbls = 5,\n-\t.start_tbl_idx = 47,\n+\t.start_tbl_idx = 46,\n \t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n \t},\n \t[((11 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n \t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 4,\n-\t.start_tbl_idx = 52,\n+\t.num_tbls = 5,\n+\t.start_tbl_idx = 51,\n \t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n \t},\n \t[((12 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n@@ -3352,7 +3352,7 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {\n \t[((17 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n \t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 5,\n+\t.num_tbls = 4,\n \t.start_tbl_idx = 76,\n \t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n \t},\n@@ -3360,28 +3360,42 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {\n \t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n \t.num_tbls = 5,\n-\t.start_tbl_idx = 81,\n+\t.start_tbl_idx = 80,\n \t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n \t},\n \t[((19 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n \t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n \t.num_tbls = 5,\n-\t.start_tbl_idx = 86,\n+\t.start_tbl_idx = 85,\n \t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n \t},\n \t[((20 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n \t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n \t.num_tbls = 5,\n-\t.start_tbl_idx = 91,\n+\t.start_tbl_idx = 90,\n \t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n \t},\n \t[((21 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n \t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n+\t.num_tbls = 5,\n+\t.start_tbl_idx = 95,\n+\t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n+\t},\n+\t[((22 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n+\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n+\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n+\t.num_tbls = 4,\n+\t.start_tbl_idx = 100,\n+\t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n+\t},\n+\t[((23 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n+\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n+\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n \t.num_tbls = 4,\n-\t.start_tbl_idx = 96,\n+\t.start_tbl_idx = 104,\n \t.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR\n \t}\n };\n@@ -3580,7 +3594,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t},\n \t{\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n-\t.resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,\n+\t.resource_type = TF_TBL_TYPE_ACT_ENCAP_8B,\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,\n \t.direction = TF_DIR_TX,\n@@ -3883,38 +3897,21 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES\n \t},\n \t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,\n \t.direction = TF_DIR_RX,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,\n \t.key_start_idx = 177,\n-\t.blob_key_bit_size = 8,\n-\t.key_bit_size = 8,\n-\t.key_num_fields = 1,\n+\t.blob_key_bit_size = 167,\n+\t.key_bit_size = 167,\n+\t.key_num_fields = 13,\n \t.result_start_idx = 315,\n-\t.result_bit_size = 10,\n-\t.result_num_fields = 1,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 5,\n-\t.ident_nums = 1\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,\n-\t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 178,\n-\t.blob_key_bit_size = 167,\n-\t.key_bit_size = 167,\n-\t.key_num_fields = 13,\n-\t.result_start_idx = 316,\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.encap_num_fields = 0,\n-\t.ident_start_idx = 6,\n-\t.ident_nums = 0,\n+\t.ident_start_idx = 5,\n+\t.ident_nums = 1,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO\n \t},\n@@ -3924,11 +3921,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n \t.direction = TF_DIR_RX,\n-\t.key_start_idx = 191,\n+\t.key_start_idx = 190,\n \t.blob_key_bit_size = 16,\n \t.key_bit_size = 16,\n \t.key_num_fields = 3,\n-\t.result_start_idx = 329,\n+\t.result_start_idx = 328,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -3939,13 +3936,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n \t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n \t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_1,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 194,\n+\t.key_start_idx = 193,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n \t.key_num_fields = 42,\n-\t.result_start_idx = 330,\n+\t.result_start_idx = 329,\n \t.result_bit_size = 38,\n \t.result_num_fields = 8,\n \t.encap_num_fields = 0,\n@@ -3958,11 +3955,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,\n \t.resource_type = TF_MEM_INTERNAL,\n \t.direction = TF_DIR_RX,\n-\t.key_start_idx = 236,\n+\t.key_start_idx = 235,\n \t.blob_key_bit_size = 200,\n \t.key_bit_size = 200,\n \t.key_num_fields = 11,\n-\t.result_start_idx = 338,\n+\t.result_start_idx = 337,\n \t.result_bit_size = 64,\n \t.result_num_fields = 9,\n \t.encap_num_fields = 0,\n@@ -3977,11 +3974,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n \t.direction = TF_DIR_RX,\n-\t.key_start_idx = 247,\n+\t.key_start_idx = 246,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n \t.key_num_fields = 1,\n-\t.result_start_idx = 347,\n+\t.result_start_idx = 346,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -3994,11 +3991,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_RX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 248,\n+\t.key_start_idx = 247,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n \t.key_num_fields = 13,\n-\t.result_start_idx = 348,\n+\t.result_start_idx = 347,\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.encap_num_fields = 0,\n@@ -4013,11 +4010,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n \t.direction = TF_DIR_RX,\n-\t.key_start_idx = 261,\n+\t.key_start_idx = 260,\n \t.blob_key_bit_size = 16,\n \t.key_bit_size = 16,\n \t.key_num_fields = 3,\n-\t.result_start_idx = 361,\n+\t.result_start_idx = 360,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4030,11 +4027,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_RX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 264,\n+\t.key_start_idx = 263,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n \t.key_num_fields = 42,\n-\t.result_start_idx = 362,\n+\t.result_start_idx = 361,\n \t.result_bit_size = 38,\n \t.result_num_fields = 8,\n \t.encap_num_fields = 0,\n@@ -4047,11 +4044,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,\n \t.resource_type = TF_MEM_INTERNAL,\n \t.direction = TF_DIR_RX,\n-\t.key_start_idx = 306,\n+\t.key_start_idx = 305,\n \t.blob_key_bit_size = 200,\n \t.key_bit_size = 200,\n \t.key_num_fields = 11,\n-\t.result_start_idx = 370,\n+\t.result_start_idx = 369,\n \t.result_bit_size = 64,\n \t.result_num_fields = 9,\n \t.encap_num_fields = 0,\n@@ -4066,11 +4063,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n \t.direction = TF_DIR_RX,\n-\t.key_start_idx = 317,\n+\t.key_start_idx = 316,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n \t.key_num_fields = 1,\n-\t.result_start_idx = 379,\n+\t.result_start_idx = 378,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4083,11 +4080,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_RX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 318,\n+\t.key_start_idx = 317,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n \t.key_num_fields = 13,\n-\t.result_start_idx = 380,\n+\t.result_start_idx = 379,\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.encap_num_fields = 0,\n@@ -4102,11 +4099,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n \t.direction = TF_DIR_RX,\n-\t.key_start_idx = 331,\n+\t.key_start_idx = 330,\n \t.blob_key_bit_size = 16,\n \t.key_bit_size = 16,\n \t.key_num_fields = 3,\n-\t.result_start_idx = 393,\n+\t.result_start_idx = 392,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4119,11 +4116,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_RX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 334,\n+\t.key_start_idx = 333,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n \t.key_num_fields = 42,\n-\t.result_start_idx = 394,\n+\t.result_start_idx = 393,\n \t.result_bit_size = 38,\n \t.result_num_fields = 8,\n \t.encap_num_fields = 0,\n@@ -4136,11 +4133,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,\n \t.resource_type = TF_MEM_INTERNAL,\n \t.direction = TF_DIR_RX,\n-\t.key_start_idx = 376,\n-\t.blob_key_bit_size = 392,\n-\t.key_bit_size = 392,\n+\t.key_start_idx = 375,\n+\t.blob_key_bit_size = 200,\n+\t.key_bit_size = 200,\n \t.key_num_fields = 11,\n-\t.result_start_idx = 402,\n+\t.result_start_idx = 401,\n \t.result_bit_size = 64,\n \t.result_num_fields = 9,\n \t.encap_num_fields = 0,\n@@ -4155,11 +4152,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n \t.direction = TF_DIR_RX,\n-\t.key_start_idx = 387,\n+\t.key_start_idx = 386,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n \t.key_num_fields = 1,\n-\t.result_start_idx = 411,\n+\t.result_start_idx = 410,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4172,11 +4169,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_RX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 388,\n+\t.key_start_idx = 387,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n \t.key_num_fields = 13,\n-\t.result_start_idx = 412,\n+\t.result_start_idx = 411,\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.encap_num_fields = 0,\n@@ -4191,11 +4188,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n \t.direction = TF_DIR_RX,\n-\t.key_start_idx = 401,\n+\t.key_start_idx = 400,\n \t.blob_key_bit_size = 16,\n \t.key_bit_size = 16,\n \t.key_num_fields = 3,\n-\t.result_start_idx = 425,\n+\t.result_start_idx = 424,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4208,11 +4205,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_RX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 404,\n+\t.key_start_idx = 403,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n \t.key_num_fields = 42,\n-\t.result_start_idx = 426,\n+\t.result_start_idx = 425,\n \t.result_bit_size = 38,\n \t.result_num_fields = 8,\n \t.encap_num_fields = 0,\n@@ -4225,11 +4222,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,\n \t.resource_type = TF_MEM_INTERNAL,\n \t.direction = TF_DIR_RX,\n-\t.key_start_idx = 446,\n+\t.key_start_idx = 445,\n \t.blob_key_bit_size = 392,\n \t.key_bit_size = 392,\n \t.key_num_fields = 11,\n-\t.result_start_idx = 434,\n+\t.result_start_idx = 433,\n \t.result_bit_size = 64,\n \t.result_num_fields = 9,\n \t.encap_num_fields = 0,\n@@ -4239,11 +4236,28 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES\n \t},\n \t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n+\t.direction = TF_DIR_RX,\n+\t.key_start_idx = 456,\n+\t.blob_key_bit_size = 8,\n+\t.key_bit_size = 8,\n+\t.key_num_fields = 1,\n+\t.result_start_idx = 442,\n+\t.result_bit_size = 10,\n+\t.result_num_fields = 1,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 13,\n+\t.ident_nums = 1\n+\t},\n+\t{\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,\n \t.direction = TF_DIR_RX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n \t.key_start_idx = 457,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -4252,8 +4266,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.encap_num_fields = 0,\n-\t.ident_start_idx = 13,\n-\t.ident_nums = 1,\n+\t.ident_start_idx = 14,\n+\t.ident_nums = 0,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO\n \t},\n@@ -4298,8 +4312,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_type = TF_MEM_INTERNAL,\n \t.direction = TF_DIR_RX,\n \t.key_start_idx = 515,\n-\t.blob_key_bit_size = 200,\n-\t.key_bit_size = 200,\n+\t.blob_key_bit_size = 392,\n+\t.key_bit_size = 392,\n \t.key_num_fields = 11,\n \t.result_start_idx = 465,\n \t.result_bit_size = 64,\n@@ -4514,8 +4528,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_type = TF_MEM_INTERNAL,\n \t.direction = TF_DIR_RX,\n \t.key_start_idx = 722,\n-\t.blob_key_bit_size = 200,\n-\t.key_bit_size = 200,\n+\t.blob_key_bit_size = 392,\n+\t.key_bit_size = 392,\n \t.key_num_fields = 11,\n \t.result_start_idx = 558,\n \t.result_bit_size = 64,\n@@ -4531,7 +4545,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,\n \t.direction = TF_DIR_RX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,\n \t.key_start_idx = 733,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -4586,8 +4600,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_type = TF_MEM_INTERNAL,\n \t.direction = TF_DIR_RX,\n \t.key_start_idx = 791,\n-\t.blob_key_bit_size = 200,\n-\t.key_bit_size = 200,\n+\t.blob_key_bit_size = 392,\n+\t.key_bit_size = 392,\n \t.key_num_fields = 11,\n \t.result_start_idx = 589,\n \t.result_bit_size = 64,\n@@ -4603,7 +4617,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,\n \t.direction = TF_DIR_RX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n \t.key_start_idx = 802,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -4671,38 +4685,21 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES\n \t},\n \t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n-\t.direction = TF_DIR_TX,\n-\t.key_start_idx = 871,\n-\t.blob_key_bit_size = 8,\n-\t.key_bit_size = 8,\n-\t.key_num_fields = 1,\n-\t.result_start_idx = 629,\n-\t.result_bit_size = 10,\n-\t.result_num_fields = 1,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 25,\n-\t.ident_nums = 1\n-\t},\n-\t{\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,\n-\t.direction = TF_DIR_TX,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,\n+\t.direction = TF_DIR_RX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 872,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,\n+\t.key_start_idx = 871,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n \t.key_num_fields = 13,\n-\t.result_start_idx = 630,\n+\t.result_start_idx = 629,\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.encap_num_fields = 0,\n-\t.ident_start_idx = 26,\n-\t.ident_nums = 0,\n+\t.ident_start_idx = 25,\n+\t.ident_nums = 1,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO\n \t},\n@@ -4711,12 +4708,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n-\t.direction = TF_DIR_TX,\n-\t.key_start_idx = 885,\n+\t.direction = TF_DIR_RX,\n+\t.key_start_idx = 884,\n \t.blob_key_bit_size = 16,\n \t.key_bit_size = 16,\n \t.key_num_fields = 3,\n-\t.result_start_idx = 643,\n+\t.result_start_idx = 642,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4726,14 +4723,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t{\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n \t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n-\t.direction = TF_DIR_TX,\n+\t.direction = TF_DIR_RX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 888,\n+\t.key_start_idx = 887,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n \t.key_num_fields = 42,\n-\t.result_start_idx = 644,\n+\t.result_start_idx = 643,\n \t.result_bit_size = 38,\n \t.result_num_fields = 8,\n \t.encap_num_fields = 0,\n@@ -4745,12 +4742,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t{\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,\n \t.resource_type = TF_MEM_INTERNAL,\n-\t.direction = TF_DIR_TX,\n-\t.key_start_idx = 930,\n+\t.direction = TF_DIR_RX,\n+\t.key_start_idx = 929,\n \t.blob_key_bit_size = 200,\n \t.key_bit_size = 200,\n \t.key_num_fields = 11,\n-\t.result_start_idx = 652,\n+\t.result_start_idx = 651,\n \t.result_bit_size = 64,\n \t.result_num_fields = 9,\n \t.encap_num_fields = 0,\n@@ -4765,11 +4762,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n \t.direction = TF_DIR_TX,\n-\t.key_start_idx = 941,\n+\t.key_start_idx = 940,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n \t.key_num_fields = 1,\n-\t.result_start_idx = 661,\n+\t.result_start_idx = 660,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4782,11 +4779,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_TX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 942,\n+\t.key_start_idx = 941,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n \t.key_num_fields = 13,\n-\t.result_start_idx = 662,\n+\t.result_start_idx = 661,\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.encap_num_fields = 0,\n@@ -4801,11 +4798,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n \t.direction = TF_DIR_TX,\n-\t.key_start_idx = 955,\n+\t.key_start_idx = 954,\n \t.blob_key_bit_size = 16,\n \t.key_bit_size = 16,\n \t.key_num_fields = 3,\n-\t.result_start_idx = 675,\n+\t.result_start_idx = 674,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4818,11 +4815,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_TX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 958,\n+\t.key_start_idx = 957,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n \t.key_num_fields = 42,\n-\t.result_start_idx = 676,\n+\t.result_start_idx = 675,\n \t.result_bit_size = 38,\n \t.result_num_fields = 8,\n \t.encap_num_fields = 0,\n@@ -4835,11 +4832,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,\n \t.resource_type = TF_MEM_INTERNAL,\n \t.direction = TF_DIR_TX,\n-\t.key_start_idx = 1000,\n+\t.key_start_idx = 999,\n \t.blob_key_bit_size = 200,\n \t.key_bit_size = 200,\n \t.key_num_fields = 11,\n-\t.result_start_idx = 684,\n+\t.result_start_idx = 683,\n \t.result_bit_size = 64,\n \t.result_num_fields = 9,\n \t.encap_num_fields = 0,\n@@ -4854,11 +4851,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n \t.direction = TF_DIR_TX,\n-\t.key_start_idx = 1011,\n+\t.key_start_idx = 1010,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n \t.key_num_fields = 1,\n-\t.result_start_idx = 693,\n+\t.result_start_idx = 692,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4871,11 +4868,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_TX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 1012,\n+\t.key_start_idx = 1011,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n \t.key_num_fields = 13,\n-\t.result_start_idx = 694,\n+\t.result_start_idx = 693,\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.encap_num_fields = 0,\n@@ -4890,11 +4887,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n \t.direction = TF_DIR_TX,\n-\t.key_start_idx = 1025,\n+\t.key_start_idx = 1024,\n \t.blob_key_bit_size = 16,\n \t.key_bit_size = 16,\n \t.key_num_fields = 3,\n-\t.result_start_idx = 707,\n+\t.result_start_idx = 706,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4907,11 +4904,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_TX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 1028,\n+\t.key_start_idx = 1027,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n \t.key_num_fields = 42,\n-\t.result_start_idx = 708,\n+\t.result_start_idx = 707,\n \t.result_bit_size = 38,\n \t.result_num_fields = 8,\n \t.encap_num_fields = 0,\n@@ -4924,11 +4921,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,\n \t.resource_type = TF_MEM_INTERNAL,\n \t.direction = TF_DIR_TX,\n-\t.key_start_idx = 1070,\n-\t.blob_key_bit_size = 392,\n-\t.key_bit_size = 392,\n+\t.key_start_idx = 1069,\n+\t.blob_key_bit_size = 200,\n+\t.key_bit_size = 200,\n \t.key_num_fields = 11,\n-\t.result_start_idx = 716,\n+\t.result_start_idx = 715,\n \t.result_bit_size = 64,\n \t.result_num_fields = 9,\n \t.encap_num_fields = 0,\n@@ -4943,11 +4940,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n \t.direction = TF_DIR_TX,\n-\t.key_start_idx = 1081,\n+\t.key_start_idx = 1080,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n \t.key_num_fields = 1,\n-\t.result_start_idx = 725,\n+\t.result_start_idx = 724,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4960,11 +4957,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_TX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 1082,\n+\t.key_start_idx = 1081,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n \t.key_num_fields = 13,\n-\t.result_start_idx = 726,\n+\t.result_start_idx = 725,\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.encap_num_fields = 0,\n@@ -4979,11 +4976,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n \t.direction = TF_DIR_TX,\n-\t.key_start_idx = 1095,\n+\t.key_start_idx = 1094,\n \t.blob_key_bit_size = 16,\n \t.key_bit_size = 16,\n \t.key_num_fields = 3,\n-\t.result_start_idx = 739,\n+\t.result_start_idx = 738,\n \t.result_bit_size = 10,\n \t.result_num_fields = 1,\n \t.encap_num_fields = 0,\n@@ -4996,11 +4993,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.direction = TF_DIR_TX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n \t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 1098,\n+\t.key_start_idx = 1097,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n \t.key_num_fields = 42,\n-\t.result_start_idx = 740,\n+\t.result_start_idx = 739,\n \t.result_bit_size = 38,\n \t.result_num_fields = 8,\n \t.encap_num_fields = 0,\n@@ -5013,11 +5010,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,\n \t.resource_type = TF_MEM_INTERNAL,\n \t.direction = TF_DIR_TX,\n-\t.key_start_idx = 1140,\n-\t.blob_key_bit_size = 200,\n-\t.key_bit_size = 200,\n+\t.key_start_idx = 1139,\n+\t.blob_key_bit_size = 392,\n+\t.key_bit_size = 392,\n \t.key_num_fields = 11,\n-\t.result_start_idx = 748,\n+\t.result_start_idx = 747,\n \t.result_bit_size = 64,\n \t.result_num_fields = 9,\n \t.encap_num_fields = 0,\n@@ -5027,11 +5024,28 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES\n \t},\n \t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n+\t.direction = TF_DIR_TX,\n+\t.key_start_idx = 1150,\n+\t.blob_key_bit_size = 8,\n+\t.key_bit_size = 8,\n+\t.key_num_fields = 1,\n+\t.result_start_idx = 756,\n+\t.result_bit_size = 10,\n+\t.result_num_fields = 1,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 33,\n+\t.ident_nums = 1\n+\t},\n+\t{\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,\n \t.direction = TF_DIR_TX,\n \t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n \t.key_start_idx = 1151,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -5040,8 +5054,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.encap_num_fields = 0,\n-\t.ident_start_idx = 33,\n-\t.ident_nums = 1,\n+\t.ident_start_idx = 34,\n+\t.ident_nums = 0,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO\n \t},\n@@ -5086,50 +5100,194 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.resource_type = TF_MEM_INTERNAL,\n \t.direction = TF_DIR_TX,\n \t.key_start_idx = 1209,\n-\t.blob_key_bit_size = 104,\n-\t.key_bit_size = 104,\n-\t.key_num_fields = 7,\n+\t.blob_key_bit_size = 392,\n+\t.key_bit_size = 392,\n+\t.key_num_fields = 11,\n \t.result_start_idx = 779,\n \t.result_bit_size = 64,\n \t.result_num_fields = 9,\n \t.encap_num_fields = 0,\n \t.ident_start_idx = 35,\n \t.ident_nums = 0,\n-\t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,\n+\t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n+\t},\n \t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff,\n-\t\tBNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,\n+\t.direction = TF_DIR_TX,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE,\n+\t.key_start_idx = 1220,\n+\t.blob_key_bit_size = 167,\n+\t.key_bit_size = 167,\n+\t.key_num_fields = 13,\n+\t.result_start_idx = 788,\n+\t.result_bit_size = 64,\n+\t.result_num_fields = 13,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 35,\n+\t.ident_nums = 1,\n+\t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO\n \t},\n \t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n+\t.direction = TF_DIR_TX,\n+\t.key_start_idx = 1233,\n+\t.blob_key_bit_size = 16,\n+\t.key_bit_size = 16,\n+\t.key_num_fields = 3,\n+\t.result_start_idx = 801,\n+\t.result_bit_size = 10,\n+\t.result_num_fields = 1,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 36,\n+\t.ident_nums = 1\n \t},\n \t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n+\t.direction = TF_DIR_TX,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 1236,\n+\t.blob_key_bit_size = 81,\n+\t.key_bit_size = 81,\n+\t.key_num_fields = 42,\n+\t.result_start_idx = 802,\n+\t.result_bit_size = 38,\n+\t.result_num_fields = 8,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 37,\n+\t.ident_nums = 0,\n+\t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO\n \t},\n \t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,\n+\t.resource_type = TF_MEM_INTERNAL,\n+\t.direction = TF_DIR_TX,\n+\t.key_start_idx = 1278,\n+\t.blob_key_bit_size = 104,\n+\t.key_bit_size = 104,\n+\t.key_num_fields = 7,\n+\t.result_start_idx = 810,\n+\t.result_bit_size = 64,\n+\t.result_num_fields = 9,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 37,\n+\t.ident_nums = 0,\n+\t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES\n \t},\n \t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,\n+\t.direction = TF_DIR_TX,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE,\n+\t.key_start_idx = 1285,\n+\t.blob_key_bit_size = 167,\n+\t.key_bit_size = 167,\n+\t.key_num_fields = 13,\n+\t.result_start_idx = 819,\n+\t.result_bit_size = 64,\n+\t.result_num_fields = 13,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 37,\n+\t.ident_nums = 1,\n+\t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n+\t.direction = TF_DIR_TX,\n+\t.key_start_idx = 1298,\n+\t.blob_key_bit_size = 16,\n+\t.key_bit_size = 16,\n+\t.key_num_fields = 3,\n+\t.result_start_idx = 832,\n+\t.result_bit_size = 10,\n+\t.result_num_fields = 1,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 38,\n+\t.ident_nums = 1\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n+\t.direction = TF_DIR_TX,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 1301,\n+\t.blob_key_bit_size = 81,\n+\t.key_bit_size = 81,\n+\t.key_num_fields = 42,\n+\t.result_start_idx = 833,\n+\t.result_bit_size = 38,\n+\t.result_num_fields = 8,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 39,\n+\t.ident_nums = 0,\n+\t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,\n+\t.resource_type = TF_MEM_INTERNAL,\n+\t.direction = TF_DIR_TX,\n+\t.key_start_idx = 1343,\n+\t.blob_key_bit_size = 104,\n+\t.key_bit_size = 104,\n+\t.key_num_fields = 7,\n+\t.result_start_idx = 841,\n+\t.result_bit_size = 64,\n+\t.result_num_fields = 9,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 39,\n+\t.ident_nums = 0,\n+\t.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES\n+\t}\n+};\n+\n+struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff,\n+\t\tBNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,\n \t.spec_operand = {\n@@ -5947,19 +6105,930 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n-\t.field_bit_size = 1,\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 9,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 32,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 32,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF6_IDX_O_ETH_SMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF6_IDX_O_ETH_SMAC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 24,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF7_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF7_IDX_OO_VLAN_VID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF7_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF7_IDX_OO_VLAN_VID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF7_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF7_IDX_O_ETH_DMAC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF7_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF7_IDX_O_ETH_DMAC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,\n+\t\tBNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV6,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 9,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 32,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 32,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF7_IDX_O_ETH_SMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF7_IDX_O_ETH_SMAC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 24,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_ISIP_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -6142,8 +7211,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -6188,39 +7257,58 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t{\n \t.field_bit_size = 16,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF8_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF8_IDX_O_UDP_DST_PORT & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 16,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF8_IDX_O_UDP_SRC_PORT & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 32,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 32,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n-\t},\n-\t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF6_IDX_O_ETH_SMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF6_IDX_O_ETH_SMAC & 0xff,\n+\t\t(BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n \t.field_bit_size = 24,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n@@ -6250,8 +7338,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -6274,14 +7362,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -6369,11 +7457,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -6643,8 +7727,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF7_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF7_IDX_O_UDP_DST_PORT & 0xff,\n+\t\t(BNXT_ULP_HF9_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF9_IDX_O_TCP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -6653,8 +7737,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF7_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF7_IDX_O_UDP_SRC_PORT & 0xff,\n+\t\t(BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF9_IDX_O_TCP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -6663,7 +7747,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n+\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -6672,8 +7756,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF7_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF7_IDX_O_IPV4_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -6682,8 +7766,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF7_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF7_IDX_O_IPV4_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -6722,8 +7806,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -6746,14 +7830,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -6841,7 +7925,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -6881,7 +7969,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV6,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -7111,8 +8203,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF8_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF8_IDX_O_TCP_DST_PORT & 0xff,\n+\t\t(BNXT_ULP_HF10_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF10_IDX_O_UDP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7121,8 +8213,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF8_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF8_IDX_O_TCP_SRC_PORT & 0xff,\n+\t\t(BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF10_IDX_O_UDP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7131,27 +8223,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n+\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 32,\n+\t.field_bit_size = 128,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 32,\n+\t.field_bit_size = 128,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7190,8 +8282,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7214,14 +8306,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7309,11 +8401,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -7587,8 +8675,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF9_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF9_IDX_O_UDP_DST_PORT & 0xff,\n+\t\t(BNXT_ULP_HF11_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF11_IDX_O_TCP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7597,8 +8685,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF9_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF9_IDX_O_UDP_SRC_PORT & 0xff,\n+\t\t(BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF11_IDX_O_TCP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7607,7 +8695,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n+\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7616,8 +8704,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF9_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF9_IDX_O_IPV6_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7626,8 +8714,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF9_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF9_IDX_O_IPV6_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7662,12 +8750,17 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7677,27 +8770,32 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n-\t},\n-\t{\n \t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7723,8 +8821,15 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,\n+\t\tBNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 2,\n@@ -7738,7 +8843,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -7760,8 +8867,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -7785,7 +8892,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -7825,11 +8936,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV6,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -8011,8 +9118,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8059,8 +9166,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF10_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF10_IDX_O_TCP_DST_PORT & 0xff,\n+\t\t(BNXT_ULP_HF12_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF12_IDX_O_UDP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8069,8 +9176,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF10_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF10_IDX_O_TCP_SRC_PORT & 0xff,\n+\t\t(BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF12_IDX_O_UDP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8079,27 +9186,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n+\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 128,\n+\t.field_bit_size = 32,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 128,\n+\t.field_bit_size = 32,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8137,14 +9244,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 12,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF11_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF11_IDX_OO_VLAN_VID & 0xff,\n+\t\t(BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF11_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF11_IDX_OO_VLAN_VID & 0xff,\n+\t\t(BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8157,14 +9264,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 48,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF11_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF11_IDX_O_ETH_DMAC & 0xff,\n+\t\t(BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF11_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF11_IDX_O_ETH_DMAC & 0xff,\n+\t\t(BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8172,14 +9279,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8276,11 +9383,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -8550,8 +9653,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF11_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF11_IDX_O_UDP_DST_PORT & 0xff,\n+\t\t(BNXT_ULP_HF13_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF13_IDX_O_TCP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8560,8 +9663,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF11_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF11_IDX_O_UDP_SRC_PORT & 0xff,\n+\t\t(BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF13_IDX_O_TCP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8570,7 +9673,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n+\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8579,8 +9682,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF11_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF11_IDX_O_IPV4_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8589,8 +9692,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF11_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF11_IDX_O_IPV4_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8628,14 +9731,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 12,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff,\n+\t\t(BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff,\n+\t\t(BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8648,14 +9751,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 48,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff,\n+\t\t(BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff,\n+\t\t(BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8663,14 +9766,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -8767,7 +9870,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -8807,7 +9914,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV6,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -9037,8 +10148,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF12_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF12_IDX_O_TCP_DST_PORT & 0xff,\n+\t\t(BNXT_ULP_HF14_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF14_IDX_O_UDP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9047,8 +10158,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF12_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF12_IDX_O_TCP_SRC_PORT & 0xff,\n+\t\t(BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF14_IDX_O_UDP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9057,27 +10168,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n+\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 32,\n+\t.field_bit_size = 128,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 32,\n+\t.field_bit_size = 128,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9115,14 +10226,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 12,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff,\n+\t\t(BNXT_ULP_HF15_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF15_IDX_OO_VLAN_VID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff,\n+\t\t(BNXT_ULP_HF15_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF15_IDX_OO_VLAN_VID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9135,14 +10246,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 48,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff,\n+\t\t(BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff,\n+\t\t(BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9150,14 +10261,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9254,11 +10365,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -9532,8 +10639,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF13_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF13_IDX_O_UDP_DST_PORT & 0xff,\n+\t\t(BNXT_ULP_HF15_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF15_IDX_O_TCP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9542,8 +10649,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF13_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF13_IDX_O_UDP_SRC_PORT & 0xff,\n+\t\t(BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF15_IDX_O_TCP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9552,27 +10659,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n+\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 32,\n+\t.field_bit_size = 128,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF13_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF13_IDX_O_IPV6_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 32,\n+\t.field_bit_size = 128,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF13_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF13_IDX_O_IPV6_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9608,18 +10715,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.mask_operand = {\n-\t\t(BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 12,\n@@ -9630,14 +10727,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 48,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff,\n+\t\t(BNXT_ULP_HF16_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF16_IDX_O_ETH_DMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff,\n+\t\t(BNXT_ULP_HF16_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF16_IDX_O_ETH_DMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9645,14 +10742,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9678,15 +10775,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,\n-\t\tBNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 2,\n@@ -9695,7 +10785,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -9724,8 +10816,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -9749,7 +10841,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -9789,11 +10885,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV6,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -9820,7 +10912,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -9862,12 +10956,16 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -9875,7 +10973,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -9884,12 +10986,20 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -9897,7 +11007,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -9916,12 +11030,16 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -9929,7 +11047,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -9938,17 +11060,23 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -9956,7 +11084,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -9975,8 +11107,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -10023,8 +11155,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF14_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF14_IDX_O_TCP_DST_PORT & 0xff,\n+\t\t(BNXT_ULP_HF16_IDX_I_UDP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF16_IDX_I_UDP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -10033,27 +11165,28 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF14_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF14_IDX_O_TCP_SRC_PORT & 0xff,\n+\t\t(BNXT_ULP_HF16_IDX_I_UDP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF16_IDX_I_UDP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n+\t\t(BNXT_ULP_HF16_IDX_I_IPV4_PROTO_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF16_IDX_I_IPV4_PROTO_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 32,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF16_IDX_I_IPV4_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF16_IDX_I_IPV4_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -10062,8 +11195,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF16_IDX_I_IPV4_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF16_IDX_I_IPV4_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -10075,7 +11208,12 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t{\n \t.field_bit_size = 24,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF16_IDX_T_VXLAN_VNI >> 8) & 0xff,\n+\t\tBNXT_ULP_HF16_IDX_T_VXLAN_VNI & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 10,\n@@ -10109,16 +11247,13 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.mask_operand = {\n-\t\t(BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff,\n+\t\t(BNXT_ULP_HF17_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF17_IDX_O_ETH_DMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -10126,14 +11261,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -10144,8 +11279,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 12,\n@@ -10163,9 +11308,16 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,\n+\t\tBNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 4,\n@@ -10176,9 +11328,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -10200,8 +11350,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -10222,32 +11372,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -10266,28 +11402,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -10296,42 +11422,28 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 3,\n@@ -10444,9 +11556,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -10491,8 +11601,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -10537,52 +11647,36 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t{\n \t.field_bit_size = 16,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF15_IDX_I_UDP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF15_IDX_I_UDP_DST_PORT & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 16,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF15_IDX_I_UDP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF15_IDX_I_UDP_SRC_PORT & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF15_IDX_I_IPV4_PROTO_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF15_IDX_I_IPV4_PROTO_ID & 0xff,\n+\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 32,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF15_IDX_I_IPV4_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF15_IDX_I_IPV4_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF17_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF17_IDX_O_IPV4_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 32,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF15_IDX_I_IPV4_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF15_IDX_I_IPV4_SRC_ADDR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 48,\n@@ -10592,12 +11686,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t{\n \t.field_bit_size = 24,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF15_IDX_T_VXLAN_VNI >> 8) & 0xff,\n-\t\tBNXT_ULP_HF15_IDX_T_VXLAN_VNI & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 10,\n@@ -10620,6 +11709,16 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n \t.field_bit_size = 12,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n@@ -10631,28 +11730,21 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF16_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF16_IDX_O_ETH_DMAC & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -10668,18 +11760,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.mask_operand = {\n-\t\t(BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 48,\n@@ -10693,22 +11775,19 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,\n-\t\tBNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 4,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 2,\n@@ -10734,8 +11813,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -10756,18 +11835,32 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -10786,18 +11879,28 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -10816,26 +11919,6 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n@@ -10855,43 +11938,49 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_VALID_YES,\n+\t\tBNXT_ULP_SYM_L2_HDR_VALID_YES,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n \t.field_bit_size = 1,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -10910,28 +11999,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -10945,28 +12024,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -10985,8 +12054,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11031,12 +12100,22 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t{\n \t.field_bit_size = 16,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF18_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF18_IDX_O_UDP_DST_PORT & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 16,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF18_IDX_O_UDP_SRC_PORT & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 8,\n@@ -11052,15 +12131,20 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 32,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 48,\n@@ -11097,8 +12181,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11121,14 +12205,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11222,11 +12306,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -11486,8 +12566,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF17_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF17_IDX_O_UDP_DST_PORT & 0xff,\n+\t\t(BNXT_ULP_HF19_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF19_IDX_O_TCP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11496,8 +12576,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF17_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF17_IDX_O_UDP_SRC_PORT & 0xff,\n+\t\t(BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF19_IDX_O_TCP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11506,7 +12586,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n+\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11515,8 +12595,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF17_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF17_IDX_O_IPV4_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11525,8 +12605,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF17_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF17_IDX_O_IPV4_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11565,8 +12645,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11589,14 +12669,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11690,7 +12770,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -11730,7 +12814,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV6,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -11950,8 +13038,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF18_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF18_IDX_O_TCP_DST_PORT & 0xff,\n+\t\t(BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11960,8 +13048,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF18_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF18_IDX_O_TCP_SRC_PORT & 0xff,\n+\t\t(BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -11970,27 +13058,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n+\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 32,\n+\t.field_bit_size = 128,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 32,\n+\t.field_bit_size = 128,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -12029,8 +13117,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -12053,14 +13141,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -12154,11 +13242,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -12422,8 +13506,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF19_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF19_IDX_O_UDP_DST_PORT & 0xff,\n+\t\t(BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -12432,28 +13516,27 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF19_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF19_IDX_O_UDP_SRC_PORT & 0xff,\n+\t\t(BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF19_IDX_O_IPV6_PROTO_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF19_IDX_O_IPV6_PROTO_ID & 0xff,\n+\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 128,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF19_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF19_IDX_O_IPV6_DST_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -12462,8 +13545,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF19_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF19_IDX_O_IPV6_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -12498,12 +13581,17 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF22_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF22_IDX_OO_VLAN_VID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF22_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF22_IDX_OO_VLAN_VID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -12513,27 +13601,32 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n-\t},\n-\t{\n \t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF22_IDX_O_ETH_SMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF22_IDX_O_ETH_SMAC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF22_IDX_O_ETH_SMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF22_IDX_O_ETH_SMAC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -12559,8 +13652,15 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,\n+\t\tBNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 2,\n@@ -12580,8 +13680,12 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -12602,8 +13706,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -12624,28 +13728,18 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -12667,11 +13761,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV6,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -12703,7 +13793,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -12748,7 +13840,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -12768,7 +13862,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -12798,7 +13894,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -12823,7 +13921,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -12843,8 +13943,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -12877,7 +13977,7 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 3,\n+\t.field_bit_size = 7,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n@@ -12889,63 +13989,24 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t{\n \t.field_bit_size = 16,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF20_IDX_O_TCP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF20_IDX_O_TCP_DST_PORT & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF20_IDX_O_TCP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF20_IDX_O_TCP_SRC_PORT & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_TCP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n-\t.field_bit_size = 32,\n+\t.field_bit_size = 12,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n-\t.field_bit_size = 32,\n+\t.field_bit_size = 48,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR & 0xff,\n+\t\t(BNXT_ULP_HF22_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF22_IDX_O_ETH_DMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n-\t},\n-\t{\n-\t.field_bit_size = 24,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n-\t},\n-\t{\n \t.field_bit_size = 10,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n@@ -12969,14 +14030,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 12,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF21_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF21_IDX_OO_VLAN_VID & 0xff,\n+\t\t(BNXT_ULP_HF23_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF23_IDX_OO_VLAN_VID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF21_IDX_OO_VLAN_VID >> 8) & 0xff,\n-\t\tBNXT_ULP_HF21_IDX_OO_VLAN_VID & 0xff,\n+\t\t(BNXT_ULP_HF23_IDX_OO_VLAN_VID >> 8) & 0xff,\n+\t\tBNXT_ULP_HF23_IDX_OO_VLAN_VID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -12989,14 +14050,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 48,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF21_IDX_O_ETH_SMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF21_IDX_O_ETH_SMAC & 0xff,\n+\t\t(BNXT_ULP_HF23_IDX_O_ETH_SMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF23_IDX_O_ETH_SMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF21_IDX_O_ETH_SMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF21_IDX_O_ETH_SMAC & 0xff,\n+\t\t(BNXT_ULP_HF23_IDX_O_ETH_SMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF23_IDX_O_ETH_SMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -13004,14 +14065,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.mask_operand = {\n-\t\t(BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,\n+\t\t(BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -13138,21 +14199,21 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n+\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_ISIP_YES,\n+\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV6,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n-\t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n-\t},\n-\t{\n \t.field_bit_size = 1,\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n@@ -13390,8 +14451,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,\n \t.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_HF21_IDX_O_ETH_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_HF21_IDX_O_ETH_DMAC & 0xff,\n+\t\t(BNXT_ULP_HF23_IDX_O_ETH_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_HF23_IDX_O_ETH_DMAC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -13966,7 +15027,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n-\t.field_bit_size = 80,\n+\t.field_bit_size = 16,\n \t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n@@ -14738,16 +15799,192 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n-\t.field_bit_size = 1,\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,\n+\t\tBNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 6,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\t(0x0005 >> 8) & 0xff,\n+\t\t0x0005 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 33,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 9,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\t(0x00c5 >> 8) & 0xff,\n+\t\t0x00c5 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 11,\n \t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n \t},\n \t{\n \t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -14755,7 +15992,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 10,\n@@ -16141,7 +17380,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t{\n \t.field_bit_size = 5,\n \t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n@@ -16192,8 +17431,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t.field_bit_size = 9,\n \t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.result_operand = {\n-\t\t(0x00c5 >> 8) & 0xff,\n-\t\t0x00c5 & 0xff,\n+\t\t(0x0185 >> 8) & 0xff,\n+\t\t0x0185 & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -16319,7 +17558,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t{\n \t.field_bit_size = 5,\n \t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n@@ -16370,8 +17609,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t.field_bit_size = 9,\n \t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.result_operand = {\n-\t\t(0x00c5 >> 8) & 0xff,\n-\t\t0x00c5 & 0xff,\n+\t\t(0x0185 >> 8) & 0xff,\n+\t\t0x0185 & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -17483,7 +18722,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t{\n \t.field_bit_size = 5,\n \t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n@@ -17534,8 +18773,201 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t.field_bit_size = 9,\n \t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n \t.result_operand = {\n-\t\t(0x00c5 >> 8) & 0xff,\n-\t\t0x00c5 & 0xff,\n+\t\t(0x0185 >> 8) & 0xff,\n+\t\t0x0185 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 11,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff,\n+\t\tBNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.result_operand_true = {\n+\t\t(BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff,\n+\t\tBNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.result_operand_false = {\n+\t\t(BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff,\n+\t\tBNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 6,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\t(0x0003 >> 8) & 0xff,\n+\t\t0x0003 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x0c, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 33,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 9,\n+\t.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\t(0x0061 >> 8) & 0xff,\n+\t\t0x0061 & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -17999,5 +19431,33 @@ struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {\n \t.regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,\n \t.ident_bit_size = 10,\n \t.ident_bit_pos = 0\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,\n+\t.ident_bit_size = 10,\n+\t.ident_bit_pos = 0\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_EM_PROF,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,\n+\t.ident_bit_size = 10,\n+\t.ident_bit_pos = 0\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,\n+\t.ident_bit_size = 10,\n+\t.ident_bit_pos = 0\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_EM_PROF,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,\n+\t.ident_bit_size = 10,\n+\t.ident_bit_pos = 0\n \t}\n };\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h\nindex f5c43a9f8..51758868a 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h\n@@ -18,7 +18,7 @@\n #define BNXT_ULP_CLASS_HID_SHFTL 31\n #define BNXT_ULP_CLASS_HID_MASK 2047\n #define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 4096\n-#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 86\n+#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 83\n #define BNXT_ULP_ACT_HID_LOW_PRIME 7919\n #define BNXT_ULP_ACT_HID_HIGH_PRIME 4721\n #define BNXT_ULP_ACT_HID_SHFTR 23\n@@ -218,7 +218,8 @@ enum bnxt_ulp_mapper_opc {\n \tBNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST = 9,\n \tBNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST = 10,\n \tBNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF = 11,\n-\tBNXT_ULP_MAPPER_OPC_LAST = 12\n+\tBNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST = 12,\n+\tBNXT_ULP_MAPPER_OPC_LAST = 13\n };\n \n enum bnxt_ulp_mark_db_opcode {\n@@ -632,36 +633,36 @@ enum bnxt_ulp_act_prop_idx {\n enum bnxt_ulp_class_hid {\n \tBNXT_ULP_CLASS_HID_0138 = 0x0138,\n \tBNXT_ULP_CLASS_HID_03f0 = 0x03f0,\n-\tBNXT_ULP_CLASS_HID_0134 = 0x0134,\n-\tBNXT_ULP_CLASS_HID_03fc = 0x03fc,\n \tBNXT_ULP_CLASS_HID_0139 = 0x0139,\n \tBNXT_ULP_CLASS_HID_03f1 = 0x03f1,\n \tBNXT_ULP_CLASS_HID_068b = 0x068b,\n \tBNXT_ULP_CLASS_HID_0143 = 0x0143,\n-\tBNXT_ULP_CLASS_HID_0135 = 0x0135,\n-\tBNXT_ULP_CLASS_HID_03fd = 0x03fd,\n-\tBNXT_ULP_CLASS_HID_0687 = 0x0687,\n-\tBNXT_ULP_CLASS_HID_014f = 0x014f,\n \tBNXT_ULP_CLASS_HID_0118 = 0x0118,\n \tBNXT_ULP_CLASS_HID_03d0 = 0x03d0,\n-\tBNXT_ULP_CLASS_HID_0114 = 0x0114,\n-\tBNXT_ULP_CLASS_HID_03dc = 0x03dc,\n \tBNXT_ULP_CLASS_HID_0119 = 0x0119,\n \tBNXT_ULP_CLASS_HID_03d1 = 0x03d1,\n \tBNXT_ULP_CLASS_HID_06ab = 0x06ab,\n \tBNXT_ULP_CLASS_HID_0163 = 0x0163,\n-\tBNXT_ULP_CLASS_HID_0115 = 0x0115,\n-\tBNXT_ULP_CLASS_HID_03dd = 0x03dd,\n-\tBNXT_ULP_CLASS_HID_06a7 = 0x06a7,\n-\tBNXT_ULP_CLASS_HID_016f = 0x016f,\n \tBNXT_ULP_CLASS_HID_0128 = 0x0128,\n \tBNXT_ULP_CLASS_HID_03e0 = 0x03e0,\n-\tBNXT_ULP_CLASS_HID_0124 = 0x0124,\n-\tBNXT_ULP_CLASS_HID_03ec = 0x03ec,\n \tBNXT_ULP_CLASS_HID_0129 = 0x0129,\n \tBNXT_ULP_CLASS_HID_03e1 = 0x03e1,\n \tBNXT_ULP_CLASS_HID_069b = 0x069b,\n \tBNXT_ULP_CLASS_HID_0153 = 0x0153,\n+\tBNXT_ULP_CLASS_HID_0134 = 0x0134,\n+\tBNXT_ULP_CLASS_HID_03fc = 0x03fc,\n+\tBNXT_ULP_CLASS_HID_0135 = 0x0135,\n+\tBNXT_ULP_CLASS_HID_03fd = 0x03fd,\n+\tBNXT_ULP_CLASS_HID_0687 = 0x0687,\n+\tBNXT_ULP_CLASS_HID_014f = 0x014f,\n+\tBNXT_ULP_CLASS_HID_0114 = 0x0114,\n+\tBNXT_ULP_CLASS_HID_03dc = 0x03dc,\n+\tBNXT_ULP_CLASS_HID_0115 = 0x0115,\n+\tBNXT_ULP_CLASS_HID_03dd = 0x03dd,\n+\tBNXT_ULP_CLASS_HID_06a7 = 0x06a7,\n+\tBNXT_ULP_CLASS_HID_016f = 0x016f,\n+\tBNXT_ULP_CLASS_HID_0124 = 0x0124,\n+\tBNXT_ULP_CLASS_HID_03ec = 0x03ec,\n \tBNXT_ULP_CLASS_HID_0125 = 0x0125,\n \tBNXT_ULP_CLASS_HID_03ed = 0x03ed,\n \tBNXT_ULP_CLASS_HID_0697 = 0x0697,\n@@ -774,36 +775,36 @@ enum bnxt_ulp_class_hid {\n \tBNXT_ULP_CLASS_HID_077f = 0x077f,\n \tBNXT_ULP_CLASS_HID_01e1 = 0x01e1,\n \tBNXT_ULP_CLASS_HID_0329 = 0x0329,\n-\tBNXT_ULP_CLASS_HID_01dd = 0x01dd,\n-\tBNXT_ULP_CLASS_HID_0315 = 0x0315,\n \tBNXT_ULP_CLASS_HID_01c1 = 0x01c1,\n \tBNXT_ULP_CLASS_HID_0309 = 0x0309,\n-\tBNXT_ULP_CLASS_HID_003d = 0x003d,\n-\tBNXT_ULP_CLASS_HID_02f5 = 0x02f5,\n \tBNXT_ULP_CLASS_HID_01d1 = 0x01d1,\n \tBNXT_ULP_CLASS_HID_0319 = 0x0319,\n-\tBNXT_ULP_CLASS_HID_01cd = 0x01cd,\n-\tBNXT_ULP_CLASS_HID_0305 = 0x0305,\n \tBNXT_ULP_CLASS_HID_01e2 = 0x01e2,\n \tBNXT_ULP_CLASS_HID_032a = 0x032a,\n \tBNXT_ULP_CLASS_HID_0650 = 0x0650,\n \tBNXT_ULP_CLASS_HID_0198 = 0x0198,\n-\tBNXT_ULP_CLASS_HID_01de = 0x01de,\n-\tBNXT_ULP_CLASS_HID_0316 = 0x0316,\n-\tBNXT_ULP_CLASS_HID_066c = 0x066c,\n-\tBNXT_ULP_CLASS_HID_01a4 = 0x01a4,\n \tBNXT_ULP_CLASS_HID_01c2 = 0x01c2,\n \tBNXT_ULP_CLASS_HID_030a = 0x030a,\n \tBNXT_ULP_CLASS_HID_0670 = 0x0670,\n \tBNXT_ULP_CLASS_HID_01b8 = 0x01b8,\n-\tBNXT_ULP_CLASS_HID_003e = 0x003e,\n-\tBNXT_ULP_CLASS_HID_02f6 = 0x02f6,\n-\tBNXT_ULP_CLASS_HID_078c = 0x078c,\n-\tBNXT_ULP_CLASS_HID_0044 = 0x0044,\n \tBNXT_ULP_CLASS_HID_01d2 = 0x01d2,\n \tBNXT_ULP_CLASS_HID_031a = 0x031a,\n \tBNXT_ULP_CLASS_HID_0660 = 0x0660,\n \tBNXT_ULP_CLASS_HID_01a8 = 0x01a8,\n+\tBNXT_ULP_CLASS_HID_01dd = 0x01dd,\n+\tBNXT_ULP_CLASS_HID_0315 = 0x0315,\n+\tBNXT_ULP_CLASS_HID_003d = 0x003d,\n+\tBNXT_ULP_CLASS_HID_02f5 = 0x02f5,\n+\tBNXT_ULP_CLASS_HID_01cd = 0x01cd,\n+\tBNXT_ULP_CLASS_HID_0305 = 0x0305,\n+\tBNXT_ULP_CLASS_HID_01de = 0x01de,\n+\tBNXT_ULP_CLASS_HID_0316 = 0x0316,\n+\tBNXT_ULP_CLASS_HID_066c = 0x066c,\n+\tBNXT_ULP_CLASS_HID_01a4 = 0x01a4,\n+\tBNXT_ULP_CLASS_HID_003e = 0x003e,\n+\tBNXT_ULP_CLASS_HID_02f6 = 0x02f6,\n+\tBNXT_ULP_CLASS_HID_078c = 0x078c,\n+\tBNXT_ULP_CLASS_HID_0044 = 0x0044,\n \tBNXT_ULP_CLASS_HID_01ce = 0x01ce,\n \tBNXT_ULP_CLASS_HID_0306 = 0x0306,\n \tBNXT_ULP_CLASS_HID_067c = 0x067c,\n@@ -838,6 +839,7 @@ enum bnxt_ulp_act_hid {\n \tBNXT_ULP_ACT_HID_0020 = 0x0020,\n \tBNXT_ULP_ACT_HID_0901 = 0x0901,\n \tBNXT_ULP_ACT_HID_0121 = 0x0121,\n+\tBNXT_ULP_ACT_HID_0004 = 0x0004,\n \tBNXT_ULP_ACT_HID_0006 = 0x0006,\n \tBNXT_ULP_ACT_HID_0804 = 0x0804,\n \tBNXT_ULP_ACT_HID_0105 = 0x0105,\n@@ -881,19 +883,15 @@ enum bnxt_ulp_act_hid {\n \tBNXT_ULP_ACT_HID_040d = 0x040d,\n \tBNXT_ULP_ACT_HID_040f = 0x040f,\n \tBNXT_ULP_ACT_HID_0413 = 0x0413,\n-\tBNXT_ULP_ACT_HID_0c0d = 0x0c0d,\n \tBNXT_ULP_ACT_HID_0567 = 0x0567,\n \tBNXT_ULP_ACT_HID_0a49 = 0x0a49,\n \tBNXT_ULP_ACT_HID_050e = 0x050e,\n-\tBNXT_ULP_ACT_HID_0d0e = 0x0d0e,\n \tBNXT_ULP_ACT_HID_0668 = 0x0668,\n \tBNXT_ULP_ACT_HID_0b4a = 0x0b4a,\n \tBNXT_ULP_ACT_HID_0411 = 0x0411,\n \tBNXT_ULP_ACT_HID_056b = 0x056b,\n \tBNXT_ULP_ACT_HID_0a4d = 0x0a4d,\n-\tBNXT_ULP_ACT_HID_0c11 = 0x0c11,\n \tBNXT_ULP_ACT_HID_0512 = 0x0512,\n-\tBNXT_ULP_ACT_HID_0d12 = 0x0d12,\n \tBNXT_ULP_ACT_HID_066c = 0x066c,\n \tBNXT_ULP_ACT_HID_0b4e = 0x0b4e\n };\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h\nindex a5bd3f646..79fcdeee8 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h\n@@ -60,20 +60,14 @@ enum bnxt_ulp_hf7 {\n \tBNXT_ULP_HF7_IDX_OI_VLAN_CFI_PRI         = 7,\n \tBNXT_ULP_HF7_IDX_OI_VLAN_VID             = 8,\n \tBNXT_ULP_HF7_IDX_OI_VLAN_TYPE            = 9,\n-\tBNXT_ULP_HF7_IDX_O_IPV4_VER              = 10,\n-\tBNXT_ULP_HF7_IDX_O_IPV4_TOS              = 11,\n-\tBNXT_ULP_HF7_IDX_O_IPV4_LEN              = 12,\n-\tBNXT_ULP_HF7_IDX_O_IPV4_FRAG_ID          = 13,\n-\tBNXT_ULP_HF7_IDX_O_IPV4_FRAG_OFF         = 14,\n-\tBNXT_ULP_HF7_IDX_O_IPV4_TTL              = 15,\n-\tBNXT_ULP_HF7_IDX_O_IPV4_PROTO_ID         = 16,\n-\tBNXT_ULP_HF7_IDX_O_IPV4_CSUM             = 17,\n-\tBNXT_ULP_HF7_IDX_O_IPV4_SRC_ADDR         = 18,\n-\tBNXT_ULP_HF7_IDX_O_IPV4_DST_ADDR         = 19,\n-\tBNXT_ULP_HF7_IDX_O_UDP_SRC_PORT          = 20,\n-\tBNXT_ULP_HF7_IDX_O_UDP_DST_PORT          = 21,\n-\tBNXT_ULP_HF7_IDX_O_UDP_LENGTH            = 22,\n-\tBNXT_ULP_HF7_IDX_O_UDP_CSUM              = 23\n+\tBNXT_ULP_HF7_IDX_O_IPV6_VER              = 10,\n+\tBNXT_ULP_HF7_IDX_O_IPV6_TC               = 11,\n+\tBNXT_ULP_HF7_IDX_O_IPV6_FLOW_LABEL       = 12,\n+\tBNXT_ULP_HF7_IDX_O_IPV6_PAYLOAD_LEN      = 13,\n+\tBNXT_ULP_HF7_IDX_O_IPV6_PROTO_ID         = 14,\n+\tBNXT_ULP_HF7_IDX_O_IPV6_TTL              = 15,\n+\tBNXT_ULP_HF7_IDX_O_IPV6_SRC_ADDR         = 16,\n+\tBNXT_ULP_HF7_IDX_O_IPV6_DST_ADDR         = 17\n };\n \n enum bnxt_ulp_hf8 {\n@@ -97,15 +91,10 @@ enum bnxt_ulp_hf8 {\n \tBNXT_ULP_HF8_IDX_O_IPV4_CSUM             = 17,\n \tBNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR         = 18,\n \tBNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR         = 19,\n-\tBNXT_ULP_HF8_IDX_O_TCP_SRC_PORT          = 20,\n-\tBNXT_ULP_HF8_IDX_O_TCP_DST_PORT          = 21,\n-\tBNXT_ULP_HF8_IDX_O_TCP_SENT_SEQ          = 22,\n-\tBNXT_ULP_HF8_IDX_O_TCP_RECV_ACK          = 23,\n-\tBNXT_ULP_HF8_IDX_O_TCP_DATA_OFF          = 24,\n-\tBNXT_ULP_HF8_IDX_O_TCP_TCP_FLAGS         = 25,\n-\tBNXT_ULP_HF8_IDX_O_TCP_RX_WIN            = 26,\n-\tBNXT_ULP_HF8_IDX_O_TCP_CSUM              = 27,\n-\tBNXT_ULP_HF8_IDX_O_TCP_URP               = 28\n+\tBNXT_ULP_HF8_IDX_O_UDP_SRC_PORT          = 20,\n+\tBNXT_ULP_HF8_IDX_O_UDP_DST_PORT          = 21,\n+\tBNXT_ULP_HF8_IDX_O_UDP_LENGTH            = 22,\n+\tBNXT_ULP_HF8_IDX_O_UDP_CSUM              = 23\n };\n \n enum bnxt_ulp_hf9 {\n@@ -119,18 +108,25 @@ enum bnxt_ulp_hf9 {\n \tBNXT_ULP_HF9_IDX_OI_VLAN_CFI_PRI         = 7,\n \tBNXT_ULP_HF9_IDX_OI_VLAN_VID             = 8,\n \tBNXT_ULP_HF9_IDX_OI_VLAN_TYPE            = 9,\n-\tBNXT_ULP_HF9_IDX_O_IPV6_VER              = 10,\n-\tBNXT_ULP_HF9_IDX_O_IPV6_TC               = 11,\n-\tBNXT_ULP_HF9_IDX_O_IPV6_FLOW_LABEL       = 12,\n-\tBNXT_ULP_HF9_IDX_O_IPV6_PAYLOAD_LEN      = 13,\n-\tBNXT_ULP_HF9_IDX_O_IPV6_PROTO_ID         = 14,\n-\tBNXT_ULP_HF9_IDX_O_IPV6_TTL              = 15,\n-\tBNXT_ULP_HF9_IDX_O_IPV6_SRC_ADDR         = 16,\n-\tBNXT_ULP_HF9_IDX_O_IPV6_DST_ADDR         = 17,\n-\tBNXT_ULP_HF9_IDX_O_UDP_SRC_PORT          = 18,\n-\tBNXT_ULP_HF9_IDX_O_UDP_DST_PORT          = 19,\n-\tBNXT_ULP_HF9_IDX_O_UDP_LENGTH            = 20,\n-\tBNXT_ULP_HF9_IDX_O_UDP_CSUM              = 21\n+\tBNXT_ULP_HF9_IDX_O_IPV4_VER              = 10,\n+\tBNXT_ULP_HF9_IDX_O_IPV4_TOS              = 11,\n+\tBNXT_ULP_HF9_IDX_O_IPV4_LEN              = 12,\n+\tBNXT_ULP_HF9_IDX_O_IPV4_FRAG_ID          = 13,\n+\tBNXT_ULP_HF9_IDX_O_IPV4_FRAG_OFF         = 14,\n+\tBNXT_ULP_HF9_IDX_O_IPV4_TTL              = 15,\n+\tBNXT_ULP_HF9_IDX_O_IPV4_PROTO_ID         = 16,\n+\tBNXT_ULP_HF9_IDX_O_IPV4_CSUM             = 17,\n+\tBNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR         = 18,\n+\tBNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR         = 19,\n+\tBNXT_ULP_HF9_IDX_O_TCP_SRC_PORT          = 20,\n+\tBNXT_ULP_HF9_IDX_O_TCP_DST_PORT          = 21,\n+\tBNXT_ULP_HF9_IDX_O_TCP_SENT_SEQ          = 22,\n+\tBNXT_ULP_HF9_IDX_O_TCP_RECV_ACK          = 23,\n+\tBNXT_ULP_HF9_IDX_O_TCP_DATA_OFF          = 24,\n+\tBNXT_ULP_HF9_IDX_O_TCP_TCP_FLAGS         = 25,\n+\tBNXT_ULP_HF9_IDX_O_TCP_RX_WIN            = 26,\n+\tBNXT_ULP_HF9_IDX_O_TCP_CSUM              = 27,\n+\tBNXT_ULP_HF9_IDX_O_TCP_URP               = 28\n };\n \n enum bnxt_ulp_hf10 {\n@@ -152,15 +148,10 @@ enum bnxt_ulp_hf10 {\n \tBNXT_ULP_HF10_IDX_O_IPV6_TTL             = 15,\n \tBNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR        = 16,\n \tBNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR        = 17,\n-\tBNXT_ULP_HF10_IDX_O_TCP_SRC_PORT         = 18,\n-\tBNXT_ULP_HF10_IDX_O_TCP_DST_PORT         = 19,\n-\tBNXT_ULP_HF10_IDX_O_TCP_SENT_SEQ         = 20,\n-\tBNXT_ULP_HF10_IDX_O_TCP_RECV_ACK         = 21,\n-\tBNXT_ULP_HF10_IDX_O_TCP_DATA_OFF         = 22,\n-\tBNXT_ULP_HF10_IDX_O_TCP_TCP_FLAGS        = 23,\n-\tBNXT_ULP_HF10_IDX_O_TCP_RX_WIN           = 24,\n-\tBNXT_ULP_HF10_IDX_O_TCP_CSUM             = 25,\n-\tBNXT_ULP_HF10_IDX_O_TCP_URP              = 26\n+\tBNXT_ULP_HF10_IDX_O_UDP_SRC_PORT         = 18,\n+\tBNXT_ULP_HF10_IDX_O_UDP_DST_PORT         = 19,\n+\tBNXT_ULP_HF10_IDX_O_UDP_LENGTH           = 20,\n+\tBNXT_ULP_HF10_IDX_O_UDP_CSUM             = 21\n };\n \n enum bnxt_ulp_hf11 {\n@@ -174,20 +165,23 @@ enum bnxt_ulp_hf11 {\n \tBNXT_ULP_HF11_IDX_OI_VLAN_CFI_PRI        = 7,\n \tBNXT_ULP_HF11_IDX_OI_VLAN_VID            = 8,\n \tBNXT_ULP_HF11_IDX_OI_VLAN_TYPE           = 9,\n-\tBNXT_ULP_HF11_IDX_O_IPV4_VER             = 10,\n-\tBNXT_ULP_HF11_IDX_O_IPV4_TOS             = 11,\n-\tBNXT_ULP_HF11_IDX_O_IPV4_LEN             = 12,\n-\tBNXT_ULP_HF11_IDX_O_IPV4_FRAG_ID         = 13,\n-\tBNXT_ULP_HF11_IDX_O_IPV4_FRAG_OFF        = 14,\n-\tBNXT_ULP_HF11_IDX_O_IPV4_TTL             = 15,\n-\tBNXT_ULP_HF11_IDX_O_IPV4_PROTO_ID        = 16,\n-\tBNXT_ULP_HF11_IDX_O_IPV4_CSUM            = 17,\n-\tBNXT_ULP_HF11_IDX_O_IPV4_SRC_ADDR        = 18,\n-\tBNXT_ULP_HF11_IDX_O_IPV4_DST_ADDR        = 19,\n-\tBNXT_ULP_HF11_IDX_O_UDP_SRC_PORT         = 20,\n-\tBNXT_ULP_HF11_IDX_O_UDP_DST_PORT         = 21,\n-\tBNXT_ULP_HF11_IDX_O_UDP_LENGTH           = 22,\n-\tBNXT_ULP_HF11_IDX_O_UDP_CSUM             = 23\n+\tBNXT_ULP_HF11_IDX_O_IPV6_VER             = 10,\n+\tBNXT_ULP_HF11_IDX_O_IPV6_TC              = 11,\n+\tBNXT_ULP_HF11_IDX_O_IPV6_FLOW_LABEL      = 12,\n+\tBNXT_ULP_HF11_IDX_O_IPV6_PAYLOAD_LEN     = 13,\n+\tBNXT_ULP_HF11_IDX_O_IPV6_PROTO_ID        = 14,\n+\tBNXT_ULP_HF11_IDX_O_IPV6_TTL             = 15,\n+\tBNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR        = 16,\n+\tBNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR        = 17,\n+\tBNXT_ULP_HF11_IDX_O_TCP_SRC_PORT         = 18,\n+\tBNXT_ULP_HF11_IDX_O_TCP_DST_PORT         = 19,\n+\tBNXT_ULP_HF11_IDX_O_TCP_SENT_SEQ         = 20,\n+\tBNXT_ULP_HF11_IDX_O_TCP_RECV_ACK         = 21,\n+\tBNXT_ULP_HF11_IDX_O_TCP_DATA_OFF         = 22,\n+\tBNXT_ULP_HF11_IDX_O_TCP_TCP_FLAGS        = 23,\n+\tBNXT_ULP_HF11_IDX_O_TCP_RX_WIN           = 24,\n+\tBNXT_ULP_HF11_IDX_O_TCP_CSUM             = 25,\n+\tBNXT_ULP_HF11_IDX_O_TCP_URP              = 26\n };\n \n enum bnxt_ulp_hf12 {\n@@ -211,15 +205,10 @@ enum bnxt_ulp_hf12 {\n \tBNXT_ULP_HF12_IDX_O_IPV4_CSUM            = 17,\n \tBNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR        = 18,\n \tBNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR        = 19,\n-\tBNXT_ULP_HF12_IDX_O_TCP_SRC_PORT         = 20,\n-\tBNXT_ULP_HF12_IDX_O_TCP_DST_PORT         = 21,\n-\tBNXT_ULP_HF12_IDX_O_TCP_SENT_SEQ         = 22,\n-\tBNXT_ULP_HF12_IDX_O_TCP_RECV_ACK         = 23,\n-\tBNXT_ULP_HF12_IDX_O_TCP_DATA_OFF         = 24,\n-\tBNXT_ULP_HF12_IDX_O_TCP_TCP_FLAGS        = 25,\n-\tBNXT_ULP_HF12_IDX_O_TCP_RX_WIN           = 26,\n-\tBNXT_ULP_HF12_IDX_O_TCP_CSUM             = 27,\n-\tBNXT_ULP_HF12_IDX_O_TCP_URP              = 28\n+\tBNXT_ULP_HF12_IDX_O_UDP_SRC_PORT         = 20,\n+\tBNXT_ULP_HF12_IDX_O_UDP_DST_PORT         = 21,\n+\tBNXT_ULP_HF12_IDX_O_UDP_LENGTH           = 22,\n+\tBNXT_ULP_HF12_IDX_O_UDP_CSUM             = 23\n };\n \n enum bnxt_ulp_hf13 {\n@@ -233,18 +222,25 @@ enum bnxt_ulp_hf13 {\n \tBNXT_ULP_HF13_IDX_OI_VLAN_CFI_PRI        = 7,\n \tBNXT_ULP_HF13_IDX_OI_VLAN_VID            = 8,\n \tBNXT_ULP_HF13_IDX_OI_VLAN_TYPE           = 9,\n-\tBNXT_ULP_HF13_IDX_O_IPV6_VER             = 10,\n-\tBNXT_ULP_HF13_IDX_O_IPV6_TC              = 11,\n-\tBNXT_ULP_HF13_IDX_O_IPV6_FLOW_LABEL      = 12,\n-\tBNXT_ULP_HF13_IDX_O_IPV6_PAYLOAD_LEN     = 13,\n-\tBNXT_ULP_HF13_IDX_O_IPV6_PROTO_ID        = 14,\n-\tBNXT_ULP_HF13_IDX_O_IPV6_TTL             = 15,\n-\tBNXT_ULP_HF13_IDX_O_IPV6_SRC_ADDR        = 16,\n-\tBNXT_ULP_HF13_IDX_O_IPV6_DST_ADDR        = 17,\n-\tBNXT_ULP_HF13_IDX_O_UDP_SRC_PORT         = 18,\n-\tBNXT_ULP_HF13_IDX_O_UDP_DST_PORT         = 19,\n-\tBNXT_ULP_HF13_IDX_O_UDP_LENGTH           = 20,\n-\tBNXT_ULP_HF13_IDX_O_UDP_CSUM             = 21\n+\tBNXT_ULP_HF13_IDX_O_IPV4_VER             = 10,\n+\tBNXT_ULP_HF13_IDX_O_IPV4_TOS             = 11,\n+\tBNXT_ULP_HF13_IDX_O_IPV4_LEN             = 12,\n+\tBNXT_ULP_HF13_IDX_O_IPV4_FRAG_ID         = 13,\n+\tBNXT_ULP_HF13_IDX_O_IPV4_FRAG_OFF        = 14,\n+\tBNXT_ULP_HF13_IDX_O_IPV4_TTL             = 15,\n+\tBNXT_ULP_HF13_IDX_O_IPV4_PROTO_ID        = 16,\n+\tBNXT_ULP_HF13_IDX_O_IPV4_CSUM            = 17,\n+\tBNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR        = 18,\n+\tBNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR        = 19,\n+\tBNXT_ULP_HF13_IDX_O_TCP_SRC_PORT         = 20,\n+\tBNXT_ULP_HF13_IDX_O_TCP_DST_PORT         = 21,\n+\tBNXT_ULP_HF13_IDX_O_TCP_SENT_SEQ         = 22,\n+\tBNXT_ULP_HF13_IDX_O_TCP_RECV_ACK         = 23,\n+\tBNXT_ULP_HF13_IDX_O_TCP_DATA_OFF         = 24,\n+\tBNXT_ULP_HF13_IDX_O_TCP_TCP_FLAGS        = 25,\n+\tBNXT_ULP_HF13_IDX_O_TCP_RX_WIN           = 26,\n+\tBNXT_ULP_HF13_IDX_O_TCP_CSUM             = 27,\n+\tBNXT_ULP_HF13_IDX_O_TCP_URP              = 28\n };\n \n enum bnxt_ulp_hf14 {\n@@ -266,15 +262,10 @@ enum bnxt_ulp_hf14 {\n \tBNXT_ULP_HF14_IDX_O_IPV6_TTL             = 15,\n \tBNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR        = 16,\n \tBNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR        = 17,\n-\tBNXT_ULP_HF14_IDX_O_TCP_SRC_PORT         = 18,\n-\tBNXT_ULP_HF14_IDX_O_TCP_DST_PORT         = 19,\n-\tBNXT_ULP_HF14_IDX_O_TCP_SENT_SEQ         = 20,\n-\tBNXT_ULP_HF14_IDX_O_TCP_RECV_ACK         = 21,\n-\tBNXT_ULP_HF14_IDX_O_TCP_DATA_OFF         = 22,\n-\tBNXT_ULP_HF14_IDX_O_TCP_TCP_FLAGS        = 23,\n-\tBNXT_ULP_HF14_IDX_O_TCP_RX_WIN           = 24,\n-\tBNXT_ULP_HF14_IDX_O_TCP_CSUM             = 25,\n-\tBNXT_ULP_HF14_IDX_O_TCP_URP              = 26\n+\tBNXT_ULP_HF14_IDX_O_UDP_SRC_PORT         = 18,\n+\tBNXT_ULP_HF14_IDX_O_UDP_DST_PORT         = 19,\n+\tBNXT_ULP_HF14_IDX_O_UDP_LENGTH           = 20,\n+\tBNXT_ULP_HF14_IDX_O_UDP_CSUM             = 21\n };\n \n enum bnxt_ulp_hf15 {\n@@ -288,47 +279,23 @@ enum bnxt_ulp_hf15 {\n \tBNXT_ULP_HF15_IDX_OI_VLAN_CFI_PRI        = 7,\n \tBNXT_ULP_HF15_IDX_OI_VLAN_VID            = 8,\n \tBNXT_ULP_HF15_IDX_OI_VLAN_TYPE           = 9,\n-\tBNXT_ULP_HF15_IDX_O_IPV4_VER             = 10,\n-\tBNXT_ULP_HF15_IDX_O_IPV4_TOS             = 11,\n-\tBNXT_ULP_HF15_IDX_O_IPV4_LEN             = 12,\n-\tBNXT_ULP_HF15_IDX_O_IPV4_FRAG_ID         = 13,\n-\tBNXT_ULP_HF15_IDX_O_IPV4_FRAG_OFF        = 14,\n-\tBNXT_ULP_HF15_IDX_O_IPV4_TTL             = 15,\n-\tBNXT_ULP_HF15_IDX_O_IPV4_PROTO_ID        = 16,\n-\tBNXT_ULP_HF15_IDX_O_IPV4_CSUM            = 17,\n-\tBNXT_ULP_HF15_IDX_O_IPV4_SRC_ADDR        = 18,\n-\tBNXT_ULP_HF15_IDX_O_IPV4_DST_ADDR        = 19,\n-\tBNXT_ULP_HF15_IDX_O_UDP_SRC_PORT         = 20,\n-\tBNXT_ULP_HF15_IDX_O_UDP_DST_PORT         = 21,\n-\tBNXT_ULP_HF15_IDX_O_UDP_LENGTH           = 22,\n-\tBNXT_ULP_HF15_IDX_O_UDP_CSUM             = 23,\n-\tBNXT_ULP_HF15_IDX_T_VXLAN_FLAGS          = 24,\n-\tBNXT_ULP_HF15_IDX_T_VXLAN_RSVD0          = 25,\n-\tBNXT_ULP_HF15_IDX_T_VXLAN_VNI            = 26,\n-\tBNXT_ULP_HF15_IDX_T_VXLAN_RSVD1          = 27,\n-\tBNXT_ULP_HF15_IDX_I_ETH_DMAC             = 28,\n-\tBNXT_ULP_HF15_IDX_I_ETH_SMAC             = 29,\n-\tBNXT_ULP_HF15_IDX_I_ETH_TYPE             = 30,\n-\tBNXT_ULP_HF15_IDX_IO_VLAN_CFI_PRI        = 31,\n-\tBNXT_ULP_HF15_IDX_IO_VLAN_VID            = 32,\n-\tBNXT_ULP_HF15_IDX_IO_VLAN_TYPE           = 33,\n-\tBNXT_ULP_HF15_IDX_II_VLAN_CFI_PRI        = 34,\n-\tBNXT_ULP_HF15_IDX_II_VLAN_VID            = 35,\n-\tBNXT_ULP_HF15_IDX_II_VLAN_TYPE           = 36,\n-\tBNXT_ULP_HF15_IDX_I_IPV4_VER             = 37,\n-\tBNXT_ULP_HF15_IDX_I_IPV4_TOS             = 38,\n-\tBNXT_ULP_HF15_IDX_I_IPV4_LEN             = 39,\n-\tBNXT_ULP_HF15_IDX_I_IPV4_FRAG_ID         = 40,\n-\tBNXT_ULP_HF15_IDX_I_IPV4_FRAG_OFF        = 41,\n-\tBNXT_ULP_HF15_IDX_I_IPV4_TTL             = 42,\n-\tBNXT_ULP_HF15_IDX_I_IPV4_PROTO_ID        = 43,\n-\tBNXT_ULP_HF15_IDX_I_IPV4_CSUM            = 44,\n-\tBNXT_ULP_HF15_IDX_I_IPV4_SRC_ADDR        = 45,\n-\tBNXT_ULP_HF15_IDX_I_IPV4_DST_ADDR        = 46,\n-\tBNXT_ULP_HF15_IDX_I_UDP_SRC_PORT         = 47,\n-\tBNXT_ULP_HF15_IDX_I_UDP_DST_PORT         = 48,\n-\tBNXT_ULP_HF15_IDX_I_UDP_LENGTH           = 49,\n-\tBNXT_ULP_HF15_IDX_I_UDP_CSUM             = 50\n+\tBNXT_ULP_HF15_IDX_O_IPV6_VER             = 10,\n+\tBNXT_ULP_HF15_IDX_O_IPV6_TC              = 11,\n+\tBNXT_ULP_HF15_IDX_O_IPV6_FLOW_LABEL      = 12,\n+\tBNXT_ULP_HF15_IDX_O_IPV6_PAYLOAD_LEN     = 13,\n+\tBNXT_ULP_HF15_IDX_O_IPV6_PROTO_ID        = 14,\n+\tBNXT_ULP_HF15_IDX_O_IPV6_TTL             = 15,\n+\tBNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR        = 16,\n+\tBNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR        = 17,\n+\tBNXT_ULP_HF15_IDX_O_TCP_SRC_PORT         = 18,\n+\tBNXT_ULP_HF15_IDX_O_TCP_DST_PORT         = 19,\n+\tBNXT_ULP_HF15_IDX_O_TCP_SENT_SEQ         = 20,\n+\tBNXT_ULP_HF15_IDX_O_TCP_RECV_ACK         = 21,\n+\tBNXT_ULP_HF15_IDX_O_TCP_DATA_OFF         = 22,\n+\tBNXT_ULP_HF15_IDX_O_TCP_TCP_FLAGS        = 23,\n+\tBNXT_ULP_HF15_IDX_O_TCP_RX_WIN           = 24,\n+\tBNXT_ULP_HF15_IDX_O_TCP_CSUM             = 25,\n+\tBNXT_ULP_HF15_IDX_O_TCP_URP              = 26\n };\n \n enum bnxt_ulp_hf16 {\n@@ -359,7 +326,30 @@ enum bnxt_ulp_hf16 {\n \tBNXT_ULP_HF16_IDX_T_VXLAN_FLAGS          = 24,\n \tBNXT_ULP_HF16_IDX_T_VXLAN_RSVD0          = 25,\n \tBNXT_ULP_HF16_IDX_T_VXLAN_VNI            = 26,\n-\tBNXT_ULP_HF16_IDX_T_VXLAN_RSVD1          = 27\n+\tBNXT_ULP_HF16_IDX_T_VXLAN_RSVD1          = 27,\n+\tBNXT_ULP_HF16_IDX_I_ETH_DMAC             = 28,\n+\tBNXT_ULP_HF16_IDX_I_ETH_SMAC             = 29,\n+\tBNXT_ULP_HF16_IDX_I_ETH_TYPE             = 30,\n+\tBNXT_ULP_HF16_IDX_IO_VLAN_CFI_PRI        = 31,\n+\tBNXT_ULP_HF16_IDX_IO_VLAN_VID            = 32,\n+\tBNXT_ULP_HF16_IDX_IO_VLAN_TYPE           = 33,\n+\tBNXT_ULP_HF16_IDX_II_VLAN_CFI_PRI        = 34,\n+\tBNXT_ULP_HF16_IDX_II_VLAN_VID            = 35,\n+\tBNXT_ULP_HF16_IDX_II_VLAN_TYPE           = 36,\n+\tBNXT_ULP_HF16_IDX_I_IPV4_VER             = 37,\n+\tBNXT_ULP_HF16_IDX_I_IPV4_TOS             = 38,\n+\tBNXT_ULP_HF16_IDX_I_IPV4_LEN             = 39,\n+\tBNXT_ULP_HF16_IDX_I_IPV4_FRAG_ID         = 40,\n+\tBNXT_ULP_HF16_IDX_I_IPV4_FRAG_OFF        = 41,\n+\tBNXT_ULP_HF16_IDX_I_IPV4_TTL             = 42,\n+\tBNXT_ULP_HF16_IDX_I_IPV4_PROTO_ID        = 43,\n+\tBNXT_ULP_HF16_IDX_I_IPV4_CSUM            = 44,\n+\tBNXT_ULP_HF16_IDX_I_IPV4_SRC_ADDR        = 45,\n+\tBNXT_ULP_HF16_IDX_I_IPV4_DST_ADDR        = 46,\n+\tBNXT_ULP_HF16_IDX_I_UDP_SRC_PORT         = 47,\n+\tBNXT_ULP_HF16_IDX_I_UDP_DST_PORT         = 48,\n+\tBNXT_ULP_HF16_IDX_I_UDP_LENGTH           = 49,\n+\tBNXT_ULP_HF16_IDX_I_UDP_CSUM             = 50\n };\n \n enum bnxt_ulp_hf17 {\n@@ -386,7 +376,11 @@ enum bnxt_ulp_hf17 {\n \tBNXT_ULP_HF17_IDX_O_UDP_SRC_PORT         = 20,\n \tBNXT_ULP_HF17_IDX_O_UDP_DST_PORT         = 21,\n \tBNXT_ULP_HF17_IDX_O_UDP_LENGTH           = 22,\n-\tBNXT_ULP_HF17_IDX_O_UDP_CSUM             = 23\n+\tBNXT_ULP_HF17_IDX_O_UDP_CSUM             = 23,\n+\tBNXT_ULP_HF17_IDX_T_VXLAN_FLAGS          = 24,\n+\tBNXT_ULP_HF17_IDX_T_VXLAN_RSVD0          = 25,\n+\tBNXT_ULP_HF17_IDX_T_VXLAN_VNI            = 26,\n+\tBNXT_ULP_HF17_IDX_T_VXLAN_RSVD1          = 27\n };\n \n enum bnxt_ulp_hf18 {\n@@ -410,15 +404,10 @@ enum bnxt_ulp_hf18 {\n \tBNXT_ULP_HF18_IDX_O_IPV4_CSUM            = 17,\n \tBNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR        = 18,\n \tBNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR        = 19,\n-\tBNXT_ULP_HF18_IDX_O_TCP_SRC_PORT         = 20,\n-\tBNXT_ULP_HF18_IDX_O_TCP_DST_PORT         = 21,\n-\tBNXT_ULP_HF18_IDX_O_TCP_SENT_SEQ         = 22,\n-\tBNXT_ULP_HF18_IDX_O_TCP_RECV_ACK         = 23,\n-\tBNXT_ULP_HF18_IDX_O_TCP_DATA_OFF         = 24,\n-\tBNXT_ULP_HF18_IDX_O_TCP_TCP_FLAGS        = 25,\n-\tBNXT_ULP_HF18_IDX_O_TCP_RX_WIN           = 26,\n-\tBNXT_ULP_HF18_IDX_O_TCP_CSUM             = 27,\n-\tBNXT_ULP_HF18_IDX_O_TCP_URP              = 28\n+\tBNXT_ULP_HF18_IDX_O_UDP_SRC_PORT         = 20,\n+\tBNXT_ULP_HF18_IDX_O_UDP_DST_PORT         = 21,\n+\tBNXT_ULP_HF18_IDX_O_UDP_LENGTH           = 22,\n+\tBNXT_ULP_HF18_IDX_O_UDP_CSUM             = 23\n };\n \n enum bnxt_ulp_hf19 {\n@@ -432,18 +421,25 @@ enum bnxt_ulp_hf19 {\n \tBNXT_ULP_HF19_IDX_OI_VLAN_CFI_PRI        = 7,\n \tBNXT_ULP_HF19_IDX_OI_VLAN_VID            = 8,\n \tBNXT_ULP_HF19_IDX_OI_VLAN_TYPE           = 9,\n-\tBNXT_ULP_HF19_IDX_O_IPV6_VER             = 10,\n-\tBNXT_ULP_HF19_IDX_O_IPV6_TC              = 11,\n-\tBNXT_ULP_HF19_IDX_O_IPV6_FLOW_LABEL      = 12,\n-\tBNXT_ULP_HF19_IDX_O_IPV6_PAYLOAD_LEN     = 13,\n-\tBNXT_ULP_HF19_IDX_O_IPV6_PROTO_ID        = 14,\n-\tBNXT_ULP_HF19_IDX_O_IPV6_TTL             = 15,\n-\tBNXT_ULP_HF19_IDX_O_IPV6_SRC_ADDR        = 16,\n-\tBNXT_ULP_HF19_IDX_O_IPV6_DST_ADDR        = 17,\n-\tBNXT_ULP_HF19_IDX_O_UDP_SRC_PORT         = 18,\n-\tBNXT_ULP_HF19_IDX_O_UDP_DST_PORT         = 19,\n-\tBNXT_ULP_HF19_IDX_O_UDP_LENGTH           = 20,\n-\tBNXT_ULP_HF19_IDX_O_UDP_CSUM             = 21\n+\tBNXT_ULP_HF19_IDX_O_IPV4_VER             = 10,\n+\tBNXT_ULP_HF19_IDX_O_IPV4_TOS             = 11,\n+\tBNXT_ULP_HF19_IDX_O_IPV4_LEN             = 12,\n+\tBNXT_ULP_HF19_IDX_O_IPV4_FRAG_ID         = 13,\n+\tBNXT_ULP_HF19_IDX_O_IPV4_FRAG_OFF        = 14,\n+\tBNXT_ULP_HF19_IDX_O_IPV4_TTL             = 15,\n+\tBNXT_ULP_HF19_IDX_O_IPV4_PROTO_ID        = 16,\n+\tBNXT_ULP_HF19_IDX_O_IPV4_CSUM            = 17,\n+\tBNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR        = 18,\n+\tBNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR        = 19,\n+\tBNXT_ULP_HF19_IDX_O_TCP_SRC_PORT         = 20,\n+\tBNXT_ULP_HF19_IDX_O_TCP_DST_PORT         = 21,\n+\tBNXT_ULP_HF19_IDX_O_TCP_SENT_SEQ         = 22,\n+\tBNXT_ULP_HF19_IDX_O_TCP_RECV_ACK         = 23,\n+\tBNXT_ULP_HF19_IDX_O_TCP_DATA_OFF         = 24,\n+\tBNXT_ULP_HF19_IDX_O_TCP_TCP_FLAGS        = 25,\n+\tBNXT_ULP_HF19_IDX_O_TCP_RX_WIN           = 26,\n+\tBNXT_ULP_HF19_IDX_O_TCP_CSUM             = 27,\n+\tBNXT_ULP_HF19_IDX_O_TCP_URP              = 28\n };\n \n enum bnxt_ulp_hf20 {\n@@ -465,15 +461,10 @@ enum bnxt_ulp_hf20 {\n \tBNXT_ULP_HF20_IDX_O_IPV6_TTL             = 15,\n \tBNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR        = 16,\n \tBNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR        = 17,\n-\tBNXT_ULP_HF20_IDX_O_TCP_SRC_PORT         = 18,\n-\tBNXT_ULP_HF20_IDX_O_TCP_DST_PORT         = 19,\n-\tBNXT_ULP_HF20_IDX_O_TCP_SENT_SEQ         = 20,\n-\tBNXT_ULP_HF20_IDX_O_TCP_RECV_ACK         = 21,\n-\tBNXT_ULP_HF20_IDX_O_TCP_DATA_OFF         = 22,\n-\tBNXT_ULP_HF20_IDX_O_TCP_TCP_FLAGS        = 23,\n-\tBNXT_ULP_HF20_IDX_O_TCP_RX_WIN           = 24,\n-\tBNXT_ULP_HF20_IDX_O_TCP_CSUM             = 25,\n-\tBNXT_ULP_HF20_IDX_O_TCP_URP              = 26\n+\tBNXT_ULP_HF20_IDX_O_UDP_SRC_PORT         = 18,\n+\tBNXT_ULP_HF20_IDX_O_UDP_DST_PORT         = 19,\n+\tBNXT_ULP_HF20_IDX_O_UDP_LENGTH           = 20,\n+\tBNXT_ULP_HF20_IDX_O_UDP_CSUM             = 21\n };\n \n enum bnxt_ulp_hf21 {\n@@ -487,16 +478,67 @@ enum bnxt_ulp_hf21 {\n \tBNXT_ULP_HF21_IDX_OI_VLAN_CFI_PRI        = 7,\n \tBNXT_ULP_HF21_IDX_OI_VLAN_VID            = 8,\n \tBNXT_ULP_HF21_IDX_OI_VLAN_TYPE           = 9,\n-\tBNXT_ULP_HF21_IDX_O_IPV4_VER             = 10,\n-\tBNXT_ULP_HF21_IDX_O_IPV4_TOS             = 11,\n-\tBNXT_ULP_HF21_IDX_O_IPV4_LEN             = 12,\n-\tBNXT_ULP_HF21_IDX_O_IPV4_FRAG_ID         = 13,\n-\tBNXT_ULP_HF21_IDX_O_IPV4_FRAG_OFF        = 14,\n-\tBNXT_ULP_HF21_IDX_O_IPV4_TTL             = 15,\n-\tBNXT_ULP_HF21_IDX_O_IPV4_PROTO_ID        = 16,\n-\tBNXT_ULP_HF21_IDX_O_IPV4_CSUM            = 17,\n-\tBNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR        = 18,\n-\tBNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR        = 19\n+\tBNXT_ULP_HF21_IDX_O_IPV6_VER             = 10,\n+\tBNXT_ULP_HF21_IDX_O_IPV6_TC              = 11,\n+\tBNXT_ULP_HF21_IDX_O_IPV6_FLOW_LABEL      = 12,\n+\tBNXT_ULP_HF21_IDX_O_IPV6_PAYLOAD_LEN     = 13,\n+\tBNXT_ULP_HF21_IDX_O_IPV6_PROTO_ID        = 14,\n+\tBNXT_ULP_HF21_IDX_O_IPV6_TTL             = 15,\n+\tBNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR        = 16,\n+\tBNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR        = 17,\n+\tBNXT_ULP_HF21_IDX_O_TCP_SRC_PORT         = 18,\n+\tBNXT_ULP_HF21_IDX_O_TCP_DST_PORT         = 19,\n+\tBNXT_ULP_HF21_IDX_O_TCP_SENT_SEQ         = 20,\n+\tBNXT_ULP_HF21_IDX_O_TCP_RECV_ACK         = 21,\n+\tBNXT_ULP_HF21_IDX_O_TCP_DATA_OFF         = 22,\n+\tBNXT_ULP_HF21_IDX_O_TCP_TCP_FLAGS        = 23,\n+\tBNXT_ULP_HF21_IDX_O_TCP_RX_WIN           = 24,\n+\tBNXT_ULP_HF21_IDX_O_TCP_CSUM             = 25,\n+\tBNXT_ULP_HF21_IDX_O_TCP_URP              = 26\n+};\n+\n+enum bnxt_ulp_hf22 {\n+\tBNXT_ULP_HF22_IDX_SVIF_INDEX             = 0,\n+\tBNXT_ULP_HF22_IDX_O_ETH_DMAC             = 1,\n+\tBNXT_ULP_HF22_IDX_O_ETH_SMAC             = 2,\n+\tBNXT_ULP_HF22_IDX_O_ETH_TYPE             = 3,\n+\tBNXT_ULP_HF22_IDX_OO_VLAN_CFI_PRI        = 4,\n+\tBNXT_ULP_HF22_IDX_OO_VLAN_VID            = 5,\n+\tBNXT_ULP_HF22_IDX_OO_VLAN_TYPE           = 6,\n+\tBNXT_ULP_HF22_IDX_OI_VLAN_CFI_PRI        = 7,\n+\tBNXT_ULP_HF22_IDX_OI_VLAN_VID            = 8,\n+\tBNXT_ULP_HF22_IDX_OI_VLAN_TYPE           = 9,\n+\tBNXT_ULP_HF22_IDX_O_IPV4_VER             = 10,\n+\tBNXT_ULP_HF22_IDX_O_IPV4_TOS             = 11,\n+\tBNXT_ULP_HF22_IDX_O_IPV4_LEN             = 12,\n+\tBNXT_ULP_HF22_IDX_O_IPV4_FRAG_ID         = 13,\n+\tBNXT_ULP_HF22_IDX_O_IPV4_FRAG_OFF        = 14,\n+\tBNXT_ULP_HF22_IDX_O_IPV4_TTL             = 15,\n+\tBNXT_ULP_HF22_IDX_O_IPV4_PROTO_ID        = 16,\n+\tBNXT_ULP_HF22_IDX_O_IPV4_CSUM            = 17,\n+\tBNXT_ULP_HF22_IDX_O_IPV4_SRC_ADDR        = 18,\n+\tBNXT_ULP_HF22_IDX_O_IPV4_DST_ADDR        = 19\n+};\n+\n+enum bnxt_ulp_hf23 {\n+\tBNXT_ULP_HF23_IDX_SVIF_INDEX             = 0,\n+\tBNXT_ULP_HF23_IDX_O_ETH_DMAC             = 1,\n+\tBNXT_ULP_HF23_IDX_O_ETH_SMAC             = 2,\n+\tBNXT_ULP_HF23_IDX_O_ETH_TYPE             = 3,\n+\tBNXT_ULP_HF23_IDX_OO_VLAN_CFI_PRI        = 4,\n+\tBNXT_ULP_HF23_IDX_OO_VLAN_VID            = 5,\n+\tBNXT_ULP_HF23_IDX_OO_VLAN_TYPE           = 6,\n+\tBNXT_ULP_HF23_IDX_OI_VLAN_CFI_PRI        = 7,\n+\tBNXT_ULP_HF23_IDX_OI_VLAN_VID            = 8,\n+\tBNXT_ULP_HF23_IDX_OI_VLAN_TYPE           = 9,\n+\tBNXT_ULP_HF23_IDX_O_IPV6_VER             = 10,\n+\tBNXT_ULP_HF23_IDX_O_IPV6_TC              = 11,\n+\tBNXT_ULP_HF23_IDX_O_IPV6_FLOW_LABEL      = 12,\n+\tBNXT_ULP_HF23_IDX_O_IPV6_PAYLOAD_LEN     = 13,\n+\tBNXT_ULP_HF23_IDX_O_IPV6_PROTO_ID        = 14,\n+\tBNXT_ULP_HF23_IDX_O_IPV6_TTL             = 15,\n+\tBNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR        = 16,\n+\tBNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR        = 17\n };\n \n enum bnxt_ulp_hf_bitmask1 {\n@@ -553,20 +595,14 @@ enum bnxt_ulp_hf_bitmask7 {\n \tBNXT_ULP_HF7_BITMASK_OI_VLAN_CFI_PRI     = 0x0100000000000000,\n \tBNXT_ULP_HF7_BITMASK_OI_VLAN_VID         = 0x0080000000000000,\n \tBNXT_ULP_HF7_BITMASK_OI_VLAN_TYPE        = 0x0040000000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_IPV4_VER          = 0x0020000000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_IPV4_TOS          = 0x0010000000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_IPV4_LEN          = 0x0008000000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_IPV4_FRAG_ID      = 0x0004000000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_IPV4_FRAG_OFF     = 0x0002000000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_IPV4_TTL          = 0x0001000000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_IPV4_PROTO_ID     = 0x0000800000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_IPV4_CSUM         = 0x0000400000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR     = 0x0000200000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR     = 0x0000100000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT      = 0x0000080000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT      = 0x0000040000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_UDP_LENGTH        = 0x0000020000000000,\n-\tBNXT_ULP_HF7_BITMASK_O_UDP_CSUM          = 0x0000010000000000\n+\tBNXT_ULP_HF7_BITMASK_O_IPV6_VER          = 0x0020000000000000,\n+\tBNXT_ULP_HF7_BITMASK_O_IPV6_TC           = 0x0010000000000000,\n+\tBNXT_ULP_HF7_BITMASK_O_IPV6_FLOW_LABEL   = 0x0008000000000000,\n+\tBNXT_ULP_HF7_BITMASK_O_IPV6_PAYLOAD_LEN  = 0x0004000000000000,\n+\tBNXT_ULP_HF7_BITMASK_O_IPV6_PROTO_ID     = 0x0002000000000000,\n+\tBNXT_ULP_HF7_BITMASK_O_IPV6_TTL          = 0x0001000000000000,\n+\tBNXT_ULP_HF7_BITMASK_O_IPV6_SRC_ADDR     = 0x0000800000000000,\n+\tBNXT_ULP_HF7_BITMASK_O_IPV6_DST_ADDR     = 0x0000400000000000\n };\n \n enum bnxt_ulp_hf_bitmask8 {\n@@ -590,15 +626,10 @@ enum bnxt_ulp_hf_bitmask8 {\n \tBNXT_ULP_HF8_BITMASK_O_IPV4_CSUM         = 0x0000400000000000,\n \tBNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR     = 0x0000200000000000,\n \tBNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR     = 0x0000100000000000,\n-\tBNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT      = 0x0000080000000000,\n-\tBNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT      = 0x0000040000000000,\n-\tBNXT_ULP_HF8_BITMASK_O_TCP_SENT_SEQ      = 0x0000020000000000,\n-\tBNXT_ULP_HF8_BITMASK_O_TCP_RECV_ACK      = 0x0000010000000000,\n-\tBNXT_ULP_HF8_BITMASK_O_TCP_DATA_OFF      = 0x0000008000000000,\n-\tBNXT_ULP_HF8_BITMASK_O_TCP_TCP_FLAGS     = 0x0000004000000000,\n-\tBNXT_ULP_HF8_BITMASK_O_TCP_RX_WIN        = 0x0000002000000000,\n-\tBNXT_ULP_HF8_BITMASK_O_TCP_CSUM          = 0x0000001000000000,\n-\tBNXT_ULP_HF8_BITMASK_O_TCP_URP           = 0x0000000800000000\n+\tBNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT      = 0x0000080000000000,\n+\tBNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT      = 0x0000040000000000,\n+\tBNXT_ULP_HF8_BITMASK_O_UDP_LENGTH        = 0x0000020000000000,\n+\tBNXT_ULP_HF8_BITMASK_O_UDP_CSUM          = 0x0000010000000000\n };\n \n enum bnxt_ulp_hf_bitmask9 {\n@@ -612,18 +643,25 @@ enum bnxt_ulp_hf_bitmask9 {\n \tBNXT_ULP_HF9_BITMASK_OI_VLAN_CFI_PRI     = 0x0100000000000000,\n \tBNXT_ULP_HF9_BITMASK_OI_VLAN_VID         = 0x0080000000000000,\n \tBNXT_ULP_HF9_BITMASK_OI_VLAN_TYPE        = 0x0040000000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_IPV6_VER          = 0x0020000000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_IPV6_TC           = 0x0010000000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_IPV6_FLOW_LABEL   = 0x0008000000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_IPV6_PAYLOAD_LEN  = 0x0004000000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_IPV6_PROTO_ID     = 0x0002000000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_IPV6_TTL          = 0x0001000000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR     = 0x0000800000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR     = 0x0000400000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT      = 0x0000200000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT      = 0x0000100000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_UDP_LENGTH        = 0x0000080000000000,\n-\tBNXT_ULP_HF9_BITMASK_O_UDP_CSUM          = 0x0000040000000000\n+\tBNXT_ULP_HF9_BITMASK_O_IPV4_VER          = 0x0020000000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_IPV4_TOS          = 0x0010000000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_IPV4_LEN          = 0x0008000000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_IPV4_FRAG_ID      = 0x0004000000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_IPV4_FRAG_OFF     = 0x0002000000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_IPV4_TTL          = 0x0001000000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID     = 0x0000800000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_IPV4_CSUM         = 0x0000400000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR     = 0x0000200000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR     = 0x0000100000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT      = 0x0000080000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT      = 0x0000040000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_TCP_SENT_SEQ      = 0x0000020000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_TCP_RECV_ACK      = 0x0000010000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_TCP_DATA_OFF      = 0x0000008000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_TCP_TCP_FLAGS     = 0x0000004000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_TCP_RX_WIN        = 0x0000002000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_TCP_CSUM          = 0x0000001000000000,\n+\tBNXT_ULP_HF9_BITMASK_O_TCP_URP           = 0x0000000800000000\n };\n \n enum bnxt_ulp_hf_bitmask10 {\n@@ -645,15 +683,10 @@ enum bnxt_ulp_hf_bitmask10 {\n \tBNXT_ULP_HF10_BITMASK_O_IPV6_TTL         = 0x0001000000000000,\n \tBNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,\n \tBNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,\n-\tBNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT     = 0x0000200000000000,\n-\tBNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT     = 0x0000100000000000,\n-\tBNXT_ULP_HF10_BITMASK_O_TCP_SENT_SEQ     = 0x0000080000000000,\n-\tBNXT_ULP_HF10_BITMASK_O_TCP_RECV_ACK     = 0x0000040000000000,\n-\tBNXT_ULP_HF10_BITMASK_O_TCP_DATA_OFF     = 0x0000020000000000,\n-\tBNXT_ULP_HF10_BITMASK_O_TCP_TCP_FLAGS    = 0x0000010000000000,\n-\tBNXT_ULP_HF10_BITMASK_O_TCP_RX_WIN       = 0x0000008000000000,\n-\tBNXT_ULP_HF10_BITMASK_O_TCP_CSUM         = 0x0000004000000000,\n-\tBNXT_ULP_HF10_BITMASK_O_TCP_URP          = 0x0000002000000000\n+\tBNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT     = 0x0000200000000000,\n+\tBNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT     = 0x0000100000000000,\n+\tBNXT_ULP_HF10_BITMASK_O_UDP_LENGTH       = 0x0000080000000000,\n+\tBNXT_ULP_HF10_BITMASK_O_UDP_CSUM         = 0x0000040000000000\n };\n \n enum bnxt_ulp_hf_bitmask11 {\n@@ -667,20 +700,23 @@ enum bnxt_ulp_hf_bitmask11 {\n \tBNXT_ULP_HF11_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,\n \tBNXT_ULP_HF11_BITMASK_OI_VLAN_VID        = 0x0080000000000000,\n \tBNXT_ULP_HF11_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_IPV4_VER         = 0x0020000000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_IPV4_TOS         = 0x0010000000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_IPV4_LEN         = 0x0008000000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_IPV4_TTL         = 0x0001000000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT     = 0x0000080000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT     = 0x0000040000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_UDP_LENGTH       = 0x0000020000000000,\n-\tBNXT_ULP_HF11_BITMASK_O_UDP_CSUM         = 0x0000010000000000\n+\tBNXT_ULP_HF11_BITMASK_O_IPV6_VER         = 0x0020000000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_IPV6_TC          = 0x0010000000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_IPV6_TTL         = 0x0001000000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT     = 0x0000200000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT     = 0x0000100000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_TCP_SENT_SEQ     = 0x0000080000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_TCP_RECV_ACK     = 0x0000040000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_TCP_DATA_OFF     = 0x0000020000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_TCP_TCP_FLAGS    = 0x0000010000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_TCP_RX_WIN       = 0x0000008000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_TCP_CSUM         = 0x0000004000000000,\n+\tBNXT_ULP_HF11_BITMASK_O_TCP_URP          = 0x0000002000000000\n };\n \n enum bnxt_ulp_hf_bitmask12 {\n@@ -704,15 +740,10 @@ enum bnxt_ulp_hf_bitmask12 {\n \tBNXT_ULP_HF12_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,\n \tBNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,\n \tBNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,\n-\tBNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT     = 0x0000080000000000,\n-\tBNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT     = 0x0000040000000000,\n-\tBNXT_ULP_HF12_BITMASK_O_TCP_SENT_SEQ     = 0x0000020000000000,\n-\tBNXT_ULP_HF12_BITMASK_O_TCP_RECV_ACK     = 0x0000010000000000,\n-\tBNXT_ULP_HF12_BITMASK_O_TCP_DATA_OFF     = 0x0000008000000000,\n-\tBNXT_ULP_HF12_BITMASK_O_TCP_TCP_FLAGS    = 0x0000004000000000,\n-\tBNXT_ULP_HF12_BITMASK_O_TCP_RX_WIN       = 0x0000002000000000,\n-\tBNXT_ULP_HF12_BITMASK_O_TCP_CSUM         = 0x0000001000000000,\n-\tBNXT_ULP_HF12_BITMASK_O_TCP_URP          = 0x0000000800000000\n+\tBNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT     = 0x0000080000000000,\n+\tBNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT     = 0x0000040000000000,\n+\tBNXT_ULP_HF12_BITMASK_O_UDP_LENGTH       = 0x0000020000000000,\n+\tBNXT_ULP_HF12_BITMASK_O_UDP_CSUM         = 0x0000010000000000\n };\n \n enum bnxt_ulp_hf_bitmask13 {\n@@ -726,18 +757,25 @@ enum bnxt_ulp_hf_bitmask13 {\n \tBNXT_ULP_HF13_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,\n \tBNXT_ULP_HF13_BITMASK_OI_VLAN_VID        = 0x0080000000000000,\n \tBNXT_ULP_HF13_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_IPV6_VER         = 0x0020000000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_IPV6_TC          = 0x0010000000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_IPV6_TTL         = 0x0001000000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT     = 0x0000200000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT     = 0x0000100000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_UDP_LENGTH       = 0x0000080000000000,\n-\tBNXT_ULP_HF13_BITMASK_O_UDP_CSUM         = 0x0000040000000000\n+\tBNXT_ULP_HF13_BITMASK_O_IPV4_VER         = 0x0020000000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_IPV4_TOS         = 0x0010000000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_IPV4_LEN         = 0x0008000000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_IPV4_TTL         = 0x0001000000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT     = 0x0000080000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT     = 0x0000040000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_TCP_SENT_SEQ     = 0x0000020000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_TCP_RECV_ACK     = 0x0000010000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_TCP_DATA_OFF     = 0x0000008000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_TCP_TCP_FLAGS    = 0x0000004000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_TCP_RX_WIN       = 0x0000002000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_TCP_CSUM         = 0x0000001000000000,\n+\tBNXT_ULP_HF13_BITMASK_O_TCP_URP          = 0x0000000800000000\n };\n \n enum bnxt_ulp_hf_bitmask14 {\n@@ -759,15 +797,10 @@ enum bnxt_ulp_hf_bitmask14 {\n \tBNXT_ULP_HF14_BITMASK_O_IPV6_TTL         = 0x0001000000000000,\n \tBNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,\n \tBNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,\n-\tBNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT     = 0x0000200000000000,\n-\tBNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT     = 0x0000100000000000,\n-\tBNXT_ULP_HF14_BITMASK_O_TCP_SENT_SEQ     = 0x0000080000000000,\n-\tBNXT_ULP_HF14_BITMASK_O_TCP_RECV_ACK     = 0x0000040000000000,\n-\tBNXT_ULP_HF14_BITMASK_O_TCP_DATA_OFF     = 0x0000020000000000,\n-\tBNXT_ULP_HF14_BITMASK_O_TCP_TCP_FLAGS    = 0x0000010000000000,\n-\tBNXT_ULP_HF14_BITMASK_O_TCP_RX_WIN       = 0x0000008000000000,\n-\tBNXT_ULP_HF14_BITMASK_O_TCP_CSUM         = 0x0000004000000000,\n-\tBNXT_ULP_HF14_BITMASK_O_TCP_URP          = 0x0000002000000000\n+\tBNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT     = 0x0000200000000000,\n+\tBNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT     = 0x0000100000000000,\n+\tBNXT_ULP_HF14_BITMASK_O_UDP_LENGTH       = 0x0000080000000000,\n+\tBNXT_ULP_HF14_BITMASK_O_UDP_CSUM         = 0x0000040000000000\n };\n \n enum bnxt_ulp_hf_bitmask15 {\n@@ -781,47 +814,23 @@ enum bnxt_ulp_hf_bitmask15 {\n \tBNXT_ULP_HF15_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,\n \tBNXT_ULP_HF15_BITMASK_OI_VLAN_VID        = 0x0080000000000000,\n \tBNXT_ULP_HF15_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_IPV4_VER         = 0x0020000000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_IPV4_TOS         = 0x0010000000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_IPV4_LEN         = 0x0008000000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_IPV4_TTL         = 0x0001000000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_UDP_SRC_PORT     = 0x0000080000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_UDP_DST_PORT     = 0x0000040000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_UDP_LENGTH       = 0x0000020000000000,\n-\tBNXT_ULP_HF15_BITMASK_O_UDP_CSUM         = 0x0000010000000000,\n-\tBNXT_ULP_HF15_BITMASK_T_VXLAN_FLAGS      = 0x0000008000000000,\n-\tBNXT_ULP_HF15_BITMASK_T_VXLAN_RSVD0      = 0x0000004000000000,\n-\tBNXT_ULP_HF15_BITMASK_T_VXLAN_VNI        = 0x0000002000000000,\n-\tBNXT_ULP_HF15_BITMASK_T_VXLAN_RSVD1      = 0x0000001000000000,\n-\tBNXT_ULP_HF15_BITMASK_I_ETH_DMAC         = 0x0000000800000000,\n-\tBNXT_ULP_HF15_BITMASK_I_ETH_SMAC         = 0x0000000400000000,\n-\tBNXT_ULP_HF15_BITMASK_I_ETH_TYPE         = 0x0000000200000000,\n-\tBNXT_ULP_HF15_BITMASK_IO_VLAN_CFI_PRI    = 0x0000000100000000,\n-\tBNXT_ULP_HF15_BITMASK_IO_VLAN_VID        = 0x0000000080000000,\n-\tBNXT_ULP_HF15_BITMASK_IO_VLAN_TYPE       = 0x0000000040000000,\n-\tBNXT_ULP_HF15_BITMASK_II_VLAN_CFI_PRI    = 0x0000000020000000,\n-\tBNXT_ULP_HF15_BITMASK_II_VLAN_VID        = 0x0000000010000000,\n-\tBNXT_ULP_HF15_BITMASK_II_VLAN_TYPE       = 0x0000000008000000,\n-\tBNXT_ULP_HF15_BITMASK_I_IPV4_VER         = 0x0000000004000000,\n-\tBNXT_ULP_HF15_BITMASK_I_IPV4_TOS         = 0x0000000002000000,\n-\tBNXT_ULP_HF15_BITMASK_I_IPV4_LEN         = 0x0000000001000000,\n-\tBNXT_ULP_HF15_BITMASK_I_IPV4_FRAG_ID     = 0x0000000000800000,\n-\tBNXT_ULP_HF15_BITMASK_I_IPV4_FRAG_OFF    = 0x0000000000400000,\n-\tBNXT_ULP_HF15_BITMASK_I_IPV4_TTL         = 0x0000000000200000,\n-\tBNXT_ULP_HF15_BITMASK_I_IPV4_PROTO_ID    = 0x0000000000100000,\n-\tBNXT_ULP_HF15_BITMASK_I_IPV4_CSUM        = 0x0000000000080000,\n-\tBNXT_ULP_HF15_BITMASK_I_IPV4_SRC_ADDR    = 0x0000000000040000,\n-\tBNXT_ULP_HF15_BITMASK_I_IPV4_DST_ADDR    = 0x0000000000020000,\n-\tBNXT_ULP_HF15_BITMASK_I_UDP_SRC_PORT     = 0x0000000000010000,\n-\tBNXT_ULP_HF15_BITMASK_I_UDP_DST_PORT     = 0x0000000000008000,\n-\tBNXT_ULP_HF15_BITMASK_I_UDP_LENGTH       = 0x0000000000004000,\n-\tBNXT_ULP_HF15_BITMASK_I_UDP_CSUM         = 0x0000000000002000\n+\tBNXT_ULP_HF15_BITMASK_O_IPV6_VER         = 0x0020000000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_IPV6_TC          = 0x0010000000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_IPV6_TTL         = 0x0001000000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT     = 0x0000200000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT     = 0x0000100000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_TCP_SENT_SEQ     = 0x0000080000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_TCP_RECV_ACK     = 0x0000040000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_TCP_DATA_OFF     = 0x0000020000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_TCP_TCP_FLAGS    = 0x0000010000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_TCP_RX_WIN       = 0x0000008000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_TCP_CSUM         = 0x0000004000000000,\n+\tBNXT_ULP_HF15_BITMASK_O_TCP_URP          = 0x0000002000000000\n };\n \n enum bnxt_ulp_hf_bitmask16 {\n@@ -852,7 +861,30 @@ enum bnxt_ulp_hf_bitmask16 {\n \tBNXT_ULP_HF16_BITMASK_T_VXLAN_FLAGS      = 0x0000008000000000,\n \tBNXT_ULP_HF16_BITMASK_T_VXLAN_RSVD0      = 0x0000004000000000,\n \tBNXT_ULP_HF16_BITMASK_T_VXLAN_VNI        = 0x0000002000000000,\n-\tBNXT_ULP_HF16_BITMASK_T_VXLAN_RSVD1      = 0x0000001000000000\n+\tBNXT_ULP_HF16_BITMASK_T_VXLAN_RSVD1      = 0x0000001000000000,\n+\tBNXT_ULP_HF16_BITMASK_I_ETH_DMAC         = 0x0000000800000000,\n+\tBNXT_ULP_HF16_BITMASK_I_ETH_SMAC         = 0x0000000400000000,\n+\tBNXT_ULP_HF16_BITMASK_I_ETH_TYPE         = 0x0000000200000000,\n+\tBNXT_ULP_HF16_BITMASK_IO_VLAN_CFI_PRI    = 0x0000000100000000,\n+\tBNXT_ULP_HF16_BITMASK_IO_VLAN_VID        = 0x0000000080000000,\n+\tBNXT_ULP_HF16_BITMASK_IO_VLAN_TYPE       = 0x0000000040000000,\n+\tBNXT_ULP_HF16_BITMASK_II_VLAN_CFI_PRI    = 0x0000000020000000,\n+\tBNXT_ULP_HF16_BITMASK_II_VLAN_VID        = 0x0000000010000000,\n+\tBNXT_ULP_HF16_BITMASK_II_VLAN_TYPE       = 0x0000000008000000,\n+\tBNXT_ULP_HF16_BITMASK_I_IPV4_VER         = 0x0000000004000000,\n+\tBNXT_ULP_HF16_BITMASK_I_IPV4_TOS         = 0x0000000002000000,\n+\tBNXT_ULP_HF16_BITMASK_I_IPV4_LEN         = 0x0000000001000000,\n+\tBNXT_ULP_HF16_BITMASK_I_IPV4_FRAG_ID     = 0x0000000000800000,\n+\tBNXT_ULP_HF16_BITMASK_I_IPV4_FRAG_OFF    = 0x0000000000400000,\n+\tBNXT_ULP_HF16_BITMASK_I_IPV4_TTL         = 0x0000000000200000,\n+\tBNXT_ULP_HF16_BITMASK_I_IPV4_PROTO_ID    = 0x0000000000100000,\n+\tBNXT_ULP_HF16_BITMASK_I_IPV4_CSUM        = 0x0000000000080000,\n+\tBNXT_ULP_HF16_BITMASK_I_IPV4_SRC_ADDR    = 0x0000000000040000,\n+\tBNXT_ULP_HF16_BITMASK_I_IPV4_DST_ADDR    = 0x0000000000020000,\n+\tBNXT_ULP_HF16_BITMASK_I_UDP_SRC_PORT     = 0x0000000000010000,\n+\tBNXT_ULP_HF16_BITMASK_I_UDP_DST_PORT     = 0x0000000000008000,\n+\tBNXT_ULP_HF16_BITMASK_I_UDP_LENGTH       = 0x0000000000004000,\n+\tBNXT_ULP_HF16_BITMASK_I_UDP_CSUM         = 0x0000000000002000\n };\n \n enum bnxt_ulp_hf_bitmask17 {\n@@ -879,7 +911,11 @@ enum bnxt_ulp_hf_bitmask17 {\n \tBNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT     = 0x0000080000000000,\n \tBNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT     = 0x0000040000000000,\n \tBNXT_ULP_HF17_BITMASK_O_UDP_LENGTH       = 0x0000020000000000,\n-\tBNXT_ULP_HF17_BITMASK_O_UDP_CSUM         = 0x0000010000000000\n+\tBNXT_ULP_HF17_BITMASK_O_UDP_CSUM         = 0x0000010000000000,\n+\tBNXT_ULP_HF17_BITMASK_T_VXLAN_FLAGS      = 0x0000008000000000,\n+\tBNXT_ULP_HF17_BITMASK_T_VXLAN_RSVD0      = 0x0000004000000000,\n+\tBNXT_ULP_HF17_BITMASK_T_VXLAN_VNI        = 0x0000002000000000,\n+\tBNXT_ULP_HF17_BITMASK_T_VXLAN_RSVD1      = 0x0000001000000000\n };\n \n enum bnxt_ulp_hf_bitmask18 {\n@@ -903,15 +939,10 @@ enum bnxt_ulp_hf_bitmask18 {\n \tBNXT_ULP_HF18_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,\n \tBNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,\n \tBNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,\n-\tBNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT     = 0x0000080000000000,\n-\tBNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT     = 0x0000040000000000,\n-\tBNXT_ULP_HF18_BITMASK_O_TCP_SENT_SEQ     = 0x0000020000000000,\n-\tBNXT_ULP_HF18_BITMASK_O_TCP_RECV_ACK     = 0x0000010000000000,\n-\tBNXT_ULP_HF18_BITMASK_O_TCP_DATA_OFF     = 0x0000008000000000,\n-\tBNXT_ULP_HF18_BITMASK_O_TCP_TCP_FLAGS    = 0x0000004000000000,\n-\tBNXT_ULP_HF18_BITMASK_O_TCP_RX_WIN       = 0x0000002000000000,\n-\tBNXT_ULP_HF18_BITMASK_O_TCP_CSUM         = 0x0000001000000000,\n-\tBNXT_ULP_HF18_BITMASK_O_TCP_URP          = 0x0000000800000000\n+\tBNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT     = 0x0000080000000000,\n+\tBNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT     = 0x0000040000000000,\n+\tBNXT_ULP_HF18_BITMASK_O_UDP_LENGTH       = 0x0000020000000000,\n+\tBNXT_ULP_HF18_BITMASK_O_UDP_CSUM         = 0x0000010000000000\n };\n \n enum bnxt_ulp_hf_bitmask19 {\n@@ -925,18 +956,25 @@ enum bnxt_ulp_hf_bitmask19 {\n \tBNXT_ULP_HF19_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,\n \tBNXT_ULP_HF19_BITMASK_OI_VLAN_VID        = 0x0080000000000000,\n \tBNXT_ULP_HF19_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_IPV6_VER         = 0x0020000000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_IPV6_TC          = 0x0010000000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_IPV6_TTL         = 0x0001000000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT     = 0x0000200000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT     = 0x0000100000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_UDP_LENGTH       = 0x0000080000000000,\n-\tBNXT_ULP_HF19_BITMASK_O_UDP_CSUM         = 0x0000040000000000\n+\tBNXT_ULP_HF19_BITMASK_O_IPV4_VER         = 0x0020000000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_IPV4_TOS         = 0x0010000000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_IPV4_LEN         = 0x0008000000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_IPV4_TTL         = 0x0001000000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT     = 0x0000080000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT     = 0x0000040000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_TCP_SENT_SEQ     = 0x0000020000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_TCP_RECV_ACK     = 0x0000010000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_TCP_DATA_OFF     = 0x0000008000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_TCP_TCP_FLAGS    = 0x0000004000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_TCP_RX_WIN       = 0x0000002000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_TCP_CSUM         = 0x0000001000000000,\n+\tBNXT_ULP_HF19_BITMASK_O_TCP_URP          = 0x0000000800000000\n };\n \n enum bnxt_ulp_hf_bitmask20 {\n@@ -958,15 +996,10 @@ enum bnxt_ulp_hf_bitmask20 {\n \tBNXT_ULP_HF20_BITMASK_O_IPV6_TTL         = 0x0001000000000000,\n \tBNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,\n \tBNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,\n-\tBNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT     = 0x0000200000000000,\n-\tBNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT     = 0x0000100000000000,\n-\tBNXT_ULP_HF20_BITMASK_O_TCP_SENT_SEQ     = 0x0000080000000000,\n-\tBNXT_ULP_HF20_BITMASK_O_TCP_RECV_ACK     = 0x0000040000000000,\n-\tBNXT_ULP_HF20_BITMASK_O_TCP_DATA_OFF     = 0x0000020000000000,\n-\tBNXT_ULP_HF20_BITMASK_O_TCP_TCP_FLAGS    = 0x0000010000000000,\n-\tBNXT_ULP_HF20_BITMASK_O_TCP_RX_WIN       = 0x0000008000000000,\n-\tBNXT_ULP_HF20_BITMASK_O_TCP_CSUM         = 0x0000004000000000,\n-\tBNXT_ULP_HF20_BITMASK_O_TCP_URP          = 0x0000002000000000\n+\tBNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT     = 0x0000200000000000,\n+\tBNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT     = 0x0000100000000000,\n+\tBNXT_ULP_HF20_BITMASK_O_UDP_LENGTH       = 0x0000080000000000,\n+\tBNXT_ULP_HF20_BITMASK_O_UDP_CSUM         = 0x0000040000000000\n };\n \n enum bnxt_ulp_hf_bitmask21 {\n@@ -980,16 +1013,66 @@ enum bnxt_ulp_hf_bitmask21 {\n \tBNXT_ULP_HF21_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,\n \tBNXT_ULP_HF21_BITMASK_OI_VLAN_VID        = 0x0080000000000000,\n \tBNXT_ULP_HF21_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,\n-\tBNXT_ULP_HF21_BITMASK_O_IPV4_VER         = 0x0020000000000000,\n-\tBNXT_ULP_HF21_BITMASK_O_IPV4_TOS         = 0x0010000000000000,\n-\tBNXT_ULP_HF21_BITMASK_O_IPV4_LEN         = 0x0008000000000000,\n-\tBNXT_ULP_HF21_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,\n-\tBNXT_ULP_HF21_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,\n-\tBNXT_ULP_HF21_BITMASK_O_IPV4_TTL         = 0x0001000000000000,\n-\tBNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,\n-\tBNXT_ULP_HF21_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,\n-\tBNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,\n-\tBNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000\n+\tBNXT_ULP_HF21_BITMASK_O_IPV6_VER         = 0x0020000000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_IPV6_TC          = 0x0010000000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_IPV6_TTL         = 0x0001000000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT     = 0x0000200000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT     = 0x0000100000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_TCP_SENT_SEQ     = 0x0000080000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_TCP_RECV_ACK     = 0x0000040000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_TCP_DATA_OFF     = 0x0000020000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_TCP_TCP_FLAGS    = 0x0000010000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_TCP_RX_WIN       = 0x0000008000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_TCP_CSUM         = 0x0000004000000000,\n+\tBNXT_ULP_HF21_BITMASK_O_TCP_URP          = 0x0000002000000000\n };\n \n+enum bnxt_ulp_hf_bitmask22 {\n+\tBNXT_ULP_HF22_BITMASK_SVIF_INDEX         = 0x8000000000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_ETH_DMAC         = 0x4000000000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_ETH_SMAC         = 0x2000000000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_ETH_TYPE         = 0x1000000000000000,\n+\tBNXT_ULP_HF22_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,\n+\tBNXT_ULP_HF22_BITMASK_OO_VLAN_VID        = 0x0400000000000000,\n+\tBNXT_ULP_HF22_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,\n+\tBNXT_ULP_HF22_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,\n+\tBNXT_ULP_HF22_BITMASK_OI_VLAN_VID        = 0x0080000000000000,\n+\tBNXT_ULP_HF22_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_IPV4_VER         = 0x0020000000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_IPV4_TOS         = 0x0010000000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_IPV4_LEN         = 0x0008000000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_IPV4_FRAG_ID     = 0x0004000000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_IPV4_FRAG_OFF    = 0x0002000000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_IPV4_TTL         = 0x0001000000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_IPV4_PROTO_ID    = 0x0000800000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_IPV4_CSUM        = 0x0000400000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_IPV4_SRC_ADDR    = 0x0000200000000000,\n+\tBNXT_ULP_HF22_BITMASK_O_IPV4_DST_ADDR    = 0x0000100000000000\n+};\n+\n+enum bnxt_ulp_hf_bitmask23 {\n+\tBNXT_ULP_HF23_BITMASK_SVIF_INDEX         = 0x8000000000000000,\n+\tBNXT_ULP_HF23_BITMASK_O_ETH_DMAC         = 0x4000000000000000,\n+\tBNXT_ULP_HF23_BITMASK_O_ETH_SMAC         = 0x2000000000000000,\n+\tBNXT_ULP_HF23_BITMASK_O_ETH_TYPE         = 0x1000000000000000,\n+\tBNXT_ULP_HF23_BITMASK_OO_VLAN_CFI_PRI    = 0x0800000000000000,\n+\tBNXT_ULP_HF23_BITMASK_OO_VLAN_VID        = 0x0400000000000000,\n+\tBNXT_ULP_HF23_BITMASK_OO_VLAN_TYPE       = 0x0200000000000000,\n+\tBNXT_ULP_HF23_BITMASK_OI_VLAN_CFI_PRI    = 0x0100000000000000,\n+\tBNXT_ULP_HF23_BITMASK_OI_VLAN_VID        = 0x0080000000000000,\n+\tBNXT_ULP_HF23_BITMASK_OI_VLAN_TYPE       = 0x0040000000000000,\n+\tBNXT_ULP_HF23_BITMASK_O_IPV6_VER         = 0x0020000000000000,\n+\tBNXT_ULP_HF23_BITMASK_O_IPV6_TC          = 0x0010000000000000,\n+\tBNXT_ULP_HF23_BITMASK_O_IPV6_FLOW_LABEL  = 0x0008000000000000,\n+\tBNXT_ULP_HF23_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,\n+\tBNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID    = 0x0002000000000000,\n+\tBNXT_ULP_HF23_BITMASK_O_IPV6_TTL         = 0x0001000000000000,\n+\tBNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR    = 0x0000800000000000,\n+\tBNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR    = 0x0000400000000000\n+};\n #endif\n",
    "prefixes": [
        "05/25"
    ]
}