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GET /api/patches/77074/?format=api
{ "id": 77074, "url": "http://patches.dpdk.org/api/patches/77074/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200909155700.29016-1-lance.richardson@broadcom.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200909155700.29016-1-lance.richardson@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200909155700.29016-1-lance.richardson@broadcom.com", "date": "2020-09-09T15:57:00", "name": "[10/12] net/bnxt: optimize vector mode mbuf allocation", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "cbac64cd1a65ce0e97f13dd763a502396489ecd7", "submitter": { "id": 1323, "url": "http://patches.dpdk.org/api/people/1323/?format=api", "name": "Lance Richardson", "email": "lance.richardson@broadcom.com" }, "delegate": { "id": 1766, "url": "http://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200909155700.29016-1-lance.richardson@broadcom.com/mbox/", "series": [ { "id": 12060, "url": "http://patches.dpdk.org/api/series/12060/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12060", "date": "2020-09-09T15:52:53", "name": "net/bnxt: vector PMD improvements", "version": 1, "mbox": "http://patches.dpdk.org/series/12060/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/77074/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/77074/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7DABDA04B5;\n\tWed, 9 Sep 2020 17:57:07 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 639571C0CA;\n\tWed, 9 Sep 2020 17:57:07 +0200 (CEST)", "from mail-pj1-f66.google.com (mail-pj1-f66.google.com\n [209.85.216.66]) by dpdk.org (Postfix) with ESMTP id 498D6DE0\n for <dev@dpdk.org>; Wed, 9 Sep 2020 17:57:06 +0200 (CEST)", "by mail-pj1-f66.google.com with SMTP id gf14so1557626pjb.5\n for <dev@dpdk.org>; Wed, 09 Sep 2020 08:57:06 -0700 (PDT)", "from localhost.localdomain ([192.19.231.250])\n by smtp.gmail.com with ESMTPSA id y128sm3025107pfy.74.2020.09.09.08.57.04\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 09 Sep 2020 08:57:04 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com;\n s=google;\n h=from:to:cc:subject:date:message-id:mime-version\n :content-transfer-encoding;\n bh=Z0wuH47Dp7l+9fYBEMjXWrPerQL8vAgUKcxWfTvRD84=;\n b=PVs1VF+60JCCNFA9HmxaoP+bNTQylv6ifLt8wPtWq5QqHJJRKWtHHreuu6nx8T1u6E\n PrrAgxcnISJRBhVKg5hTTRDXDLI2m8C8YwtOKDjWGKkg6qmvinsrTyADVwwJpbjZ842e\n +MHeDHjIotlY0APiHHoGn/llk2hfcFVpIffSE=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version\n :content-transfer-encoding;\n bh=Z0wuH47Dp7l+9fYBEMjXWrPerQL8vAgUKcxWfTvRD84=;\n b=BpOAr7KoQSwDafo2kjLg8nf0GklOBrgX0mpfXU5BSeh/5SHi7hkzwwlEG/SVnq410c\n 3W0fekPAt1BztgIwT/ySu9uylH24O0jqvvIdheKuvWz1xwnbVZMCKViLibcfSTTDanhv\n 3d6EXTuOxJW8l3eSUhIKYg6UfdMlBb8eZG8x6/fnCQ6BAnzHgjsMEJJZkXOIO3Ai+FgT\n WTXvkimmjxMNbtWJ/ZGtYtgpc/6Mh7qc7Z9UPg6OtkzroDig5nllnRuyuafDfN1lno30\n hmucYX6X2K/kafOjMlJISFBzn0CukqffFtru4S7i6aDCRjJfqHe/jLJ78492yW+8P3bf\n /MgA==", "X-Gm-Message-State": "AOAM533yUwWnbidWmk4+GD5MK1BI5ZlcbVi4j8fpCTrsPpEHW1Y9BcqK\n BaIqi7csqw/BOJj5bOxuz/wrHw==", "X-Google-Smtp-Source": "\n ABdhPJzZt+V1j6cfB4xFnaOnuCRCl7SEXYIIaW7NjNBAJAQaUM3O9XEW19cVHR1xo2+gqsn1P2YxjA==", "X-Received": "by 2002:a17:90a:a081:: with SMTP id\n r1mr1342421pjp.115.1599667025343;\n Wed, 09 Sep 2020 08:57:05 -0700 (PDT)", "From": "Lance Richardson <lance.richardson@broadcom.com>", "To": "Ajit Khaparde <ajit.khaparde@broadcom.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>", "Cc": "dev@dpdk.org", "Date": "Wed, 9 Sep 2020 11:57:00 -0400", "Message-Id": "<20200909155700.29016-1-lance.richardson@broadcom.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 10/12] net/bnxt: optimize vector mode mbuf\n\tallocation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Simplify and optimize receive mbuf allocation function used\nby the vector mode PMDs.\n\nReviewed-by: Ajit Kumar Khaparde <ajit.khaparde@broadcom.com>\nSigned-off-by: Lance Richardson <lance.richardson@broadcom.com>\n---\n drivers/net/bnxt/bnxt_rxtx_vec_common.h | 40 ++++++++++++++\n drivers/net/bnxt/bnxt_rxtx_vec_neon.c | 70 -------------------------\n drivers/net/bnxt/bnxt_rxtx_vec_sse.c | 70 -------------------------\n 3 files changed, 40 insertions(+), 140 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/bnxt_rxtx_vec_common.h b/drivers/net/bnxt/bnxt_rxtx_vec_common.h\nindex fc2a12272b..819b8290e4 100644\n--- a/drivers/net/bnxt/bnxt_rxtx_vec_common.h\n+++ b/drivers/net/bnxt/bnxt_rxtx_vec_common.h\n@@ -56,4 +56,44 @@ bnxt_rxq_vec_setup_common(struct bnxt_rx_queue *rxq)\n \trxq->rxrearm_start = 0;\n \treturn 0;\n }\n+\n+static inline void\n+bnxt_rxq_rearm(struct bnxt_rx_queue *rxq, struct bnxt_rx_ring_info *rxr)\n+{\n+\tstruct rx_prod_pkt_bd *rxbds = &rxr->rx_desc_ring[rxq->rxrearm_start];\n+\tstruct rte_mbuf **rx_bufs = &rxr->rx_buf_ring[rxq->rxrearm_start];\n+\tint nb, i;\n+\n+\t/*\n+\t * Number of mbufs to allocate must be a multiple of four. The\n+\t * allocation must not go past the end of the ring.\n+\t */\n+\tnb = RTE_MIN(rxq->rxrearm_nb & ~0x3,\n+\t\t rxq->nb_rx_desc - rxq->rxrearm_start);\n+\n+\t/* Allocate new mbufs into the software ring. */\n+\tif (rte_mempool_get_bulk(rxq->mb_pool, (void *)rx_bufs, nb) < 0) {\n+\t\trte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed += nb;\n+\n+\t\treturn;\n+\t}\n+\n+\t/* Initialize the mbufs in vector, process 4 mbufs per loop. */\n+\tfor (i = 0; i < nb; i += 4) {\n+\t\trxbds[0].address = rte_mbuf_data_iova_default(rx_bufs[0]);\n+\t\trxbds[1].address = rte_mbuf_data_iova_default(rx_bufs[1]);\n+\t\trxbds[2].address = rte_mbuf_data_iova_default(rx_bufs[2]);\n+\t\trxbds[3].address = rte_mbuf_data_iova_default(rx_bufs[3]);\n+\n+\t\trxbds += 4;\n+\t\trx_bufs += 4;\n+\t}\n+\n+\trxq->rxrearm_start += nb;\n+\tbnxt_db_write(&rxr->rx_db, rxq->rxrearm_start - 1);\n+\tif (rxq->rxrearm_start >= rxq->nb_rx_desc)\n+\t\trxq->rxrearm_start = 0;\n+\n+\trxq->rxrearm_nb -= nb;\n+}\n #endif /* _BNXT_RXTX_VEC_COMMON_H_ */\ndiff --git a/drivers/net/bnxt/bnxt_rxtx_vec_neon.c b/drivers/net/bnxt/bnxt_rxtx_vec_neon.c\nindex 37b8c83656..24f9fc3c39 100644\n--- a/drivers/net/bnxt/bnxt_rxtx_vec_neon.c\n+++ b/drivers/net/bnxt/bnxt_rxtx_vec_neon.c\n@@ -22,76 +22,6 @@\n * RX Ring handling\n */\n \n-static inline void\n-bnxt_rxq_rearm(struct bnxt_rx_queue *rxq, struct bnxt_rx_ring_info *rxr)\n-{\n-\tstruct rx_prod_pkt_bd *rxbds = &rxr->rx_desc_ring[rxq->rxrearm_start];\n-\tstruct rte_mbuf **rx_bufs = &rxr->rx_buf_ring[rxq->rxrearm_start];\n-\tstruct rte_mbuf *mb0, *mb1;\n-\tint nb, i;\n-\n-\tconst uint64x2_t hdr_room = {0, RTE_PKTMBUF_HEADROOM};\n-\tconst uint64x2_t addrmask = {0, UINT64_MAX};\n-\n-\t/*\n-\t * Number of mbufs to allocate must be a multiple of two. The\n-\t * allocation must not go past the end of the ring.\n-\t */\n-\tnb = RTE_MIN(rxq->rxrearm_nb & ~0x1,\n-\t\t rxq->nb_rx_desc - rxq->rxrearm_start);\n-\n-\t/* Allocate new mbufs into the software ring */\n-\tif (rte_mempool_get_bulk(rxq->mb_pool, (void *)rx_bufs, nb) < 0) {\n-\t\trte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed += nb;\n-\n-\t\treturn;\n-\t}\n-\n-\t/* Initialize the mbufs in vector, process 2 mbufs in one loop */\n-\tfor (i = 0; i < nb; i += 2, rx_bufs += 2) {\n-\t\tuint64x2_t buf_addr0, buf_addr1;\n-\t\tuint64x2_t rxbd0, rxbd1;\n-\n-\t\tmb0 = rx_bufs[0];\n-\t\tmb1 = rx_bufs[1];\n-\n-\t\t/* Load address fields from both mbufs */\n-\t\tbuf_addr0 = vld1q_u64((uint64_t *)&mb0->buf_addr);\n-\t\tbuf_addr1 = vld1q_u64((uint64_t *)&mb1->buf_addr);\n-\n-\t\t/* Load both rx descriptors (preserving some existing fields) */\n-\t\trxbd0 = vld1q_u64((uint64_t *)(rxbds + 0));\n-\t\trxbd1 = vld1q_u64((uint64_t *)(rxbds + 1));\n-\n-\t\t/* Add default offset to buffer address. */\n-\t\tbuf_addr0 = vaddq_u64(buf_addr0, hdr_room);\n-\t\tbuf_addr1 = vaddq_u64(buf_addr1, hdr_room);\n-\n-\t\t/* Clear all fields except address. */\n-\t\tbuf_addr0 = vandq_u64(buf_addr0, addrmask);\n-\t\tbuf_addr1 = vandq_u64(buf_addr1, addrmask);\n-\n-\t\t/* Clear address field in descriptor. */\n-\t\trxbd0 = vbicq_u64(rxbd0, addrmask);\n-\t\trxbd1 = vbicq_u64(rxbd1, addrmask);\n-\n-\t\t/* Set address field in descriptor. */\n-\t\trxbd0 = vaddq_u64(rxbd0, buf_addr0);\n-\t\trxbd1 = vaddq_u64(rxbd1, buf_addr1);\n-\n-\t\t/* Store descriptors to memory. */\n-\t\tvst1q_u64((uint64_t *)(rxbds++), rxbd0);\n-\t\tvst1q_u64((uint64_t *)(rxbds++), rxbd1);\n-\t}\n-\n-\trxq->rxrearm_start += nb;\n-\tbnxt_db_write(&rxr->rx_db, rxq->rxrearm_start - 1);\n-\tif (rxq->rxrearm_start >= rxq->nb_rx_desc)\n-\t\trxq->rxrearm_start = 0;\n-\n-\trxq->rxrearm_nb -= nb;\n-}\n-\n static uint32_t\n bnxt_parse_pkt_type(uint32x4_t mm_rxcmp, uint32x4_t mm_rxcmp1)\n {\ndiff --git a/drivers/net/bnxt/bnxt_rxtx_vec_sse.c b/drivers/net/bnxt/bnxt_rxtx_vec_sse.c\nindex 761d835963..7e87555408 100644\n--- a/drivers/net/bnxt/bnxt_rxtx_vec_sse.c\n+++ b/drivers/net/bnxt/bnxt_rxtx_vec_sse.c\n@@ -26,76 +26,6 @@\n * RX Ring handling\n */\n \n-static inline void\n-bnxt_rxq_rearm(struct bnxt_rx_queue *rxq, struct bnxt_rx_ring_info *rxr)\n-{\n-\tstruct rx_prod_pkt_bd *rxbds = &rxr->rx_desc_ring[rxq->rxrearm_start];\n-\tstruct rte_mbuf **rx_bufs = &rxr->rx_buf_ring[rxq->rxrearm_start];\n-\tstruct rte_mbuf *mb0, *mb1;\n-\tint nb, i;\n-\n-\tconst __m128i hdr_room = _mm_set_epi64x(RTE_PKTMBUF_HEADROOM, 0);\n-\tconst __m128i addrmask = _mm_set_epi64x(UINT64_MAX, 0);\n-\n-\t/*\n-\t * Number of mbufs to allocate must be a multiple of two. The\n-\t * allocation must not go past the end of the ring.\n-\t */\n-\tnb = RTE_MIN(rxq->rxrearm_nb & ~0x1,\n-\t\t rxq->nb_rx_desc - rxq->rxrearm_start);\n-\n-\t/* Allocate new mbufs into the software ring */\n-\tif (rte_mempool_get_bulk(rxq->mb_pool, (void *)rx_bufs, nb) < 0) {\n-\t\trte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed += nb;\n-\n-\t\treturn;\n-\t}\n-\n-\t/* Initialize the mbufs in vector, process 2 mbufs in one loop */\n-\tfor (i = 0; i < nb; i += 2, rx_bufs += 2) {\n-\t\t__m128i buf_addr0, buf_addr1;\n-\t\t__m128i rxbd0, rxbd1;\n-\n-\t\tmb0 = rx_bufs[0];\n-\t\tmb1 = rx_bufs[1];\n-\n-\t\t/* Load address fields from both mbufs */\n-\t\tbuf_addr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n-\t\tbuf_addr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n-\n-\t\t/* Load both rx descriptors (preserving some existing fields) */\n-\t\trxbd0 = _mm_loadu_si128((__m128i *)(rxbds + 0));\n-\t\trxbd1 = _mm_loadu_si128((__m128i *)(rxbds + 1));\n-\n-\t\t/* Add default offset to buffer address. */\n-\t\tbuf_addr0 = _mm_add_epi64(buf_addr0, hdr_room);\n-\t\tbuf_addr1 = _mm_add_epi64(buf_addr1, hdr_room);\n-\n-\t\t/* Clear all fields except address. */\n-\t\tbuf_addr0 = _mm_and_si128(buf_addr0, addrmask);\n-\t\tbuf_addr1 = _mm_and_si128(buf_addr1, addrmask);\n-\n-\t\t/* Clear address field in descriptor. */\n-\t\trxbd0 = _mm_andnot_si128(addrmask, rxbd0);\n-\t\trxbd1 = _mm_andnot_si128(addrmask, rxbd1);\n-\n-\t\t/* Set address field in descriptor. */\n-\t\trxbd0 = _mm_add_epi64(rxbd0, buf_addr0);\n-\t\trxbd1 = _mm_add_epi64(rxbd1, buf_addr1);\n-\n-\t\t/* Store descriptors to memory. */\n-\t\t_mm_store_si128((__m128i *)(rxbds++), rxbd0);\n-\t\t_mm_store_si128((__m128i *)(rxbds++), rxbd1);\n-\t}\n-\n-\trxq->rxrearm_start += nb;\n-\tbnxt_db_write(&rxr->rx_db, rxq->rxrearm_start - 1);\n-\tif (rxq->rxrearm_start >= rxq->nb_rx_desc)\n-\t\trxq->rxrearm_start = 0;\n-\n-\trxq->rxrearm_nb -= nb;\n-}\n-\n static __m128i\n bnxt_parse_pkt_type(__m128i mm_rxcmp, __m128i mm_rxcmp1)\n {\n", "prefixes": [ "10/12" ] }