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GET /api/patches/77036/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 77036,
    "url": "http://patches.dpdk.org/api/patches/77036/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200909120853.11715-2-guyk@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200909120853.11715-2-guyk@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200909120853.11715-2-guyk@marvell.com",
    "date": "2020-09-09T12:08:52",
    "name": "[v2,1/2] examples/l3fwd-regex: add regex based l3fwd",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "e39aad797d867c17df12ef7912c90541d8bde361",
    "submitter": {
        "id": 1636,
        "url": "http://patches.dpdk.org/api/people/1636/?format=api",
        "name": "Guy Kaneti",
        "email": "guyk@marvell.com"
    },
    "delegate": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200909120853.11715-2-guyk@marvell.com/mbox/",
    "series": [
        {
            "id": 12054,
            "url": "http://patches.dpdk.org/api/series/12054/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12054",
            "date": "2020-09-09T12:08:51",
            "name": "Add example l3fwd-regex",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/12054/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/77036/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/77036/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E7A61A04B1;\n\tWed,  9 Sep 2020 14:10:32 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0FD521C0CE;\n\tWed,  9 Sep 2020 14:10:26 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 082A21C0CE\n for <dev@dpdk.org>; Wed,  9 Sep 2020 14:10:24 +0200 (CEST)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 089C6XOG019812; Wed, 9 Sep 2020 05:10:24 -0700",
            "from sc-exch03.marvell.com ([199.233.58.183])\n by mx0b-0016f401.pphosted.com with ESMTP id 33ccvr6b70-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Wed, 09 Sep 2020 05:10:23 -0700",
            "from SC-EXCH04.marvell.com (10.93.176.84) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 9 Sep\n 2020 05:10:22 -0700",
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            "from vvenus124.il.marvell.com (unknown [10.5.116.64])\n by maili.marvell.com (Postfix) with ESMTP id 8CE713F7043;\n Wed,  9 Sep 2020 05:10:18 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=wB+99vn7g9E/wFHmo8+40b09Q11Ent2PLLPNl2h0FuU=;\n b=gMaMOcL92y9CXNTE8WR+Pc/X3ofUgJpDtAGWed5SYKJdxoxPCF26GHPv5Fn4t+9UR6KW\n 3XmRG/twGNULEA2umA8MuKBX0OLzJPUmNauHY7/tg5VouRZKoPnVUEq+KYxAyRQC6lBj\n jqCFwkzXutoD/WWTRBd9hFv/KmG9Htc1/nCzpuWb9CnnfhYimLZWHbXFFLuNWMvZN56Q\n +agPbCXe1sacuBSxcAYghXSFB9jRyU/yGfT/S6rtHuGBWbtFCYo0wcnKhlRGwZQ26UWi\n oDEVbiljtWhfaLkuTkzlvzlgbTmKH8dehDzWzHD7wbG9KYItCWiBiOTKXp27tAqDXav4 uA==",
        "From": "<guyk@marvell.com>",
        "To": "<thomas@monjalon.net>, <orika@mellanox.com>, <john.mcnamara@intel.com>,\n <marko.kovacevic@intel.com>",
        "CC": "<dev@dpdk.org>, <guyk@marvell.com>, <jerinj@marvell.com>,\n <smadarf@marvell.com>, <dovrat@marvell.com>",
        "Date": "Wed, 9 Sep 2020 15:08:52 +0300",
        "Message-ID": "<20200909120853.11715-2-guyk@marvell.com>",
        "X-Mailer": "git-send-email 2.28.0",
        "In-Reply-To": "<20200909120853.11715-1-guyk@marvell.com>",
        "References": "<20200908123144.26444-3-guyk@marvell.com>\n <20200909120853.11715-1-guyk@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687\n definitions=2020-09-09_06:2020-09-09,\n 2020-09-09 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v2 1/2] examples/l3fwd-regex: add regex based\n\tl3fwd",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Guy Kaneti <guyk@marvell.com>\n\nAdd regex based l3fwd application\ninline with normal l3fwd. only LPM is supported.\n\nSigned-off-by: Guy Kaneti <guyk@marvell.com>\n---\n MAINTAINERS                        |    2 +\n examples/l3fwd-regex/l3fwd.h       |  207 ++++++\n examples/l3fwd-regex/l3fwd_lpm.c   |  484 ++++++++++++\n examples/l3fwd-regex/l3fwd_regex.c |  487 ++++++++++++\n examples/l3fwd-regex/l3fwd_regex.h |   38 +\n examples/l3fwd-regex/main.c        | 1117 ++++++++++++++++++++++++++++\n examples/l3fwd-regex/meson.build   |   10 +\n examples/meson.build               |    2 +-\n 8 files changed, 2346 insertions(+), 1 deletion(-)\n create mode 100644 examples/l3fwd-regex/l3fwd.h\n create mode 100644 examples/l3fwd-regex/l3fwd_lpm.c\n create mode 100644 examples/l3fwd-regex/l3fwd_regex.c\n create mode 100644 examples/l3fwd-regex/l3fwd_regex.h\n create mode 100644 examples/l3fwd-regex/main.c\n create mode 100644 examples/l3fwd-regex/meson.build",
    "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 3b16d7a4b..e30b1ad56 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -433,6 +433,8 @@ F: lib/librte_regexdev/\n F: app/test-regex/\n F: doc/guides/prog_guide/regexdev.rst\n F: doc/guides/regexdevs/features/default.ini\n+M: Guy Kaneti <guyk@marvell.com>\n+F: examples/l3fwd-regex/\n \n Eventdev API\n M: Jerin Jacob <jerinj@marvell.com>\ndiff --git a/examples/l3fwd-regex/l3fwd.h b/examples/l3fwd-regex/l3fwd.h\nnew file mode 100644\nindex 000000000..3fb3647bb\n--- /dev/null\n+++ b/examples/l3fwd-regex/l3fwd.h\n@@ -0,0 +1,207 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2016 Intel Corporation\n+ * Copyright(C) 2020 Marvell International Ltd.\n+ */\n+\n+#ifndef __L3_FWD_H__\n+#define __L3_FWD_H__\n+\n+#include <rte_ethdev.h>\n+#include <rte_vect.h>\n+\n+#define DO_RFC_1812_CHECKS\n+\n+#define RTE_LOGTYPE_L3FWD RTE_LOGTYPE_USER1\n+\n+/*\n+ * Configurable number of RX/TX ring descriptors\n+ */\n+#define RTE_TEST_RX_DESC_DEFAULT 1024\n+#define RTE_TEST_TX_DESC_DEFAULT 1024\n+\n+#define MAX_PKT_BURST     32\n+#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */\n+\n+#define MEMPOOL_CACHE_SIZE 256\n+#define MAX_RX_QUEUE_PER_LCORE 16\n+\n+/*\n+ * Try to avoid TX buffering if we have at least MAX_TX_BURST packets to send.\n+ */\n+#define\tMAX_TX_BURST\t  (MAX_PKT_BURST / 2)\n+\n+#define NB_SOCKETS        8\n+\n+/* Configure how many packets ahead to prefetch, when reading packets */\n+#define PREFETCH_OFFSET\t  3\n+\n+/* Used to mark destination port as 'invalid'. */\n+#define\tBAD_PORT ((uint16_t)-1)\n+\n+#define FWDSTEP\t4\n+\n+/* replace first 12B of the ethernet header. */\n+#define\tMASK_ETH 0x3f\n+\n+struct mbuf_table {\n+\tuint16_t len;\n+\tstruct rte_mbuf *m_table[MAX_PKT_BURST];\n+};\n+\n+struct lcore_rx_queue {\n+\tuint16_t port_id;\n+\tuint8_t queue_id;\n+} __rte_cache_aligned;\n+\n+struct lcore_conf {\n+\tuint16_t n_rx_queue;\n+\tstruct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];\n+\tuint8_t regex_dev_id;\n+\tuint16_t regex_qp_id;\n+\tuint16_t n_tx_port;\n+\tuint16_t tx_port_id[RTE_MAX_ETHPORTS];\n+\tuint16_t tx_queue_id[RTE_MAX_ETHPORTS];\n+\tstruct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS];\n+\tstruct rte_mbuf **pkts_burst;\n+\tvoid *ipv4_lookup_struct;\n+\tvoid *ipv6_lookup_struct;\n+} __rte_cache_aligned;\n+\n+extern volatile bool force_quit;\n+\n+/* ethernet addresses of ports */\n+extern uint64_t dest_eth_addr[RTE_MAX_ETHPORTS];\n+extern struct rte_ether_addr ports_eth_addr[RTE_MAX_ETHPORTS];\n+\n+/* mask of enabled ports */\n+extern uint32_t enabled_port_mask;\n+\n+/* Used only in exact match mode. */\n+extern int ipv6; /**< ipv6 is false by default. */\n+extern uint32_t hash_entry_number;\n+\n+extern xmm_t val_eth[RTE_MAX_ETHPORTS];\n+\n+extern struct lcore_conf lcore_conf[RTE_MAX_LCORE];\n+\n+/* Send burst of packets on an output interface */\n+static inline int\n+send_burst(struct lcore_conf *qconf, uint16_t n, uint16_t port)\n+{\n+\tstruct rte_mbuf **m_table;\n+\tint ret;\n+\tuint16_t queueid;\n+\n+\tqueueid = qconf->tx_queue_id[port];\n+\tm_table = (struct rte_mbuf **)qconf->tx_mbufs[port].m_table;\n+\n+\tret = rte_eth_tx_burst(port, queueid, m_table, n);\n+\tif (unlikely(ret < n)) {\n+\t\tdo {\n+\t\t\trte_pktmbuf_free(m_table[ret]);\n+\t\t} while (++ret < n);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* Enqueue a single packet, and send burst if queue is filled */\n+static inline int\n+send_single_packet(struct lcore_conf *qconf,\n+\t\t   struct rte_mbuf *m, uint16_t port)\n+{\n+\tuint16_t len;\n+\n+\tlen = qconf->tx_mbufs[port].len;\n+\tqconf->tx_mbufs[port].m_table[len] = m;\n+\tlen++;\n+\n+\t/* enough pkts to be sent */\n+\tif (unlikely(len == MAX_PKT_BURST)) {\n+\t\tsend_burst(qconf, MAX_PKT_BURST, port);\n+\t\tlen = 0;\n+\t}\n+\n+\tqconf->tx_mbufs[port].len = len;\n+\treturn 0;\n+}\n+\n+#ifdef DO_RFC_1812_CHECKS\n+static inline int\n+is_valid_ipv4_pkt(struct rte_ipv4_hdr *pkt, uint32_t link_len)\n+{\n+\t/* From http://www.rfc-editor.org/rfc/rfc1812.txt section 5.2.2 */\n+\t/*\n+\t * 1. The packet length reported by the Link Layer must be large\n+\t * enough to hold the minimum length legal IP datagram (20 bytes).\n+\t */\n+\tif (link_len < sizeof(struct rte_ipv4_hdr))\n+\t\treturn -1;\n+\n+\t/* 2. The IP checksum must be correct. */\n+\t/* this is checked in H/W */\n+\n+\t/*\n+\t * 3. The IP version number must be 4. If the version number is not 4\n+\t * then the packet may be another version of IP, such as IPng or\n+\t * ST-II.\n+\t */\n+\tif (((pkt->version_ihl) >> 4) != 4)\n+\t\treturn -3;\n+\t/*\n+\t * 4. The IP header length field must be large enough to hold the\n+\t * minimum length legal IP datagram (20 bytes = 5 words).\n+\t */\n+\tif ((pkt->version_ihl & 0xf) < 5)\n+\t\treturn -4;\n+\n+\t/*\n+\t * 5. The IP total length field must be large enough to hold the IP\n+\t * datagram header, whose length is specified in the IP header length\n+\t * field.\n+\t */\n+\tif (rte_cpu_to_be_16(pkt->total_length) < sizeof(struct rte_ipv4_hdr))\n+\t\treturn -5;\n+\n+\treturn 0;\n+}\n+#endif /* DO_RFC_1812_CHECKS */\n+\n+int\n+init_mem(uint16_t portid, unsigned int nb_mbuf);\n+\n+/* Function pointers for LPM functionality. */\n+void\n+setup_lpm(const int socketid);\n+\n+void\n+setup_hash(const int socketid);\n+\n+int\n+lpm_check_ptype(int portid);\n+\n+uint16_t\n+lpm_cb_parse_ptype(uint16_t port, uint16_t queue, struct rte_mbuf *pkts[],\n+\t\t   uint16_t nb_pkts, uint16_t max_pkts, void *user_param);\n+\n+int\n+lpm_main_loop(__rte_unused void *dummy);\n+\n+int\n+lpm_event_main_loop_tx_d(__rte_unused void *dummy);\n+int\n+lpm_event_main_loop_tx_d_burst(__rte_unused void *dummy);\n+int\n+lpm_event_main_loop_tx_q(__rte_unused void *dummy);\n+int\n+lpm_event_main_loop_tx_q_burst(__rte_unused void *dummy);\n+\n+\n+/* Return ipv4/ipv6 fwd lookup struct for LPM*/\n+void *\n+lpm_get_ipv4_l3fwd_lookup_struct(const int socketid);\n+\n+void *\n+lpm_get_ipv6_l3fwd_lookup_struct(const int socketid);\n+\n+#endif  /* __L3_FWD_H__ */\ndiff --git a/examples/l3fwd-regex/l3fwd_lpm.c b/examples/l3fwd-regex/l3fwd_lpm.c\nnew file mode 100644\nindex 000000000..5af69403c\n--- /dev/null\n+++ b/examples/l3fwd-regex/l3fwd_lpm.c\n@@ -0,0 +1,484 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2016 Intel Corporation\n+ * Copyright(C) 2020 Marvell International Ltd.\n+ */\n+\n+#include <stdio.h>\n+#include <stdlib.h>\n+#include <stdint.h>\n+#include <inttypes.h>\n+#include <sys/types.h>\n+#include <string.h>\n+#include <sys/queue.h>\n+#include <stdarg.h>\n+#include <errno.h>\n+#include <getopt.h>\n+#include <stdbool.h>\n+#include <sys/socket.h>\n+#include <arpa/inet.h>\n+\n+#include <rte_debug.h>\n+#include <rte_ether.h>\n+#include <rte_ethdev.h>\n+#include <rte_cycles.h>\n+#include <rte_malloc.h>\n+#include <rte_mbuf.h>\n+#include <rte_ip.h>\n+#include <rte_tcp.h>\n+#include <rte_udp.h>\n+#include <rte_lpm.h>\n+#include <rte_lpm6.h>\n+\n+#include \"l3fwd.h\"\n+#include \"l3fwd_regex.h\"\n+\n+struct ipv4_l3fwd_lpm_route {\n+\tuint32_t ip;\n+\tuint8_t  depth;\n+\tuint8_t  if_out;\n+};\n+\n+struct ipv6_l3fwd_lpm_route {\n+\tuint8_t ip[16];\n+\tuint8_t  depth;\n+\tuint8_t  if_out;\n+};\n+\n+/* 198.18.0.0/16 are set aside for RFC2544 benchmarking (RFC5735). */\n+static const struct ipv4_l3fwd_lpm_route ipv4_l3fwd_lpm_route_array[] = {\n+\t{RTE_IPV4(198, 18, 0, 0), 24, 0},\n+\t{RTE_IPV4(198, 18, 1, 0), 24, 1},\n+\t{RTE_IPV4(198, 18, 2, 0), 24, 2},\n+\t{RTE_IPV4(198, 18, 3, 0), 24, 3},\n+\t{RTE_IPV4(198, 18, 4, 0), 24, 4},\n+\t{RTE_IPV4(198, 18, 5, 0), 24, 5},\n+\t{RTE_IPV4(198, 18, 6, 0), 24, 6},\n+\t{RTE_IPV4(198, 18, 7, 0), 24, 7},\n+};\n+\n+/* 2001:0200::/48 is IANA reserved range for IPv6 benchmarking (RFC5180) */\n+static const struct ipv6_l3fwd_lpm_route ipv6_l3fwd_lpm_route_array[] = {\n+\t{{32, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 48, 0},\n+\t{{32, 1, 2, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}, 48, 1},\n+\t{{32, 1, 2, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0}, 48, 2},\n+\t{{32, 1, 2, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0}, 48, 3},\n+\t{{32, 1, 2, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0}, 48, 4},\n+\t{{32, 1, 2, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0}, 48, 5},\n+\t{{32, 1, 2, 0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 0, 0, 0}, 48, 6},\n+\t{{32, 1, 2, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0}, 48, 7},\n+};\n+\n+#define IPV4_L3FWD_LPM_MAX_RULES         1024\n+#define IPV4_L3FWD_LPM_NUMBER_TBL8S (1 << 8)\n+#define IPV6_L3FWD_LPM_MAX_RULES         1024\n+#define IPV6_L3FWD_LPM_NUMBER_TBL8S (1 << 16)\n+\n+static struct rte_lpm *ipv4_l3fwd_lpm_lookup_struct[NB_SOCKETS];\n+static struct rte_lpm6 *ipv6_l3fwd_lpm_lookup_struct[NB_SOCKETS];\n+\n+static inline uint16_t\n+lpm_get_ipv4_dst_port(const struct rte_ipv4_hdr *ipv4_hdr,\n+\t\t      uint16_t portid,\n+\t\t      struct rte_lpm *ipv4_l3fwd_lookup_struct)\n+{\n+\tuint32_t dst_ip = rte_be_to_cpu_32(ipv4_hdr->dst_addr);\n+\tuint32_t next_hop;\n+\n+\tif (rte_lpm_lookup(ipv4_l3fwd_lookup_struct, dst_ip, &next_hop) == 0)\n+\t\treturn next_hop;\n+\telse\n+\t\treturn portid;\n+}\n+\n+static inline uint16_t\n+lpm_get_ipv6_dst_port(const struct rte_ipv6_hdr *ipv6_hdr,\n+\t\t      uint16_t portid,\n+\t\t      struct rte_lpm6 *ipv6_l3fwd_lookup_struct)\n+{\n+\tconst uint8_t *dst_ip = ipv6_hdr->dst_addr;\n+\tuint32_t next_hop;\n+\n+\tif (rte_lpm6_lookup(ipv6_l3fwd_lookup_struct, dst_ip, &next_hop) == 0)\n+\t\treturn next_hop;\n+\telse\n+\t\treturn portid;\n+}\n+\n+static __rte_always_inline void\n+l3fwd_lpm_simple_forward(struct rte_mbuf *m, uint16_t portid,\n+\t\tstruct lcore_conf *qconf)\n+{\n+\tstruct rte_ether_hdr *eth_hdr;\n+\tstruct rte_ipv4_hdr *ipv4_hdr;\n+\tuint16_t dst_port;\n+\n+\teth_hdr = rte_pktmbuf_mtod(m, struct rte_ether_hdr *);\n+\n+\tif (RTE_ETH_IS_IPV4_HDR(m->packet_type)) {\n+\t\t/* Handle IPv4 headers.*/\n+\t\tipv4_hdr = rte_pktmbuf_mtod_offset(m, struct rte_ipv4_hdr *,\n+\t\t\t\t\t\tsizeof(struct rte_ether_hdr));\n+\n+#ifdef DO_RFC_1812_CHECKS\n+\t\t/* Check to make sure the packet is valid (RFC1812) */\n+\t\tif (is_valid_ipv4_pkt(ipv4_hdr, m->pkt_len) < 0) {\n+\t\t\trte_pktmbuf_free(m);\n+\t\t\treturn;\n+\t\t}\n+#endif\n+\t\t dst_port = lpm_get_ipv4_dst_port(ipv4_hdr, portid,\n+\t\t\t\t\t\tqconf->ipv4_lookup_struct);\n+\n+\t\tif (dst_port >= RTE_MAX_ETHPORTS ||\n+\t\t\t(enabled_port_mask & 1 << dst_port) == 0)\n+\t\t\tdst_port = portid;\n+\n+#ifdef DO_RFC_1812_CHECKS\n+\t\t/* Update time to live and header checksum */\n+\t\t--(ipv4_hdr->time_to_live);\n+\t\t++(ipv4_hdr->hdr_checksum);\n+#endif\n+\t\t/* dst addr */\n+\t\t*(uint64_t *)&eth_hdr->d_addr = dest_eth_addr[dst_port];\n+\n+\t\t/* src addr */\n+\t\trte_ether_addr_copy(&ports_eth_addr[dst_port],\n+\t\t\t\t&eth_hdr->s_addr);\n+\n+\t\tsend_single_packet(qconf, m, dst_port);\n+\t} else if (RTE_ETH_IS_IPV6_HDR(m->packet_type)) {\n+\t\t/* Handle IPv6 headers.*/\n+\t\tstruct rte_ipv6_hdr *ipv6_hdr;\n+\n+\t\tipv6_hdr = rte_pktmbuf_mtod_offset(m, struct rte_ipv6_hdr *,\n+\t\t\t\t\t\tsizeof(struct rte_ether_hdr));\n+\n+\t\tdst_port = lpm_get_ipv6_dst_port(ipv6_hdr, portid,\n+\t\t\t\t\tqconf->ipv6_lookup_struct);\n+\n+\t\tif (dst_port >= RTE_MAX_ETHPORTS ||\n+\t\t\t(enabled_port_mask & 1 << dst_port) == 0)\n+\t\t\tdst_port = portid;\n+\n+\t\t/* dst addr */\n+\t\t*(uint64_t *)&eth_hdr->d_addr = dest_eth_addr[dst_port];\n+\n+\t\t/* src addr */\n+\t\trte_ether_addr_copy(&ports_eth_addr[dst_port],\n+\t\t\t\t&eth_hdr->s_addr);\n+\n+\t\tsend_single_packet(qconf, m, dst_port);\n+\t} else {\n+\t\t/* Free the mbuf that contains non-IPV4/IPV6 packet */\n+\t\trte_pktmbuf_free(m);\n+\t}\n+}\n+\n+static inline void\n+l3fwd_lpm_no_opt_send_packets(int nb_rx, struct rte_mbuf **pkts_burst,\n+\t\t\t\tuint16_t portid, struct lcore_conf *qconf)\n+{\n+\tint32_t j;\n+\n+\t/* Prefetch first packets */\n+\tfor (j = 0; j < PREFETCH_OFFSET && j < nb_rx; j++)\n+\t\trte_prefetch0(rte_pktmbuf_mtod(pkts_burst[j], void *));\n+\n+\t/* Prefetch and forward already prefetched packets. */\n+\tfor (j = 0; j < (nb_rx - PREFETCH_OFFSET); j++) {\n+\t\trte_prefetch0(rte_pktmbuf_mtod(pkts_burst[\n+\t\t\t\tj + PREFETCH_OFFSET], void *));\n+\t\tl3fwd_lpm_simple_forward(pkts_burst[j], portid, qconf);\n+\t}\n+\n+\t/* Forward remaining prefetched packets */\n+\tfor (; j < nb_rx; j++)\n+\t\tl3fwd_lpm_simple_forward(pkts_burst[j], portid, qconf);\n+}\n+\n+/* main processing loop */\n+int\n+lpm_main_loop(__rte_unused void *dummy)\n+{\n+\tstruct rte_mbuf **pkts_burst;\n+\tunsigned int lcore_id, regex_nb_ops = 0;\n+\tuint64_t prev_tsc, diff_tsc, cur_tsc;\n+\tint i, nb_rx, nb_ops, deq_cnt;\n+\tuint16_t portid, regex_qp_id;\n+\tuint8_t queueid, regex_dev_id;\n+\tstruct lcore_conf *qconf;\n+\tconst uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) /\n+\t\tUS_PER_S * BURST_TX_DRAIN_US;\n+\n+\tprev_tsc = 0;\n+\n+\tlcore_id = rte_lcore_id();\n+\tqconf = &lcore_conf[lcore_id];\n+\n+\tif (qconf->n_rx_queue == 0) {\n+\t\tRTE_LOG(INFO, L3FWD, \"lcore %u has nothing to do\\n\", lcore_id);\n+\t\treturn 0;\n+\t}\n+\n+\tRTE_LOG(INFO, L3FWD, \"entering main loop on lcore %u\\n\", lcore_id);\n+\n+\tfor (i = 0; i < qconf->n_rx_queue; i++) {\n+\n+\t\tportid = qconf->rx_queue_list[i].port_id;\n+\t\tqueueid = qconf->rx_queue_list[i].queue_id;\n+\t\tRTE_LOG(INFO, L3FWD,\n+\t\t\t\" -- lcoreid=%u portid=%u rxqueueid=%hhu\\n\",\n+\t\t\tlcore_id, portid, queueid);\n+\t}\n+\tregex_dev_id = qconf->regex_dev_id;\n+\tregex_qp_id = qconf->regex_qp_id;\n+\tpkts_burst = qconf->pkts_burst;\n+\n+\twhile (!force_quit) {\n+\n+\t\tcur_tsc = rte_rdtsc();\n+\n+\t\t/*\n+\t\t * TX burst queue drain\n+\t\t */\n+\t\tdiff_tsc = cur_tsc - prev_tsc;\n+\t\tif (unlikely(diff_tsc > drain_tsc)) {\n+\n+\t\t\tif (regex_nb_ops) {\n+\t\t\t\tdeq_cnt = regex_dequeue_burst_ops(regex_dev_id,\n+\t\t\t\t\t\tlcore_id, regex_qp_id,\n+\t\t\t\t\t\tpkts_burst, REGEX_NB_OPS);\n+\t\t\t\tif (deq_cnt) {\n+\t\t\t\t\t/* only one rx queue is supported */\n+\t\t\t\t\tportid =\n+\t\t\t\t\t\tqconf->rx_queue_list[0].port_id;\n+\t\t\t\t\tl3fwd_lpm_no_opt_send_packets(deq_cnt,\n+\t\t\t\t\t\t\tpkts_burst,\n+\t\t\t\t\t\t\tportid, qconf);\n+\t\t\t\t\tregex_nb_ops -= deq_cnt;\n+\t\t\t\t}\n+\t\t\t}\n+\n+\t\t\tfor (i = 0; i < qconf->n_tx_port; ++i) {\n+\t\t\t\tportid = qconf->tx_port_id[i];\n+\t\t\t\tif (qconf->tx_mbufs[portid].len == 0)\n+\t\t\t\t\tcontinue;\n+\t\t\t\tsend_burst(qconf,\n+\t\t\t\t\tqconf->tx_mbufs[portid].len,\n+\t\t\t\t\tportid);\n+\t\t\t\tqconf->tx_mbufs[portid].len = 0;\n+\t\t\t}\n+\n+\t\t\tprev_tsc = cur_tsc;\n+\t\t}\n+\n+\t\t/*\n+\t\t * Read packet from RX queues\n+\t\t */\n+\t\tfor (i = 0; i < qconf->n_rx_queue; ++i) {\n+\t\t\tportid = qconf->rx_queue_list[i].port_id;\n+\t\t\tqueueid = qconf->rx_queue_list[i].queue_id;\n+\t\t\tnb_rx = rte_eth_rx_burst(portid, queueid, pkts_burst,\n+\t\t\t\tMAX_PKT_BURST);\n+\t\t\tif (nb_rx == 0)\n+\t\t\t\tcontinue;\n+\t\t\tnb_ops = regex_enqueue_burst_ops(regex_dev_id,\n+\t\t\t\t\tlcore_id, regex_qp_id,\n+\t\t\t\t\tpkts_burst, nb_rx);\n+\t\t\tif (unlikely(nb_ops != nb_rx))\n+\t\t\t\tprintf(\"failed to enqueue all ops, %d/%d\",\n+\t\t\t\t\t\tnb_ops, nb_rx);\n+\n+\t\t\tregex_nb_ops += nb_ops;\n+\n+\t\t\tdeq_cnt = regex_dequeue_burst_ops(regex_dev_id,\n+\t\t\t\t\tlcore_id, regex_qp_id,\n+\t\t\t\t\tpkts_burst, REGEX_NB_OPS);\n+\t\t\tif (deq_cnt) {\n+\t\t\t\tl3fwd_lpm_no_opt_send_packets(deq_cnt,\n+\t\t\t\t\t\tpkts_burst,\n+\t\t\t\t\t\tportid, qconf);\n+\t\t\t\tregex_nb_ops -= deq_cnt;\n+\t\t\t}\n+\n+\t\t}\n+\t}\n+\tregex_stats_print(lcore_id);\n+\n+\treturn 0;\n+}\n+\n+\n+void\n+setup_lpm(const int socketid)\n+{\n+\tstruct rte_lpm6_config config;\n+\tstruct rte_lpm_config config_ipv4;\n+\tunsigned int i;\n+\tint ret;\n+\tchar s[64];\n+\tchar abuf[INET6_ADDRSTRLEN];\n+\n+\t/* create the LPM table */\n+\tconfig_ipv4.max_rules = IPV4_L3FWD_LPM_MAX_RULES;\n+\tconfig_ipv4.number_tbl8s = IPV4_L3FWD_LPM_NUMBER_TBL8S;\n+\tconfig_ipv4.flags = 0;\n+\tsnprintf(s, sizeof(s), \"IPV4_L3FWD_LPM_%d\", socketid);\n+\tipv4_l3fwd_lpm_lookup_struct[socketid] =\n+\t\t\trte_lpm_create(s, socketid, &config_ipv4);\n+\tif (ipv4_l3fwd_lpm_lookup_struct[socketid] == NULL)\n+\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\"Unable to create the l3fwd LPM table on socket %d\\n\",\n+\t\t\tsocketid);\n+\n+\t/* populate the LPM table */\n+\tfor (i = 0; i < RTE_DIM(ipv4_l3fwd_lpm_route_array); i++) {\n+\t\tstruct in_addr in;\n+\n+\t\t/* skip unused ports */\n+\t\tif ((1 << ipv4_l3fwd_lpm_route_array[i].if_out &\n+\t\t\t\tenabled_port_mask) == 0)\n+\t\t\tcontinue;\n+\n+\t\tret = rte_lpm_add(ipv4_l3fwd_lpm_lookup_struct[socketid],\n+\t\t\tipv4_l3fwd_lpm_route_array[i].ip,\n+\t\t\tipv4_l3fwd_lpm_route_array[i].depth,\n+\t\t\tipv4_l3fwd_lpm_route_array[i].if_out);\n+\n+\t\tif (ret < 0) {\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\"Unable to add entry %u to the l3fwd LPM table on socket %d\\n\",\n+\t\t\t\ti, socketid);\n+\t\t}\n+\n+\t\tin.s_addr = htonl(ipv4_l3fwd_lpm_route_array[i].ip);\n+\t\tprintf(\"LPM: Adding route %s / %d (%d)\\n\",\n+\t\t       inet_ntop(AF_INET, &in, abuf, sizeof(abuf)),\n+\t\t\tipv4_l3fwd_lpm_route_array[i].depth,\n+\t\t\tipv4_l3fwd_lpm_route_array[i].if_out);\n+\t}\n+\n+\t/* create the LPM6 table */\n+\tsnprintf(s, sizeof(s), \"IPV6_L3FWD_LPM_%d\", socketid);\n+\n+\tconfig.max_rules = IPV6_L3FWD_LPM_MAX_RULES;\n+\tconfig.number_tbl8s = IPV6_L3FWD_LPM_NUMBER_TBL8S;\n+\tconfig.flags = 0;\n+\tipv6_l3fwd_lpm_lookup_struct[socketid] = rte_lpm6_create(s, socketid,\n+\t\t\t\t&config);\n+\tif (ipv6_l3fwd_lpm_lookup_struct[socketid] == NULL)\n+\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\"Unable to create the l3fwd LPM table on socket %d\\n\",\n+\t\t\tsocketid);\n+\n+\t/* populate the LPM table */\n+\tfor (i = 0; i < RTE_DIM(ipv6_l3fwd_lpm_route_array); i++) {\n+\n+\t\t/* skip unused ports */\n+\t\tif ((1 << ipv6_l3fwd_lpm_route_array[i].if_out &\n+\t\t\t\tenabled_port_mask) == 0)\n+\t\t\tcontinue;\n+\n+\t\tret = rte_lpm6_add(ipv6_l3fwd_lpm_lookup_struct[socketid],\n+\t\t\tipv6_l3fwd_lpm_route_array[i].ip,\n+\t\t\tipv6_l3fwd_lpm_route_array[i].depth,\n+\t\t\tipv6_l3fwd_lpm_route_array[i].if_out);\n+\n+\t\tif (ret < 0) {\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\"Unable to add entry %u to the l3fwd LPM table on socket %d\\n\",\n+\t\t\t\ti, socketid);\n+\t\t}\n+\n+\t\tprintf(\"LPM: Adding route %s / %d (%d)\\n\",\n+\t\t       inet_ntop(AF_INET6, ipv6_l3fwd_lpm_route_array[i].ip,\n+\t\t\t\t abuf, sizeof(abuf)),\n+\t\t       ipv6_l3fwd_lpm_route_array[i].depth,\n+\t\t       ipv6_l3fwd_lpm_route_array[i].if_out);\n+\t}\n+}\n+\n+int\n+lpm_check_ptype(int portid)\n+{\n+\tint i, ret;\n+\tint ptype_l3_ipv4 = 0, ptype_l3_ipv6 = 0;\n+\tuint32_t ptype_mask = RTE_PTYPE_L3_MASK;\n+\n+\tret = rte_eth_dev_get_supported_ptypes(portid, ptype_mask, NULL, 0);\n+\tif (ret <= 0)\n+\t\treturn 0;\n+\n+\tuint32_t ptypes[ret];\n+\n+\tret = rte_eth_dev_get_supported_ptypes(portid, ptype_mask, ptypes, ret);\n+\tfor (i = 0; i < ret; ++i) {\n+\t\tif (ptypes[i] & RTE_PTYPE_L3_IPV4)\n+\t\t\tptype_l3_ipv4 = 1;\n+\t\tif (ptypes[i] & RTE_PTYPE_L3_IPV6)\n+\t\t\tptype_l3_ipv6 = 1;\n+\t}\n+\n+\tif (ptype_l3_ipv4 == 0)\n+\t\tprintf(\"port %d cannot parse RTE_PTYPE_L3_IPV4\\n\", portid);\n+\n+\tif (ptype_l3_ipv6 == 0)\n+\t\tprintf(\"port %d cannot parse RTE_PTYPE_L3_IPV6\\n\", portid);\n+\n+\tif (ptype_l3_ipv4 && ptype_l3_ipv6)\n+\t\treturn 1;\n+\n+\treturn 0;\n+\n+}\n+\n+static inline void\n+lpm_parse_ptype(struct rte_mbuf *m)\n+{\n+\tstruct rte_ether_hdr *eth_hdr;\n+\tuint32_t packet_type = RTE_PTYPE_UNKNOWN;\n+\tuint16_t ether_type;\n+\n+\teth_hdr = rte_pktmbuf_mtod(m, struct rte_ether_hdr *);\n+\tether_type = eth_hdr->ether_type;\n+\tif (ether_type == rte_cpu_to_be_16(RTE_ETHER_TYPE_IPV4))\n+\t\tpacket_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;\n+\telse if (ether_type == rte_cpu_to_be_16(RTE_ETHER_TYPE_IPV6))\n+\t\tpacket_type |= RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;\n+\n+\tm->packet_type = packet_type;\n+}\n+\n+uint16_t\n+lpm_cb_parse_ptype(uint16_t port __rte_unused, uint16_t queue __rte_unused,\n+\t\t   struct rte_mbuf *pkts[], uint16_t nb_pkts,\n+\t\t   uint16_t max_pkts __rte_unused,\n+\t\t   void *user_param __rte_unused)\n+{\n+\tunsigned int i;\n+\n+\tif (unlikely(nb_pkts == 0))\n+\t\treturn nb_pkts;\n+\trte_prefetch0(rte_pktmbuf_mtod(pkts[0], struct ether_hdr *));\n+\tfor (i = 0; i < (unsigned int) (nb_pkts - 1); ++i) {\n+\t\trte_prefetch0(rte_pktmbuf_mtod(pkts[i+1],\n+\t\t\tstruct ether_hdr *));\n+\t\tlpm_parse_ptype(pkts[i]);\n+\t}\n+\tlpm_parse_ptype(pkts[i]);\n+\n+\treturn nb_pkts;\n+}\n+\n+/* Return ipv4/ipv6 lpm fwd lookup struct. */\n+void *\n+lpm_get_ipv4_l3fwd_lookup_struct(const int socketid)\n+{\n+\treturn ipv4_l3fwd_lpm_lookup_struct[socketid];\n+}\n+\n+void *\n+lpm_get_ipv6_l3fwd_lookup_struct(const int socketid)\n+{\n+\treturn ipv6_l3fwd_lpm_lookup_struct[socketid];\n+}\ndiff --git a/examples/l3fwd-regex/l3fwd_regex.c b/examples/l3fwd-regex/l3fwd_regex.c\nnew file mode 100644\nindex 000000000..c24cb6d17\n--- /dev/null\n+++ b/examples/l3fwd-regex/l3fwd_regex.c\n@@ -0,0 +1,487 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2020 Marvell International Ltd.\n+ */\n+\n+#include <errno.h>\n+#include <getopt.h>\n+#include <string.h>\n+#include <signal.h>\n+#include <stdbool.h>\n+#include <unistd.h>\n+\n+#include <rte_debug.h>\n+#include <rte_eal.h>\n+#include <rte_malloc.h>\n+#include <rte_mbuf.h>\n+#include <rte_regexdev.h>\n+\n+#include \"l3fwd.h\"\n+#include \"l3fwd_regex.h\"\n+\n+#define REGEX_OPS_DATA_SIZE    (0x80 +\\\n+\t\t\t254*sizeof(struct rte_regexdev_match))\n+/* The optimum size (in terms of memory usage) for a mempool\n+ * is when n is a power of two minus one: n = (2^q - 1).\n+ */\n+#define REGEX_RULE_FILE_GROUP_ID_STR \"subset_id\"\n+#define REGEX_RULE_FILE_GROUP_ID_LEN 9\n+\n+#define test_bitmap(i, val) (val & (1ull << i))\n+#define REGEX_MOD_INC(i, l)   ((i) == (l - 1) ? (i) = 0 : (i)++)\n+\n+#define REGEX_DEBUG(fmt, args...) \\\n+\t\tdo {\\\n+\t\t\tif (unlikely(conf->debug_print))\\\n+\t\t\t\tprintf(\"regex %d:\"fmt, rte_lcore_id(), ##args);\\\n+\t\t} while (0)\n+#define REGEX_LOG(fmt, args...) printf(\"regex %d:\"fmt, rte_lcore_id(), ##args)\n+\n+#define REGEX_ERR(fmt, args...) printf(\"error %d:\"fmt, rte_lcore_id(), ##args)\n+\n+const char *\n+regex_dev_capa_strings[] = {\n+\t[0]\t= \"compilation\",\n+};\n+\n+\n+const char *\n+rule_flags_strings[] = {\n+\t[0]\t= \"ALLOW_EMPTY\",\n+\t[1]\t= \"ANCHORED\",\n+\t[2]\t= \"CASELESS\",\n+\t[3]\t= \"DOTALL\",\n+\t[4]\t= \"DUPNAMES\",\n+\t[5]\t= \"EXTENDED\",\n+\t[6]\t= \"MATCH_UNSET_BACKREF\",\n+\t[7]\t= \"MULTILINE\",\n+\t[8]\t= \"NO_AUTO_CAPTURE\",\n+\t[9]\t= \"UCP\",\n+\t[10]\t= \"UNGREEDY\",\n+\t[11]\t= \"UTF\",\n+\t[12]\t= \"BACKSLASH\",\n+};\n+\n+struct regex_rule_db_entry {\n+\tuint8_t\t\ttype;\n+\tuint32_t\taddr;\n+\tuint64_t\tvalue;\n+};\n+\n+struct regex_rule_db {\n+\tuint32_t version;\n+\tuint32_t revision;\n+\tuint32_t number_of_entries;\n+\tstruct regex_rule_db_entry *entries;\n+};\n+\n+struct regex_stats {\n+\tuint64_t matches;\n+};\n+\n+struct regex_conf {\n+\tuint32_t rule_db_len;\n+\tchar *rule_db;\n+\tuint8_t debug_print;\n+\tuint8_t nb_lcore;\n+\tuint8_t drop_on_match;\n+};\n+\n+struct regex_lcore_conf {\n+\tuint16_t dev_id;\n+\tuint16_t qp_id;\n+\tstruct rte_regex_ops **ops;\n+\tstruct rte_regex_ops **ops_pool;\n+};\n+\n+struct regex_lcore_params {\n+\tuint32_t ops_head;\n+\tuint32_t ops_tail;\n+\tuint32_t ops_avail;\n+\tstruct regex_stats stats;\n+};\n+\n+static struct regex_lcore_params regex_lcore_params[RTE_MAX_LCORE];\n+static struct regex_lcore_conf regex_lcore_conf[RTE_MAX_LCORE];\n+\n+struct regex_conf conf[] = {\n+\t\t{\n+\t\t\t\t.rule_db_len = 0,\n+\t\t\t\t.rule_db = NULL,\n+\t\t\t\t.debug_print = 0,\n+\t\t\t\t.nb_lcore = 0,\n+\t\t\t\t.drop_on_match = 0,\n+\t\t}\n+};\n+\n+int\n+regex_read_rule_db_file(char *filename)\n+{\n+\tuint32_t new_len;\n+\tlong buf_len;\n+\n+\tFILE *fp = fopen(filename, \"rb\");\n+\tif (fp == NULL) {\n+\t\tprintf(\"Error opening file\\n\");\n+\t\treturn -EIO;\n+\t}\n+\tif (fseek(fp, 0L, SEEK_END) == 0) {\n+\t\tbuf_len = ftell(fp);\n+\t\tif (buf_len == -1)\n+\t\t\tgoto error;\n+\t\tconf->rule_db = rte_malloc(NULL, sizeof(char) * (buf_len + 1),\n+\t\t\t\t0);\n+\t\tif (conf->rule_db == NULL)\n+\t\t\tgoto error;\n+\n+\t\tif (fseek(fp, 0L, SEEK_SET) != 0)\n+\t\t\tgoto error;\n+\t\tnew_len = fread(conf->rule_db, sizeof(char), buf_len, fp);\n+\t\tif (new_len != buf_len)\n+\t\t\tgoto error;\n+\t} else\n+\t\tgoto error;\n+\n+\tfclose(fp);\n+\tconf->rule_db_len = buf_len;\n+\n+\treturn 0;\n+error:\n+\tif (fp)\n+\t\tfclose(fp);\n+\tif (conf->rule_db)\n+\t\trte_free(conf->rule_db);\n+\treturn -EIO;\n+}\n+\n+void\n+regex_debug_enable(void)\n+{\n+\tconf->debug_print = 1;\n+}\n+\n+void\n+regex_drop_on_match(void)\n+{\n+\tconf->drop_on_match = 1;\n+}\n+\n+static inline int\n+regex_opspool_get_bulk(uint32_t lcore, struct rte_regex_ops **ops, uint32_t n)\n+{\n+\tstruct rte_regex_ops **ops_pool;\n+\tuint32_t i, ops_head;\n+\n+\tops_pool = regex_lcore_conf[lcore].ops_pool;\n+\tops_head = regex_lcore_params[lcore].ops_head;\n+\n+\tif (regex_lcore_params[lcore].ops_avail < n) {\n+\t\tREGEX_LOG(\"cannot allocate ops buffer\\n\");\n+\t\treturn 0;\n+\t}\n+\n+\tfor (i = 0; i < n; i++) {\n+\t\tops[i] = ops_pool[ops_head];\n+\t\tREGEX_MOD_INC(ops_head, REGEX_NB_OPS);\n+\t}\n+\n+\tregex_lcore_params[lcore].ops_avail -= n;\n+\tregex_lcore_params[lcore].ops_head = ops_head;\n+\treturn n;\n+}\n+\n+static inline void\n+regex_opspool_put_bulk(uint32_t lcore, struct rte_regex_ops **ops, uint32_t n)\n+{\n+\tstruct rte_regex_ops **ops_pool;\n+\tuint32_t i, ops_tail;\n+\n+\tops_pool = regex_lcore_conf[lcore].ops_pool;\n+\tops_tail = regex_lcore_params[lcore].ops_tail;\n+\tfor (i = 0; i < n; i++) {\n+\t\tif (ops_pool[ops_tail] != ops[i]) {\n+\t\t\tREGEX_ERR(\"ops pool out of sync\\n\"\n+\t\t\t\t\t\"ops_pool[%d] = %p\\n\"\n+\t\t\t\t\t\"ops[%d] = %p\\n\"\n+\t\t\t\t\t\"exiting...\\n\", ops_tail,\n+\t\t\t\t\tops_pool[ops_tail], i, ops[i]);\n+\t\t\tforce_quit = true;\n+\t\t\treturn;\n+\t\t}\n+\t\tops_pool[ops_tail] = ops[i];\n+\t\tREGEX_MOD_INC(ops_tail, REGEX_NB_OPS);\n+\t}\n+\tregex_lcore_params[lcore].ops_avail += n;\n+\tregex_lcore_params[lcore].ops_tail = ops_tail;\n+}\n+\n+static inline void\n+regex_opspool_put(uint32_t lcore, struct rte_regex_ops *ops)\n+{\n+\tstruct rte_regex_ops **ops_pool;\n+\tuint32_t ops_tail;\n+\n+\tops_pool = regex_lcore_conf[lcore].ops_pool;\n+\tops_tail = regex_lcore_params[lcore].ops_tail;\n+\tif (ops_pool[ops_tail] != ops) {\n+\t\tREGEX_ERR(\"ops pool out of sync\\n\"\n+\t\t\t\t\"ops_pool[%d] = %p\\n\"\n+\t\t\t\t\"ops = %p\\n\"\n+\t\t\t\t\"exiting...\\n\", ops_tail,\n+\t\t\t\tops_pool[ops_tail], ops);\n+\t\tforce_quit = true;\n+\t\treturn;\n+\t}\n+\tops_pool[ops_tail] = ops;\n+\tREGEX_MOD_INC(ops_tail, REGEX_NB_OPS);\n+\tregex_lcore_params[lcore].ops_avail++;\n+\tregex_lcore_params[lcore].ops_tail = ops_tail;\n+}\n+\n+static inline uint32_t\n+regex_fill_ops(uint32_t lcore, struct rte_regex_ops **ops, uint16_t nb_ops,\n+\t\tstruct rte_mbuf **pkts_burst)\n+{\n+\tstruct rte_mbuf *mbuf;\n+\tuint32_t i;\n+\tint ret;\n+\n+\tret = regex_opspool_get_bulk(lcore, ops, nb_ops);\n+\tif (unlikely(!ret)) {\n+\t\tREGEX_LOG(\"cannot allocate ops buffer\\n\");\n+\t\treturn 0;\n+\t}\n+\n+\tfor (i = 0; i < nb_ops; i++) {\n+\n+\t\tmbuf = pkts_burst[i];\n+\t\tif (unlikely(mbuf == NULL)) {\n+\t\t\tREGEX_LOG(\"Cannot allocate more mbuf, %d allocated\\n\",\n+\t\t\t\t\ti);\n+\t\t\tregex_opspool_put(lcore, ops[i]);\n+\t\t\treturn i;\n+\t\t}\n+\n+\t\tops[i]->mbuf = mbuf;\n+\t\tops[i]->user_ptr = mbuf;\n+\t\tops[i]->req_flags = 0;\n+\t\tops[i]->group_id0 = 1;\n+\t\tops[i]->group_id1 = 0;\n+\t\tops[i]->group_id2 = 0;\n+\t\tops[i]->group_id3 = 0;\n+\t}\n+\n+\treturn i;\n+}\n+\n+static inline void\n+regex_check_match(struct rte_regex_ops **ops, uint32_t deq_cnt,\n+\t\tstruct rte_mbuf **pkts_burst, uint32_t lcore)\n+{\n+\tuint32_t i;\n+\n+\tfor (i = 0; i < deq_cnt; i++) {\n+\t\tpkts_burst[i] = ops[i]->user_ptr;\n+\t\tif (ops[i]->nb_matches != 0) {\n+\t\t\tREGEX_DEBUG(\"op %d matches %d\\n\",\n+\t\t\t\t\ti, ops[i]->nb_matches);\n+\t\t\tregex_lcore_params[lcore].stats.matches++;\n+\t\t\t/* mark packet to be dropped\n+\t\t\t * in l3fwd_lpm_simple_forward() non-IP packets are\n+\t\t\t * dropped.\n+\t\t\t */\n+\t\t\tif (conf->drop_on_match)\n+\t\t\t\tpkts_burst[i]->packet_type = RTE_PTYPE_UNKNOWN;\n+\t\t}\n+\t}\n+}\n+\n+uint32_t\n+regex_enqueue_burst_ops(int dev_id, uint32_t lcore_id, uint16_t qp_id,\n+\t\tstruct rte_mbuf **pkts_burst, uint16_t nb_pkts)\n+{\n+\tuint32_t nb_ops, ret;\n+\tstruct rte_regex_ops **ops = regex_lcore_conf[lcore_id].ops;\n+\n+\tnb_ops = regex_fill_ops(lcore_id, ops, nb_pkts, pkts_burst);\n+\n+\tif (unlikely(nb_ops < nb_pkts))\n+\t\treturn 0;\n+\n+\tREGEX_DEBUG(\"Enqueue single burst %d\\n\", nb_ops);\n+\tret = rte_regexdev_enqueue_burst(dev_id, qp_id, ops, nb_ops);\n+\tif (unlikely(ret != nb_ops)) {\n+\t\tREGEX_ERR(\"rte_regexdev_enqueue_burst(): Failed, %d/%d enqueue\\n\",\n+\t\t\t\tret, nb_ops);\n+\t\treturn 0;\n+\t}\n+\treturn nb_ops;\n+}\n+\n+uint32_t\n+regex_dequeue_burst_ops(int dev_id, uint32_t lcore_id, uint16_t qp_id,\n+\t\tstruct rte_mbuf **pkts_burst, uint16_t nb_pkts)\n+{\n+\tstruct rte_regex_ops **ops = regex_lcore_conf[lcore_id].ops;\n+\tuint32_t deq_cnt;\n+\n+\tdeq_cnt = rte_regexdev_dequeue_burst(dev_id, qp_id,\n+\t\t\tops, nb_pkts);\n+\tREGEX_DEBUG(\"dequeue burst %d\\n\", deq_cnt);\n+\tif (deq_cnt)\n+\t\tregex_check_match(ops, deq_cnt, pkts_burst, lcore_id);\n+\n+\n+\tregex_opspool_put_bulk(lcore_id, ops, deq_cnt);\n+\n+\treturn deq_cnt;\n+}\n+\n+\n+void\n+regex_stats_print(uint32_t lcore)\n+{\n+\tREGEX_LOG(\"Number of matches: %\"PRIu64\"\\n\",\n+\t\t\tregex_lcore_params[lcore].stats.matches);\n+}\n+\n+void\n+regex_dev_uninit(uint32_t dev_id)\n+{\n+\tif (rte_regexdev_close(dev_id) < 0)\n+\t\tprintf(\"rte_regexdev_close(dev %d): Failed\\n\", dev_id);\n+}\n+\n+void\n+regex_lcore_uninit(uint32_t lcore_id)\n+{\n+\tuint32_t i;\n+\tif (regex_lcore_conf[lcore_id].ops_pool) {\n+\t\tfor (i = 0; i < REGEX_NB_OPS; i++) {\n+\t\t\tif (regex_lcore_conf[lcore_id].ops_pool[i])\n+\t\t\t\trte_free(\n+\t\t\t\t\tregex_lcore_conf[lcore_id].ops_pool[i]);\n+\t\t}\n+\t\trte_free(regex_lcore_conf[lcore_id].ops_pool);\n+\t}\n+\tif (regex_lcore_conf[lcore_id].ops)\n+\t\trte_free(regex_lcore_conf[lcore_id].ops);\n+}\n+\n+void\n+regex_mem_free(void)\n+{\n+\tif (conf->rule_db)\n+\t\trte_free(conf->rule_db);\n+}\n+\n+int\n+regex_dev_init(uint32_t dev_id, uint16_t nb_queue_pairs)\n+{\n+\tstruct rte_regexdev_qp_conf qp_conf;\n+\tstruct rte_regexdev_info dev_info;\n+\tstruct rte_regexdev_config cfg;\n+\tuint32_t i;\n+\tint ret;\n+\n+\tprintf(\"info: dev id is %d\\n\", dev_id);\n+\tret = rte_regexdev_info_get(dev_id, &dev_info);\n+\tif (ret < 0) {\n+\t\tprintf(\"rte_regexdev_info_get(): Failed\\n\");\n+\t\treturn ret;\n+\t}\n+\tprintf(\"get info:\\n\");\n+\tprintf(\"driver_name          %s\\n\", dev_info.driver_name);\n+\tprintf(\"max_matches          %d\\n\", dev_info.max_matches);\n+\tprintf(\"max_queue_pairs      %d\\n\", dev_info.max_queue_pairs);\n+\tprintf(\"max_payloadsize      %d\\n\", dev_info.max_payload_size);\n+\tprintf(\"max_rules_per_group %d\\n\",\n+\t\t\tdev_info.max_rules_per_group);\n+\tprintf(\"max_groups          %d\\n\", dev_info.max_groups);\n+\tprintf(\"regex_dev_capa       0x%x\\n\", dev_info.regexdev_capa);\n+\tfor (i = 0; i < 32; i++)\n+\t\tif (test_bitmap(i, dev_info.regexdev_capa))\n+\t\t\tprintf(\"%d           %s\\n\", i,\n+\t\t\t\t\tregex_dev_capa_strings[i]);\n+\tprintf(\"rule_flags           0x%lx\\n\", dev_info.rule_flags);\n+\tfor (i = 0; i < 64; i++)\n+\t\tif (test_bitmap(i, dev_info.rule_flags))\n+\t\t\tprintf(\"%d           %s\\n\", i,\n+\t\t\t\t\trule_flags_strings[i]);\n+\n+\tcfg.dev_cfg_flags = 0;\n+\tcfg.nb_max_matches = dev_info.max_matches;\n+\tcfg.nb_queue_pairs = nb_queue_pairs;\n+\tcfg.nb_rules_per_group = dev_info.max_rules_per_group;\n+\tcfg.nb_groups = dev_info.max_groups;\n+\tcfg.rule_db = conf->rule_db;\n+\tcfg.rule_db_len = conf->rule_db_len;\n+\tret = rte_regexdev_configure(dev_id, &cfg);\n+\tif (ret < 0) {\n+\t\tprintf(\"rte_regexdev_configure(): Failed\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\tqp_conf.qp_conf_flags = 0;\n+\tqp_conf.nb_desc = 8192;\n+\tqp_conf.cb = NULL;\n+\tfor (i = 0; i < nb_queue_pairs; i++) {\n+\t\tret = rte_regexdev_queue_pair_setup(dev_id, i,\n+\t\t\t\t&qp_conf);\n+\t\tif (ret < 0) {\n+\t\t\tprintf(\"rte_regexdev_queue_pair_setup(): Failed for queue %d\\n\",\n+\t\t\t\t\ti);\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n+\tret = rte_regexdev_start(dev_id);\n+\tif (ret < 0) {\n+\t\tprintf(\"rte_regexdev_start(): Failed\\n\");\n+\t\treturn ret;\n+\t}\n+\treturn 0;\n+}\n+\n+int\n+regex_lcore_init(uint32_t lcore_id, uint32_t dev_id, uint32_t qp_id)\n+{\n+\tuint32_t i;\n+\n+\tprintf(\"%s lcore %u dev_id %d qp %d\\n\", __func__,\n+\t\t\tlcore_id, dev_id, qp_id);\n+\n+\tregex_lcore_conf[lcore_id].qp_id = qp_id;\n+\tregex_lcore_conf[lcore_id].dev_id = dev_id;\n+\n+\tmemset(&regex_lcore_params[lcore_id].stats, 0,\n+\t\t\tsizeof(struct regex_stats));\n+\n+\tregex_lcore_conf[lcore_id].ops = rte_malloc(\"regex_ops\",\n+\t\t\tREGEX_NB_OPS*sizeof(struct rte_regex_ops *),\n+\t\t\t0);\n+\tif (regex_lcore_conf[lcore_id].ops == NULL) {\n+\t\tREGEX_ERR(\"cannot allocate ops memory\");\n+\t\treturn -1;\n+\t}\n+\n+\tregex_lcore_conf[lcore_id].ops_pool = rte_malloc(\"regex_ops_pool\",\n+\t\t\tREGEX_NB_OPS*sizeof(struct rte_regex_ops *),\n+\t\t\t0);\n+\tif (regex_lcore_conf[lcore_id].ops_pool == NULL) {\n+\t\tREGEX_ERR(\"cannot allocate ops pool memory\");\n+\t\treturn -1;\n+\t}\n+\tfor (i = 0; i < REGEX_NB_OPS; i++) {\n+\t\tregex_lcore_conf[lcore_id].ops_pool[i] = rte_malloc(\"\",\n+\t\t\t\tREGEX_OPS_DATA_SIZE, 0);\n+\t\tif (regex_lcore_conf[lcore_id].ops_pool[i] == NULL) {\n+\t\t\tREGEX_ERR(\"cannot allocate ops memory\");\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\tregex_lcore_params[lcore_id].ops_head = 0;\n+\tregex_lcore_params[lcore_id].ops_tail = 0;\n+\tregex_lcore_params[lcore_id].ops_avail = REGEX_NB_OPS;\n+\tconf->nb_lcore++;\n+\n+\treturn 0;\n+}\ndiff --git a/examples/l3fwd-regex/l3fwd_regex.h b/examples/l3fwd-regex/l3fwd_regex.h\nnew file mode 100644\nindex 000000000..d01a8e6e1\n--- /dev/null\n+++ b/examples/l3fwd-regex/l3fwd_regex.h\n@@ -0,0 +1,38 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2020 Marvell International Ltd.\n+ */\n+\n+#ifndef __L3FWD_REGEX_H__\n+#define __L3FWD_REGEX_H__\n+\n+#define REGEX_NB_OPS (8192)\n+\n+int\n+regex_dev_init(uint32_t dev_id, uint16_t nb_queue_pairs);\n+\n+int\n+regex_lcore_init(uint32_t lcore_id, uint32_t dev_id, uint32_t qp_id);\n+\n+uint32_t\n+regex_enqueue_burst_ops(int dev_id, uint32_t lcore_id, uint16_t qp_id,\n+\t\tstruct rte_mbuf **pkts_burst, uint16_t nb_pkts);\n+uint32_t\n+regex_dequeue_burst_ops(int dev_id, uint32_t lcore_id, uint16_t qp_id,\n+\t\tstruct rte_mbuf **pkts_burst, uint16_t nb_pkts);\n+int\n+regex_read_rule_db_file(char *filename);\n+void\n+regex_debug_enable(void);\n+void\n+regex_drop_on_match(void);\n+\n+void\n+regex_stats_print(uint32_t lcore);\n+void\n+regex_dev_uninit(uint32_t dev_id);\n+void\n+regex_lcore_uninit(uint32_t lcore_id);\n+void\n+regex_mem_free(void);\n+\n+#endif /* __L3FWD_REGEX_H__ */\ndiff --git a/examples/l3fwd-regex/main.c b/examples/l3fwd-regex/main.c\nnew file mode 100644\nindex 000000000..eed3a1d32\n--- /dev/null\n+++ b/examples/l3fwd-regex/main.c\n@@ -0,0 +1,1117 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2016 Intel Corporation\n+ * Copyright(C) 2020 Marvell International Ltd.\n+ */\n+\n+#include <stdio.h>\n+#include <stdlib.h>\n+#include <stdint.h>\n+#include <inttypes.h>\n+#include <sys/types.h>\n+#include <string.h>\n+#include <sys/queue.h>\n+#include <stdarg.h>\n+#include <errno.h>\n+#include <getopt.h>\n+#include <signal.h>\n+#include <stdbool.h>\n+\n+#include <rte_common.h>\n+#include <rte_vect.h>\n+#include <rte_byteorder.h>\n+#include <rte_log.h>\n+#include <rte_malloc.h>\n+#include <rte_memory.h>\n+#include <rte_memcpy.h>\n+#include <rte_eal.h>\n+#include <rte_launch.h>\n+#include <rte_atomic.h>\n+#include <rte_cycles.h>\n+#include <rte_prefetch.h>\n+#include <rte_lcore.h>\n+#include <rte_per_lcore.h>\n+#include <rte_branch_prediction.h>\n+#include <rte_interrupts.h>\n+#include <rte_random.h>\n+#include <rte_debug.h>\n+#include <rte_ether.h>\n+#include <rte_mempool.h>\n+#include <rte_mbuf.h>\n+#include <rte_ip.h>\n+#include <rte_tcp.h>\n+#include <rte_udp.h>\n+#include <rte_string_fns.h>\n+#include <rte_cpuflags.h>\n+#include <rte_regexdev.h>\n+\n+#include <cmdline_parse.h>\n+#include <cmdline_parse_etheraddr.h>\n+\n+#include \"l3fwd.h\"\n+#include \"l3fwd_regex.h\"\n+\n+#define MAX_TX_QUEUE_PER_PORT RTE_MAX_ETHPORTS\n+#define MAX_RX_QUEUE_PER_PORT 128\n+\n+#define MAX_LCORE_PARAMS 1024\n+\n+/* Static global variables used within this file. */\n+static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;\n+static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;\n+\n+/**< Ports set in promiscuous mode off by default. */\n+static int promiscuous_on;\n+\n+/* Global variables. */\n+\n+static int numa_on = 1; /**< NUMA is enabled by default. */\n+static int parse_ptype; /**< Parse packet type using rx callback, and */\n+\t\t\t/**< disabled by default */\n+static int per_port_pool; /**< Use separate buffer pools per port; disabled */\n+\t\t\t  /**< by default */\n+\n+volatile bool force_quit;\n+\n+/* ethernet addresses of ports */\n+uint64_t dest_eth_addr[RTE_MAX_ETHPORTS];\n+struct rte_ether_addr ports_eth_addr[RTE_MAX_ETHPORTS];\n+\n+xmm_t val_eth[RTE_MAX_ETHPORTS];\n+\n+/* mask of enabled ports */\n+uint32_t enabled_port_mask;\n+\n+struct lcore_conf lcore_conf[RTE_MAX_LCORE];\n+\n+struct lcore_params {\n+\tuint16_t port_id;\n+\tuint8_t queue_id;\n+\tuint8_t lcore_id;\n+\tuint8_t regex_dev_id;\n+\tuint16_t regex_qp_id;\n+} __rte_cache_aligned;\n+\n+\n+static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS];\n+static struct lcore_params lcore_params_array_default[] = {\n+\t{0, 0, 1, 0, 0},\n+};\n+\n+\n+static struct lcore_params *lcore_params = lcore_params_array_default;\n+static uint16_t nb_lcore_params = sizeof(lcore_params_array_default) /\n+\t\t\t\tsizeof(lcore_params_array_default[0]);\n+\n+static struct rte_eth_conf port_conf = {\n+\t.rxmode = {\n+\t\t.mq_mode = ETH_MQ_RX_RSS,\n+\t\t.max_rx_pkt_len = RTE_ETHER_MAX_LEN,\n+\t\t.split_hdr_size = 0,\n+\t\t.offloads = 0,\n+\t},\n+\t.rx_adv_conf = {\n+\t\t.rss_conf = {\n+\t\t\t.rss_key = NULL,\n+\t\t\t.rss_hf = ETH_RSS_IP,\n+\t\t},\n+\t},\n+\t.txmode = {\n+\t\t.mq_mode = ETH_MQ_TX_NONE,\n+\t},\n+};\n+\n+static struct rte_mempool *pktmbuf_pool[RTE_MAX_ETHPORTS][NB_SOCKETS];\n+static uint8_t lkp_per_socket[NB_SOCKETS];\n+\n+struct l3fwd_lkp_mode {\n+\tvoid  (*setup)(int socketid);\n+\tint   (*check_ptype)(int portid);\n+\trte_rx_callback_fn cb_parse_ptype;\n+\tint   (*main_loop)(void *arg);\n+\tvoid* (*get_ipv4_lookup_struct)(int socketid);\n+\tvoid* (*get_ipv6_lookup_struct)(int socketid);\n+};\n+\n+static struct l3fwd_lkp_mode l3fwd_lkp;\n+\n+static struct l3fwd_lkp_mode l3fwd_lpm_lkp = {\n+\t.setup                  = setup_lpm,\n+\t.check_ptype\t\t= lpm_check_ptype,\n+\t.cb_parse_ptype\t\t= lpm_cb_parse_ptype,\n+\t.main_loop              = lpm_main_loop,\n+\t.get_ipv4_lookup_struct = lpm_get_ipv4_l3fwd_lookup_struct,\n+\t.get_ipv6_lookup_struct = lpm_get_ipv6_l3fwd_lookup_struct,\n+};\n+\n+/*\n+ * Setup lookup methods for forwarding.\n+ * Currently longest-prefix-match is supported.\n+ */\n+static void\n+setup_l3fwd_lookup_tables(void)\n+{\n+\t/* Setup LPM lookup functions. */\n+\t\tl3fwd_lkp = l3fwd_lpm_lkp;\n+}\n+\n+static int\n+check_lcore_params(void)\n+{\n+\tuint8_t queue, lcore, regex_queue, regex_dev;\n+\tstruct rte_regexdev_info dev_info;\n+\tuint16_t i;\n+\tint socketid;\n+\n+\tfor (i = 0; i < nb_lcore_params; ++i) {\n+\t\tqueue = lcore_params[i].queue_id;\n+\t\tif (queue >= MAX_RX_QUEUE_PER_PORT) {\n+\t\t\tprintf(\"invalid queue number: %hhu\\n\", queue);\n+\t\t\treturn -1;\n+\t\t}\n+\t\tlcore = lcore_params[i].lcore_id;\n+\t\tif (!rte_lcore_is_enabled(lcore)) {\n+\t\t\tprintf(\"error: lcore %hhu is not enabled in lcore mask\\n\",\n+\t\t\t\t\tlcore);\n+\t\t\treturn -1;\n+\t\t}\n+\t\tsocketid = rte_lcore_to_socket_id(lcore);\n+\t\tif ((socketid != 0) && (numa_on == 0)) {\n+\t\t\tprintf(\"warning: lcore %hhu is on socket %d with numa off\\n\",\n+\t\t\t\tlcore, socketid);\n+\t\t}\n+\t\tregex_dev = lcore_params[i].regex_dev_id;\n+\t\tif ((rte_regexdev_is_valid_dev(regex_dev) == 0)) {\n+\t\t\tprintf(\"invalid regex dev number: %hhu\\n\", regex_dev);\n+\t\t\treturn -1;\n+\t\t}\n+\t\tregex_queue =  lcore_params[i].regex_qp_id;\n+\t\trte_regexdev_info_get(regex_dev, &dev_info);\n+\t\tif (regex_queue >= dev_info.max_queue_pairs) {\n+\t\t\tprintf(\"invalid regex queue number: %hhu\\n\",\n+\t\t\t\t\tregex_queue);\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n+static int\n+check_port_config(void)\n+{\n+\tuint16_t portid;\n+\tuint16_t i;\n+\n+\tfor (i = 0; i < nb_lcore_params; ++i) {\n+\t\tportid = lcore_params[i].port_id;\n+\t\tif ((enabled_port_mask & (1 << portid)) == 0) {\n+\t\t\tprintf(\"port %u is not enabled in port mask\\n\", portid);\n+\t\t\treturn -1;\n+\t\t}\n+\t\tif (!rte_eth_dev_is_valid_port(portid)) {\n+\t\t\tprintf(\"port %u is not present on the board\\n\", portid);\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n+static uint8_t\n+get_port_n_rx_queues(const uint16_t port)\n+{\n+\tint queue = -1;\n+\tuint16_t i;\n+\n+\tfor (i = 0; i < nb_lcore_params; ++i) {\n+\t\tif (lcore_params[i].port_id == port) {\n+\t\t\tif (lcore_params[i].queue_id == queue+1)\n+\t\t\t\tqueue = lcore_params[i].queue_id;\n+\t\t\telse\n+\t\t\t\trte_exit(EXIT_FAILURE, \"queue ids of the port %d must be\"\n+\t\t\t\t\t\t\" in sequence and must start with 0\\n\",\n+\t\t\t\t\t\tlcore_params[i].port_id);\n+\t\t}\n+\t}\n+\treturn (uint8_t)(++queue);\n+}\n+\n+static uint8_t\n+get_regex_dev_n_queues(const uint8_t dev_id)\n+{\n+\tint queue = -1;\n+\tuint16_t i;\n+\n+\tfor (i = 0; i < nb_lcore_params; ++i) {\n+\t\tif (lcore_params[i].regex_dev_id == dev_id) {\n+\t\t\tif (lcore_params[i].regex_qp_id == queue+1)\n+\t\t\t\tqueue = lcore_params[i].regex_qp_id;\n+\t\t\telse\n+\t\t\t\trte_exit(EXIT_FAILURE, \"regex queue ids of a Regex device %d must be\"\n+\t\t\t\t\t\t\" in sequence and must start with 0\\n\",\n+\t\t\t\t\t\tlcore_params[i].regex_dev_id);\n+\t\t}\n+\t}\n+\treturn (uint8_t)(++queue);\n+}\n+\n+static int\n+init_lcore_rx_queues(void)\n+{\n+\tuint16_t i, nb_rx_queue;\n+\tuint8_t lcore;\n+\n+\tfor (i = 0; i < nb_lcore_params; ++i) {\n+\t\tlcore = lcore_params[i].lcore_id;\n+\t\tnb_rx_queue = lcore_conf[lcore].n_rx_queue;\n+\t\tif (nb_rx_queue >= MAX_RX_QUEUE_PER_LCORE) {\n+\t\t\tprintf(\"error: too many queues (%u) for lcore: %u\\n\",\n+\t\t\t\t(uint16_t)nb_rx_queue + 1, (uint8_t)lcore);\n+\t\t\treturn -1;\n+\t\t}\n+\t\tlcore_conf[lcore].rx_queue_list[nb_rx_queue].port_id =\n+\t\t\t\tlcore_params[i].port_id;\n+\t\tlcore_conf[lcore].rx_queue_list[nb_rx_queue].queue_id =\n+\t\t\t\tlcore_params[i].queue_id;\n+\t\tlcore_conf[lcore].regex_dev_id = lcore_params[i].regex_dev_id;\n+\t\tlcore_conf[lcore].regex_qp_id = lcore_params[i].regex_qp_id;\n+\t\tlcore_conf[lcore].n_rx_queue++;\n+\t}\n+\treturn 0;\n+}\n+\n+/* display usage */\n+static void\n+print_usage(const char *prgname)\n+{\n+\tfprintf(stderr, \"%s [EAL options] --\"\n+\t\t\" -p PORTMASK\"\n+\t\t\" [-P]\"\n+\t\t\" --config (port,queue,lcore,regexdev,regex q)[,(port,queue,lcore,regexdev,regex q)]\"\n+\t\t\" --regex-rule-db-file FILENAME\"\n+\t\t\" [--eth-dest=X,MM:MM:MM:MM:MM:MM]\"\n+\t\t\" [--enable-jumbo [--max-pkt-len PKTLEN]]\"\n+\t\t\" [--no-numa]\"\n+\t\t\" [--parse-ptype]\"\n+\t\t\" [--per-port-pool]\"\n+\t\t\" [--regex-drop]\"\n+\t\t\" [--regex-debug]\\n\\n\"\n+\n+\t\t\"  -p PORTMASK: Hexadecimal bitmask of ports to configure\\n\"\n+\t\t\"  -P : Enable promiscuous mode\\n\"\n+\t\t\"  --config (port,queue,lcore,regexdev,regex q): Rx queue configuration\\n\"\n+\t\t\"  --regex-rule-db-file FILENAME prebuilt rule database for regex device.\\n\"\n+\t\t\"  --eth-dest=X,MM:MM:MM:MM:MM:MM: Ethernet destination for port X\\n\"\n+\t\t\"  --enable-jumbo: Enable jumbo frames\\n\"\n+\t\t\"  --max-pkt-len: Under the premise of enabling jumbo,\\n\"\n+\t\t\"                 maximum packet length in decimal (64-9600)\\n\"\n+\t\t\"  --no-numa: Disable numa awareness\\n\"\n+\t\t\"  --parse-ptype: Set to use software to analyze packet type\\n\"\n+\t\t\"  --per-port-pool: Use separate buffer pool per port\\n\"\n+\t\t\"  --regex-drop: Enable regex drop on match\\n\"\n+\t\t\"  --regex-debug: Enable regex debug printing\\n\",\n+\t\tprgname);\n+}\n+\n+static int\n+parse_max_pkt_len(const char *pktlen)\n+{\n+\tchar *end = NULL;\n+\tunsigned long len;\n+\n+\t/* parse decimal string */\n+\tlen = strtoul(pktlen, &end, 10);\n+\tif ((pktlen[0] == '\\0') || (end == NULL) || (*end != '\\0'))\n+\t\treturn -1;\n+\n+\tif (len == 0)\n+\t\treturn -1;\n+\n+\treturn len;\n+}\n+\n+static int\n+parse_portmask(const char *portmask)\n+{\n+\tchar *end = NULL;\n+\tunsigned long pm;\n+\n+\t/* parse hexadecimal string */\n+\tpm = strtoul(portmask, &end, 16);\n+\tif ((portmask[0] == '\\0') || (end == NULL) || (*end != '\\0'))\n+\t\treturn -1;\n+\n+\tif (pm == 0)\n+\t\treturn -1;\n+\n+\treturn pm;\n+}\n+\n+static int\n+parse_config(const char *q_arg)\n+{\n+\tchar s[256];\n+\tconst char *p, *p0 = q_arg;\n+\tchar *end;\n+\tenum fieldnames {\n+\t\tFLD_PORT = 0,\n+\t\tFLD_QUEUE,\n+\t\tFLD_LCORE,\n+\t\tFLD_REGEX_DEV,\n+\t\tFLD_REGEX_QUEUE,\n+\t\t_NUM_FLD\n+\t};\n+\tunsigned long int_fld[_NUM_FLD];\n+\tchar *str_fld[_NUM_FLD];\n+\tint i;\n+\tunsigned int size;\n+\n+\tnb_lcore_params = 0;\n+\n+\twhile ((p = strchr(p0, '(')) != NULL) {\n+\t\t++p;\n+\t\tp0 = strchr(p, ')');\n+\t\tif (p0 == NULL)\n+\t\t\treturn -1;\n+\n+\t\tsize = p0 - p;\n+\t\tif (size >= sizeof(s))\n+\t\t\treturn -1;\n+\n+\t\tsnprintf(s, sizeof(s), \"%.*s\", size, p);\n+\t\tif (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') !=\n+\t\t\t\t_NUM_FLD)\n+\t\t\treturn -1;\n+\t\tfor (i = 0; i < _NUM_FLD; i++) {\n+\t\t\terrno = 0;\n+\t\t\tint_fld[i] = strtoul(str_fld[i], &end, 0);\n+\t\t\tif (errno != 0 || end == str_fld[i] || int_fld[i] > 255)\n+\t\t\t\treturn -1;\n+\t\t}\n+\t\tif (nb_lcore_params >= MAX_LCORE_PARAMS) {\n+\t\t\tprintf(\"exceeded max number of lcore params: %hu\\n\",\n+\t\t\t\tnb_lcore_params);\n+\t\t\treturn -1;\n+\t\t}\n+\t\tlcore_params_array[nb_lcore_params].port_id =\n+\t\t\t(uint8_t)int_fld[FLD_PORT];\n+\t\tlcore_params_array[nb_lcore_params].queue_id =\n+\t\t\t(uint8_t)int_fld[FLD_QUEUE];\n+\t\tlcore_params_array[nb_lcore_params].lcore_id =\n+\t\t\t(uint8_t)int_fld[FLD_LCORE];\n+\t\tlcore_params_array[nb_lcore_params].regex_dev_id =\n+\t\t\t\t(uint8_t)int_fld[FLD_REGEX_DEV];\n+\t\tlcore_params_array[nb_lcore_params].regex_qp_id =\n+\t\t\t\t(uint8_t)int_fld[FLD_REGEX_QUEUE];\n+\t\t++nb_lcore_params;\n+\t}\n+\tlcore_params = lcore_params_array;\n+\treturn 0;\n+}\n+\n+static void\n+parse_eth_dest(const char *optarg)\n+{\n+\tuint16_t portid;\n+\tchar *port_end;\n+\tuint8_t c, *dest, peer_addr[6];\n+\n+\terrno = 0;\n+\tportid = strtoul(optarg, &port_end, 10);\n+\tif (errno != 0 || port_end == optarg || *port_end++ != ',')\n+\t\trte_exit(EXIT_FAILURE,\n+\t\t\"Invalid eth-dest: %s\", optarg);\n+\tif (portid >= RTE_MAX_ETHPORTS)\n+\t\trte_exit(EXIT_FAILURE,\n+\t\t\"eth-dest: port %d >= RTE_MAX_ETHPORTS(%d)\\n\",\n+\t\tportid, RTE_MAX_ETHPORTS);\n+\n+\tif (cmdline_parse_etheraddr(NULL, port_end,\n+\t\t&peer_addr, sizeof(peer_addr)) < 0)\n+\t\trte_exit(EXIT_FAILURE,\n+\t\t\"Invalid ethernet address: %s\\n\",\n+\t\tport_end);\n+\tdest = (uint8_t *)&dest_eth_addr[portid];\n+\tfor (c = 0; c < 6; c++)\n+\t\tdest[c] = peer_addr[c];\n+\t*(uint64_t *)(val_eth + portid) = dest_eth_addr[portid];\n+}\n+\n+#define MAX_JUMBO_PKT_LEN  9600\n+\n+static const char short_options[] =\n+\t\"p:\"  /* portmask */\n+\t\"P\"   /* promiscuous */\n+\t;\n+\n+#define CMD_LINE_OPT_CONFIG \"config\"\n+#define CMD_LINE_OPT_ETH_DEST \"eth-dest\"\n+#define CMD_LINE_OPT_NO_NUMA \"no-numa\"\n+#define CMD_LINE_OPT_ENABLE_JUMBO \"enable-jumbo\"\n+#define CMD_LINE_OPT_PARSE_PTYPE \"parse-ptype\"\n+#define CMD_LINE_OPT_PER_PORT_POOL \"per-port-pool\"\n+#define CMD_LINE_OPT_REGEX_RULE_DB_FILE \"regex-rule-db-file\"\n+#define CMD_LINE_OPT_REGEX_RULE_FILE \"regex-rule-file\"\n+#define CMD_LINE_OPT_REGEX_DEBUG \"regex-debug\"\n+#define CMD_LINE_OPT_REGEX_DROP \"regex-drop\"\n+\n+enum {\n+\t/* long options mapped to a short option\n+\t */\n+\n+\t/* first long only option value must be >= 256, so that we won't\n+\t * conflict with short options\n+\t */\n+\tCMD_LINE_OPT_MIN_NUM = 256,\n+\tCMD_LINE_OPT_CONFIG_NUM,\n+\tCMD_LINE_OPT_ETH_DEST_NUM,\n+\tCMD_LINE_OPT_NO_NUMA_NUM,\n+\tCMD_LINE_OPT_ENABLE_JUMBO_NUM,\n+\tCMD_LINE_OPT_PARSE_PTYPE_NUM,\n+\tCMD_LINE_OPT_PARSE_PER_PORT_POOL,\n+\tCMD_LINE_OPT_REGEX_RULE_DB_FILE_NUM,\n+\tCMD_LINE_OPT_REGEX_DEBUG_NUM,\n+\tCMD_LINE_OPT_REGEX_DROP_NUM\n+};\n+\n+static const struct option lgopts[] = {\n+\t{CMD_LINE_OPT_CONFIG, 1, 0, CMD_LINE_OPT_CONFIG_NUM},\n+\t{CMD_LINE_OPT_ETH_DEST, 1, 0, CMD_LINE_OPT_ETH_DEST_NUM},\n+\t{CMD_LINE_OPT_NO_NUMA, 0, 0, CMD_LINE_OPT_NO_NUMA_NUM},\n+\t{CMD_LINE_OPT_ENABLE_JUMBO, 0, 0, CMD_LINE_OPT_ENABLE_JUMBO_NUM},\n+\t{CMD_LINE_OPT_PARSE_PTYPE, 0, 0, CMD_LINE_OPT_PARSE_PTYPE_NUM},\n+\t{CMD_LINE_OPT_PER_PORT_POOL, 0, 0, CMD_LINE_OPT_PARSE_PER_PORT_POOL},\n+\t{CMD_LINE_OPT_REGEX_RULE_DB_FILE, 1, 0,\n+\t\t\tCMD_LINE_OPT_REGEX_RULE_DB_FILE_NUM},\n+\t{CMD_LINE_OPT_REGEX_DEBUG, 0, 0, CMD_LINE_OPT_REGEX_DEBUG_NUM},\n+\t{CMD_LINE_OPT_REGEX_DROP, 0, 0, CMD_LINE_OPT_REGEX_DROP_NUM},\n+\t{NULL, 0, 0, 0}\n+};\n+\n+/*\n+ * This expression is used to calculate the number of mbufs needed\n+ * depending on user input, taking  into account memory for rx and\n+ * tx hardware rings, cache per lcore and mtable per port per lcore.\n+ * RTE_MAX is used to ensure that NB_MBUF never goes below a minimum\n+ * value of 8192\n+ */\n+#define NB_MBUF(nports) RTE_MAX(\t\\\n+\t(nports*nb_rx_queue*nb_rxd +\t\t\\\n+\tnports*nb_lcores*MAX_PKT_BURST +\t\\\n+\tnports*n_tx_queue*nb_txd +\t\t\\\n+\tnb_lcores*MEMPOOL_CACHE_SIZE),\t\t\\\n+\t8192U)\n+\n+/* Parse the argument given in the command line of the application */\n+static int\n+parse_args(int argc, char **argv)\n+{\n+\tint opt, ret;\n+\tchar **argvopt;\n+\tint option_index;\n+\tchar *prgname = argv[0];\n+\targvopt = argv;\n+\n+\t/* Error or normal output strings. */\n+\twhile ((opt = getopt_long(argc, argvopt, short_options,\n+\t\t\t\tlgopts, &option_index)) != EOF) {\n+\n+\t\tswitch (opt) {\n+\t\t/* portmask */\n+\t\tcase 'p':\n+\t\t\tenabled_port_mask = parse_portmask(optarg);\n+\t\t\tif (enabled_port_mask == 0) {\n+\t\t\t\tfprintf(stderr, \"Invalid portmask\\n\");\n+\t\t\t\tprint_usage(prgname);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t\tbreak;\n+\n+\t\tcase 'P':\n+\t\t\tpromiscuous_on = 1;\n+\t\t\tbreak;\n+\n+\t\t/* long options */\n+\t\tcase CMD_LINE_OPT_CONFIG_NUM:\n+\t\t\tret = parse_config(optarg);\n+\t\t\tif (ret) {\n+\t\t\t\tfprintf(stderr, \"Invalid config\\n\");\n+\t\t\t\tprint_usage(prgname);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t\tbreak;\n+\n+\t\tcase CMD_LINE_OPT_ETH_DEST_NUM:\n+\t\t\tparse_eth_dest(optarg);\n+\t\t\tbreak;\n+\n+\t\tcase CMD_LINE_OPT_NO_NUMA_NUM:\n+\t\t\tnuma_on = 0;\n+\t\t\tbreak;\n+\n+\n+\t\tcase CMD_LINE_OPT_ENABLE_JUMBO_NUM: {\n+\t\t\tconst struct option lenopts = {\n+\t\t\t\t\"max-pkt-len\", required_argument, 0, 0\n+\t\t\t};\n+\n+\t\t\tport_conf.rxmode.offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;\n+\t\t\tport_conf.txmode.offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;\n+\n+\t\t\t/*\n+\t\t\t * if no max-pkt-len set, use the default\n+\t\t\t * value RTE_ETHER_MAX_LEN.\n+\t\t\t */\n+\t\t\tif (getopt_long(argc, argvopt, \"\",\n+\t\t\t\t\t&lenopts, &option_index) == 0) {\n+\t\t\t\tret = parse_max_pkt_len(optarg);\n+\t\t\t\tif (ret < 64 || ret > MAX_JUMBO_PKT_LEN) {\n+\t\t\t\t\tfprintf(stderr,\n+\t\t\t\t\t\t\"invalid maximum packet length\\n\");\n+\t\t\t\t\tprint_usage(prgname);\n+\t\t\t\t\treturn -1;\n+\t\t\t\t}\n+\t\t\t\tport_conf.rxmode.max_rx_pkt_len = ret;\n+\t\t\t}\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\tcase CMD_LINE_OPT_PARSE_PTYPE_NUM:\n+\t\t\tprintf(\"soft parse-ptype is enabled\\n\");\n+\t\t\tparse_ptype = 1;\n+\t\t\tbreak;\n+\n+\t\tcase CMD_LINE_OPT_PARSE_PER_PORT_POOL:\n+\t\t\tprintf(\"per port buffer pool is enabled\\n\");\n+\t\t\tper_port_pool = 1;\n+\t\t\tbreak;\n+\t\tcase CMD_LINE_OPT_REGEX_RULE_DB_FILE_NUM:\n+\t\t\tret = regex_read_rule_db_file(optarg);\n+\t\t\tif (ret) {\n+\t\t\t\tfprintf(stderr, \"%s\", rte_strerror(ret));\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t\tbreak;\n+\t\tcase CMD_LINE_OPT_REGEX_DEBUG_NUM:\n+\t\t\tregex_debug_enable();\n+\t\t\tbreak;\n+\t\tcase CMD_LINE_OPT_REGEX_DROP_NUM:\n+\t\t\tregex_drop_on_match();\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tprint_usage(prgname);\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\n+\tif (optind >= 0)\n+\t\targv[optind-1] = prgname;\n+\n+\tret = optind-1;\n+\toptind = 1; /* reset getopt lib */\n+\treturn ret;\n+}\n+\n+static void\n+print_ethaddr(const char *name, const struct rte_ether_addr *eth_addr)\n+{\n+\tchar buf[RTE_ETHER_ADDR_FMT_SIZE];\n+\trte_ether_format_addr(buf, RTE_ETHER_ADDR_FMT_SIZE, eth_addr);\n+\tprintf(\"%s%s\", name, buf);\n+}\n+\n+int\n+init_mem(uint16_t portid, unsigned int nb_mbuf)\n+{\n+\tstruct lcore_conf *qconf;\n+\tunsigned int lcore_id;\n+\tint socketid;\n+\tchar s[64];\n+\n+\tfor (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {\n+\t\tif (rte_lcore_is_enabled(lcore_id) == 0)\n+\t\t\tcontinue;\n+\n+\t\tif (numa_on)\n+\t\t\tsocketid = rte_lcore_to_socket_id(lcore_id);\n+\t\telse\n+\t\t\tsocketid = 0;\n+\n+\t\tif (socketid >= NB_SOCKETS) {\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\"Socket %d of lcore %u is out of range %d\\n\",\n+\t\t\t\tsocketid, lcore_id, NB_SOCKETS);\n+\t\t}\n+\n+\t\tif (pktmbuf_pool[portid][socketid] == NULL) {\n+\t\t\tsnprintf(s, sizeof(s), \"mbuf_pool_%d:%d\",\n+\t\t\t\t portid, socketid);\n+\t\t\tpktmbuf_pool[portid][socketid] =\n+\t\t\t\trte_pktmbuf_pool_create(s, nb_mbuf,\n+\t\t\t\t\tMEMPOOL_CACHE_SIZE, 0,\n+\t\t\t\t\tRTE_MBUF_DEFAULT_BUF_SIZE, socketid);\n+\t\t\tif (pktmbuf_pool[portid][socketid] == NULL)\n+\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\t\"Cannot init mbuf pool on socket %d\\n\",\n+\t\t\t\t\tsocketid);\n+\t\t\telse\n+\t\t\t\tprintf(\"Allocated mbuf pool on socket %d\\n\",\n+\t\t\t\t\tsocketid);\n+\n+\t\t\t/* Setup either LPM or EM(f.e Hash). But, only once per\n+\t\t\t * available socket.\n+\t\t\t */\n+\t\t\tif (!lkp_per_socket[socketid]) {\n+\t\t\t\tl3fwd_lkp.setup(socketid);\n+\t\t\t\tlkp_per_socket[socketid] = 1;\n+\t\t\t}\n+\t\t}\n+\t\tqconf = &lcore_conf[lcore_id];\n+\t\tqconf->ipv4_lookup_struct =\n+\t\t\tl3fwd_lkp.get_ipv4_lookup_struct(socketid);\n+\t\tqconf->ipv6_lookup_struct =\n+\t\t\tl3fwd_lkp.get_ipv6_lookup_struct(socketid);\n+\t\tqconf->pkts_burst = rte_malloc(\"pkts_burst\",\n+\t\t\t\tREGEX_NB_OPS*sizeof(struct rte_mbuf *),\n+\t\t\t\t0);\n+\t\tif (qconf->pkts_burst == NULL)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\"Cannot allocate memory for pkts_burst\\n\");\n+\t}\n+\treturn 0;\n+}\n+\n+/* Check the link status of all ports in up to 9s, and print them finally */\n+static void\n+check_all_ports_link_status(uint32_t port_mask)\n+{\n+#define CHECK_INTERVAL 100 /* 100ms */\n+#define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */\n+\tuint16_t portid;\n+\tuint8_t count, all_ports_up, print_flag = 0;\n+\tstruct rte_eth_link link;\n+\tint ret;\n+\n+\tprintf(\"\\nChecking link status\");\n+\tfflush(stdout);\n+\tfor (count = 0; count <= MAX_CHECK_TIME; count++) {\n+\t\tif (force_quit)\n+\t\t\treturn;\n+\t\tall_ports_up = 1;\n+\t\tRTE_ETH_FOREACH_DEV(portid) {\n+\t\t\tif (force_quit)\n+\t\t\t\treturn;\n+\t\t\tif ((port_mask & (1 << portid)) == 0)\n+\t\t\t\tcontinue;\n+\t\t\tmemset(&link, 0, sizeof(link));\n+\t\t\tret = rte_eth_link_get_nowait(portid, &link);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tall_ports_up = 0;\n+\t\t\t\tif (print_flag == 1)\n+\t\t\t\t\tprintf(\"Port %u link get failed: %s\\n\",\n+\t\t\t\t\t\tportid, rte_strerror(-ret));\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\t\t\t/* print link status if flag set */\n+\t\t\tif (print_flag == 1) {\n+\t\t\t\tif (link.link_status)\n+\t\t\t\t\tprintf(\n+\t\t\t\t\t\"Port%d Link Up. Speed %u Mbps -%s\\n\",\n+\t\t\t\t\t\tportid, link.link_speed,\n+\t\t\t\t(link.link_duplex == ETH_LINK_FULL_DUPLEX) ?\n+\t\t\t\t\t(\"full-duplex\") : (\"half-duplex\"));\n+\t\t\t\telse\n+\t\t\t\t\tprintf(\"Port %d Link Down\\n\", portid);\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\t\t\t/* clear all_ports_up flag if any link down */\n+\t\t\tif (link.link_status == ETH_LINK_DOWN) {\n+\t\t\t\tall_ports_up = 0;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\t\t/* after finally printing all link status, get out */\n+\t\tif (print_flag == 1)\n+\t\t\tbreak;\n+\n+\t\tif (all_ports_up == 0) {\n+\t\t\tprintf(\".\");\n+\t\t\tfflush(stdout);\n+\t\t\trte_delay_ms(CHECK_INTERVAL);\n+\t\t}\n+\n+\t\t/* set the print_flag if all ports up or timeout */\n+\t\tif (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) {\n+\t\t\tprint_flag = 1;\n+\t\t\tprintf(\"done\\n\");\n+\t\t}\n+\t}\n+}\n+\n+static void\n+signal_handler(int signum)\n+{\n+\tif (signum == SIGINT || signum == SIGTERM) {\n+\t\tprintf(\"\\n\\nSignal %d received, preparing to exit...\\n\",\n+\t\t\t\tsignum);\n+\t\tforce_quit = true;\n+\t}\n+}\n+\n+static int\n+prepare_ptype_parser(uint16_t portid, uint16_t queueid)\n+{\n+\tif (parse_ptype) {\n+\t\tprintf(\"Port %d: softly parse packet type info\\n\", portid);\n+\t\tif (rte_eth_add_rx_callback(portid, queueid,\n+\t\t\t\t\t    l3fwd_lkp.cb_parse_ptype,\n+\t\t\t\t\t    NULL))\n+\t\t\treturn 1;\n+\n+\t\tprintf(\"Failed to add rx callback: port=%d\\n\", portid);\n+\t\treturn 0;\n+\t}\n+\n+\tif (l3fwd_lkp.check_ptype(portid))\n+\t\treturn 1;\n+\n+\tprintf(\"port %d cannot parse packet type, please add --%s\\n\",\n+\t       portid, CMD_LINE_OPT_PARSE_PTYPE);\n+\treturn 0;\n+}\n+\n+static void\n+l3fwd_poll_resource_setup(void)\n+{\n+\tuint8_t nb_rx_queue, queue, socketid;\n+\tstruct rte_eth_dev_info dev_info;\n+\tuint32_t n_tx_queue, nb_lcores, nb_regex_queue;\n+\tstruct rte_eth_txconf *txconf;\n+\tstruct lcore_conf *qconf;\n+\tuint16_t queueid, portid;\n+\tunsigned int nb_ports;\n+\tunsigned int lcore_id, i;\n+\tint ret;\n+\n+\tif (check_lcore_params() < 0)\n+\t\trte_exit(EXIT_FAILURE, \"check_lcore_params failed\\n\");\n+\n+\tret = init_lcore_rx_queues();\n+\tif (ret < 0)\n+\t\trte_exit(EXIT_FAILURE, \"init_lcore_rx_queues failed\\n\");\n+\n+\tnb_ports = rte_eth_dev_count_avail();\n+\n+\tif (check_port_config() < 0)\n+\t\trte_exit(EXIT_FAILURE, \"check_port_config failed\\n\");\n+\n+\tnb_lcores = rte_lcore_count();\n+\n+\t/* initialize all ports */\n+\tRTE_ETH_FOREACH_DEV(portid) {\n+\t\tstruct rte_eth_conf local_port_conf = port_conf;\n+\n+\t\t/* skip ports that are not enabled */\n+\t\tif ((enabled_port_mask & (1 << portid)) == 0) {\n+\t\t\tprintf(\"\\nSkipping disabled port %d\\n\", portid);\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\t/* init port */\n+\t\tprintf(\"Initializing port %d ... \", portid);\n+\t\tfflush(stdout);\n+\n+\t\tnb_rx_queue = get_port_n_rx_queues(portid);\n+\t\tif (nb_rx_queue > 1)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\"only one rx queue per (port %u) is supported (queue num %u)\\n\",\n+\t\t\t\tportid, nb_rx_queue);\n+\t\tn_tx_queue = nb_lcores;\n+\t\tif (n_tx_queue > MAX_TX_QUEUE_PER_PORT)\n+\t\t\tn_tx_queue = MAX_TX_QUEUE_PER_PORT;\n+\t\tprintf(\"Creating queues: nb_rxq=%d nb_txq=%u... \",\n+\t\t\tnb_rx_queue, (uint32_t)n_tx_queue);\n+\n+\t\tret = rte_eth_dev_info_get(portid, &dev_info);\n+\t\tif (ret != 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\"Error during getting device (port %u) info: %s\\n\",\n+\t\t\t\tportid, strerror(-ret));\n+\n+\t\tif (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)\n+\t\t\tlocal_port_conf.txmode.offloads |=\n+\t\t\t\tDEV_TX_OFFLOAD_MBUF_FAST_FREE;\n+\n+\t\tlocal_port_conf.rx_adv_conf.rss_conf.rss_hf &=\n+\t\t\tdev_info.flow_type_rss_offloads;\n+\t\tif (local_port_conf.rx_adv_conf.rss_conf.rss_hf !=\n+\t\t\t\tport_conf.rx_adv_conf.rss_conf.rss_hf) {\n+\t\t\tprintf(\"Port %u modified RSS hash function based on hardware support,\"\n+\t\t\t\t\"requested:%#\"PRIx64\" configured:%#\"PRIx64\"\\n\",\n+\t\t\t\tportid,\n+\t\t\t\tport_conf.rx_adv_conf.rss_conf.rss_hf,\n+\t\t\t\tlocal_port_conf.rx_adv_conf.rss_conf.rss_hf);\n+\t\t}\n+\n+\t\tret = rte_eth_dev_configure(portid, nb_rx_queue,\n+\t\t\t\t\t(uint16_t)n_tx_queue, &local_port_conf);\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\"Cannot configure device: err=%d, port=%d\\n\",\n+\t\t\t\tret, portid);\n+\n+\t\tret = rte_eth_dev_adjust_nb_rx_tx_desc(portid, &nb_rxd,\n+\t\t\t\t\t\t       &nb_txd);\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t \"Cannot adjust number of descriptors: err=%d, \"\n+\t\t\t\t \"port=%d\\n\", ret, portid);\n+\n+\t\tret = rte_eth_macaddr_get(portid, &ports_eth_addr[portid]);\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t \"Cannot get MAC address: err=%d, port=%d\\n\",\n+\t\t\t\t ret, portid);\n+\n+\t\tprint_ethaddr(\" Address:\", &ports_eth_addr[portid]);\n+\t\tprintf(\", \");\n+\t\tprint_ethaddr(\"Destination:\",\n+\t\t\t(const struct rte_ether_addr *)&dest_eth_addr[portid]);\n+\t\tprintf(\", \");\n+\n+\t\t/*\n+\t\t * prepare src MACs for each port.\n+\t\t */\n+\t\trte_ether_addr_copy(&ports_eth_addr[portid],\n+\t\t\t(struct rte_ether_addr *)(val_eth + portid) + 1);\n+\n+\t\t/* init memory */\n+\t\tif (!per_port_pool) {\n+\t\t\t/* portid = 0; this is *not* signifying the first port,\n+\t\t\t * rather, it signifies that portid is ignored.\n+\t\t\t */\n+\t\t\tret = init_mem(0, NB_MBUF(nb_ports));\n+\t\t} else {\n+\t\t\tret = init_mem(portid, NB_MBUF(1));\n+\t\t}\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE, \"init_mem failed\\n\");\n+\n+\t\t/* init one TX queue per couple (lcore,port) */\n+\t\tqueueid = 0;\n+\t\tfor (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {\n+\t\t\tif (rte_lcore_is_enabled(lcore_id) == 0)\n+\t\t\t\tcontinue;\n+\n+\t\t\tif (numa_on)\n+\t\t\t\tsocketid =\n+\t\t\t\t(uint8_t)rte_lcore_to_socket_id(lcore_id);\n+\t\t\telse\n+\t\t\t\tsocketid = 0;\n+\n+\t\t\tprintf(\"txq=%u,%d,%d \", lcore_id, queueid, socketid);\n+\t\t\tfflush(stdout);\n+\n+\t\t\ttxconf = &dev_info.default_txconf;\n+\t\t\ttxconf->offloads = local_port_conf.txmode.offloads;\n+\t\t\tret = rte_eth_tx_queue_setup(portid, queueid, nb_txd,\n+\t\t\t\t\t\t     socketid, txconf);\n+\t\t\tif (ret < 0)\n+\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\t\"rte_eth_tx_queue_setup: err=%d, \"\n+\t\t\t\t\t\"port=%d\\n\", ret, portid);\n+\n+\t\t\tqconf = &lcore_conf[lcore_id];\n+\t\t\tqconf->tx_queue_id[portid] = queueid;\n+\t\t\tqueueid++;\n+\n+\t\t\tqconf->tx_port_id[qconf->n_tx_port] = portid;\n+\t\t\tqconf->n_tx_port++;\n+\t\t}\n+\t\tprintf(\"\\n\");\n+\t}\n+\n+\tfor (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {\n+\t\tif (rte_lcore_is_enabled(lcore_id) == 0)\n+\t\t\tcontinue;\n+\t\tqconf = &lcore_conf[lcore_id];\n+\t\tprintf(\"\\nInitializing rx queues on lcore %u ... \", lcore_id);\n+\t\tfflush(stdout);\n+\t\t/* init RX queues */\n+\t\tfor (queue = 0; queue < qconf->n_rx_queue; ++queue) {\n+\t\t\tstruct rte_eth_rxconf rxq_conf;\n+\n+\t\t\tportid = qconf->rx_queue_list[queue].port_id;\n+\t\t\tqueueid = qconf->rx_queue_list[queue].queue_id;\n+\n+\t\t\tif (numa_on)\n+\t\t\t\tsocketid =\n+\t\t\t\t(uint8_t)rte_lcore_to_socket_id(lcore_id);\n+\t\t\telse\n+\t\t\t\tsocketid = 0;\n+\n+\t\t\tprintf(\"rxq=%d,%d,%d \", portid, queueid, socketid);\n+\t\t\tfflush(stdout);\n+\n+\t\t\tret = rte_eth_dev_info_get(portid, &dev_info);\n+\t\t\tif (ret != 0)\n+\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\t\"Error during getting device (port %u) info: %s\\n\",\n+\t\t\t\t\tportid, strerror(-ret));\n+\n+\t\t\trxq_conf = dev_info.default_rxconf;\n+\t\t\trxq_conf.offloads = port_conf.rxmode.offloads;\n+\t\t\tif (!per_port_pool)\n+\t\t\t\tret = rte_eth_rx_queue_setup(portid, queueid,\n+\t\t\t\t\t\tnb_rxd, socketid,\n+\t\t\t\t\t\t&rxq_conf,\n+\t\t\t\t\t\tpktmbuf_pool[0][socketid]);\n+\t\t\telse\n+\t\t\t\tret = rte_eth_rx_queue_setup(portid, queueid,\n+\t\t\t\t\t\tnb_rxd, socketid,\n+\t\t\t\t\t\t&rxq_conf,\n+\t\t\t\t\t\tpktmbuf_pool[portid][socketid]);\n+\t\t\tif (ret < 0)\n+\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\"rte_eth_rx_queue_setup: err=%d, port=%d\\n\",\n+\t\t\t\tret, portid);\n+\t\t}\n+\t}\n+\tfor (i = 0; i < RTE_MAX_REGEXDEV_DEVS; i++) {\n+\t\tif (rte_regexdev_is_valid_dev(i) == 0)\n+\t\t\tcontinue;\n+\t\tnb_regex_queue = get_regex_dev_n_queues(i);\n+\t\tif (nb_regex_queue) {\n+\t\t\tret = regex_dev_init(i, nb_regex_queue);\n+\t\t\tif (ret != 0)\n+\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\t\"regex_dev_init: err=%s\\n\",\n+\t\t\t\t\trte_strerror(-ret));\n+\t\t}\n+\t}\n+}\n+\n+int\n+main(int argc, char **argv)\n+{\n+\tstruct lcore_conf *qconf;\n+\tuint16_t queueid, portid;\n+\tunsigned int lcore_id, i;\n+\tuint8_t queue, regex_nb_q;\n+\tint ret;\n+\n+\t/* init EAL */\n+\tret = rte_eal_init(argc, argv);\n+\tif (ret < 0)\n+\t\trte_exit(EXIT_FAILURE, \"Invalid EAL parameters\\n\");\n+\targc -= ret;\n+\targv += ret;\n+\n+\tforce_quit = false;\n+\tsignal(SIGINT, signal_handler);\n+\tsignal(SIGTERM, signal_handler);\n+\n+\t/* pre-init dst MACs for all ports to 02:00:00:00:00:xx */\n+\tfor (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) {\n+\t\tdest_eth_addr[portid] =\n+\t\t\tRTE_ETHER_LOCAL_ADMIN_ADDR + ((uint64_t)portid << 40);\n+\t\t*(uint64_t *)(val_eth + portid) = dest_eth_addr[portid];\n+\t}\n+\n+\t/* parse application arguments (after the EAL ones) */\n+\tret = parse_args(argc, argv);\n+\tif (ret < 0)\n+\t\trte_exit(EXIT_FAILURE, \"Invalid L3FWD parameters\\n\");\n+\n+\t/* Setup function pointers for lookup method. */\n+\tsetup_l3fwd_lookup_tables();\n+\n+\tl3fwd_poll_resource_setup();\n+\n+\t/* start ports */\n+\tRTE_ETH_FOREACH_DEV(portid) {\n+\t\tif ((enabled_port_mask & (1 << portid)) == 0)\n+\t\t\tcontinue;\n+\n+\t\t/* Start device */\n+\t\tret = rte_eth_dev_start(portid);\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\"rte_eth_dev_start: err=%d, port=%d\\n\",\n+\t\t\t\tret, portid);\n+\n+\t\t/*\n+\t\t * If enabled, put device in promiscuous mode.\n+\t\t * This allows IO forwarding mode to forward packets\n+\t\t * to itself through 2 cross-connected  ports of the\n+\t\t * target machine.\n+\t\t */\n+\t\tif (promiscuous_on) {\n+\t\t\tret = rte_eth_promiscuous_enable(portid);\n+\t\t\tif (ret != 0)\n+\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\t\"rte_eth_promiscuous_enable: err=%s, port=%u\\n\",\n+\t\t\t\t\trte_strerror(-ret), portid);\n+\t\t}\n+\t}\n+\n+\tprintf(\"\\n\");\n+\n+\tfor (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {\n+\t\tif (rte_lcore_is_enabled(lcore_id) == 0)\n+\t\t\tcontinue;\n+\t\tqconf = &lcore_conf[lcore_id];\n+\t\tfor (queue = 0; queue < qconf->n_rx_queue; ++queue) {\n+\t\t\tportid = qconf->rx_queue_list[queue].port_id;\n+\t\t\tqueueid = qconf->rx_queue_list[queue].queue_id;\n+\t\t\tif (prepare_ptype_parser(portid, queueid) == 0)\n+\t\t\t\trte_exit(EXIT_FAILURE, \"ptype check fails\\n\");\n+\t\t}\n+\n+\t\tret = regex_lcore_init(lcore_id, qconf->regex_dev_id,\n+\t\t\t\tqconf->regex_qp_id);\n+\t\tif (ret != 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\"regex_lcore_init: err=%s, dev_id=%u, queueid=%u\\n\",\n+\t\t\t\trte_strerror(-ret), qconf->regex_dev_id,\n+\t\t\t\tqconf->regex_qp_id);\n+\t}\n+\n+\tcheck_all_ports_link_status(enabled_port_mask);\n+\n+\tret = 0;\n+\t/* launch per-lcore init on every lcore */\n+\trte_eal_mp_remote_launch(l3fwd_lkp.main_loop, NULL, CALL_MASTER);\n+\n+\trte_eal_mp_wait_lcore();\n+\n+\tRTE_ETH_FOREACH_DEV(portid) {\n+\t\tif ((enabled_port_mask & (1 << portid)) == 0)\n+\t\t\tcontinue;\n+\t\tprintf(\"Closing port %d...\", portid);\n+\t\trte_eth_dev_stop(portid);\n+\t\trte_eth_dev_close(portid);\n+\t\tprintf(\" Done\\n\");\n+\t}\n+\n+\tfor (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {\n+\t\tif (rte_lcore_is_enabled(lcore_id) == 0)\n+\t\t\tcontinue;\n+\t\tregex_lcore_uninit(lcore_id);\n+\t\trte_free(lcore_conf[lcore_id].pkts_burst);\n+\t}\n+\n+\tfor (i = 0; i < RTE_MAX_REGEXDEV_DEVS; i++) {\n+\t\tif (rte_regexdev_is_valid_dev(i) == 0)\n+\t\t\tcontinue;\n+\t\tregex_nb_q = get_regex_dev_n_queues(i);\n+\t\tif (regex_nb_q) {\n+\t\t\tprintf(\"Closing regegdev %d...\", i);\n+\t\t\tregex_dev_uninit(i);\n+\t\t\tprintf(\" Done\\n\");\n+\t\t}\n+\t}\n+\tregex_mem_free();\n+\n+\tprintf(\"Bye...\\n\");\n+\n+\treturn ret;\n+}\ndiff --git a/examples/l3fwd-regex/meson.build b/examples/l3fwd-regex/meson.build\nnew file mode 100644\nindex 000000000..a5f602510\n--- /dev/null\n+++ b/examples/l3fwd-regex/meson.build\n@@ -0,0 +1,10 @@\n+# SPDX-License-Identifier: BSD-3-Clause\n+# Copyright(C) 2020 Marvell International Ltd.\n+\n+# meson file, for building this example as part of a main DPDK build.\n+\n+allow_experimental_apis = true\n+deps += ['lpm', 'regexdev']\n+sources = files(\n+\t'l3fwd_lpm.c', 'l3fwd_regex.c', 'main.c'\n+)\ndiff --git a/examples/meson.build b/examples/meson.build\nindex eb13e8210..b61acd4bc 100644\n--- a/examples/meson.build\n+++ b/examples/meson.build\n@@ -23,7 +23,7 @@ all_examples = [\n \t'l2fwd', 'l2fwd-cat', 'l2fwd-event',\n \t'l2fwd-crypto', 'l2fwd-jobstats',\n \t'l2fwd-keepalive', 'l3fwd',\n-\t'l3fwd-acl', 'l3fwd-power', 'l3fwd-graph',\n+\t'l3fwd-acl', 'l3fwd-power', 'l3fwd-graph', 'l3fwd-regex',\n \t'link_status_interrupt',\n \t'multi_process/client_server_mp/mp_client',\n \t'multi_process/client_server_mp/mp_server',\n",
    "prefixes": [
        "v2",
        "1/2"
    ]
}