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GET /api/patches/76657/?format=api
{ "id": 76657, "url": "http://patches.dpdk.org/api/patches/76657/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200907090825.1761-6-huwei013@chinasoftinc.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200907090825.1761-6-huwei013@chinasoftinc.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200907090825.1761-6-huwei013@chinasoftinc.com", "date": "2020-09-07T09:08:22", "name": "[5/8] net/hns3: add vector Tx burst with NEON instructions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "004542724ef3af6637ce0f6ea4d3feb4f2039bd0", "submitter": { "id": 1537, "url": "http://patches.dpdk.org/api/people/1537/?format=api", "name": "Wei Hu (Xavier)", "email": "huwei013@chinasoftinc.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200907090825.1761-6-huwei013@chinasoftinc.com/mbox/", "series": [ { "id": 11986, "url": "http://patches.dpdk.org/api/series/11986/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11986", "date": "2020-09-07T09:08:17", "name": "net/hns3: updates for Rx Tx", "version": 1, "mbox": "http://patches.dpdk.org/series/11986/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/76657/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/76657/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 28F5CA04B9;\n\tMon, 7 Sep 2020 11:09:53 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BB3711C120;\n\tMon, 7 Sep 2020 11:09:20 +0200 (CEST)", "from mail.chinasoftinc.com (unknown [114.113.233.8])\n by dpdk.org (Postfix) with ESMTP id 75BF61BF8A\n for <dev@dpdk.org>; Mon, 7 Sep 2020 11:09:18 +0200 (CEST)", "from localhost.localdomain (65.49.108.226) by INCCAS002.ito.icss\n (10.168.0.60) with Microsoft SMTP Server id 14.3.487.0; Mon, 7 Sep 2020\n 17:09:11 +0800" ], "From": "\"Wei Hu (Xavier)\" <huwei013@chinasoftinc.com>", "To": "<dev@dpdk.org>", "CC": "<xavier.huwei@huawei.com>", "Date": "Mon, 7 Sep 2020 17:08:22 +0800", "Message-ID": "<20200907090825.1761-6-huwei013@chinasoftinc.com>", "X-Mailer": "git-send-email 2.9.5", "In-Reply-To": "<20200907090825.1761-1-huwei013@chinasoftinc.com>", "References": "<20200907090825.1761-1-huwei013@chinasoftinc.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[65.49.108.226]", "Subject": "[dpdk-dev] [PATCH 5/8] net/hns3: add vector Tx burst with NEON\n\tinstructions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: \"Wei Hu (Xavier)\" <xavier.huwei@huawei.com>\n\nThis patch adds NEON vector instructions to optimize Tx burst process.\n\nSigned-off-by: Huisong Li <lihuisong@huawei.com>\nSigned-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\n---\n config/common_base | 1 +\n config/common_linux | 1 +\n drivers/net/hns3/Makefile | 5 +++\n drivers/net/hns3/hns3_ethdev.c | 2 +\n drivers/net/hns3/hns3_ethdev.h | 2 +\n drivers/net/hns3/hns3_ethdev_vf.c | 2 +\n drivers/net/hns3/hns3_rxtx.c | 33 ++++++++++++++\n drivers/net/hns3/hns3_rxtx.h | 20 ++++++++-\n drivers/net/hns3/hns3_rxtx_vec.c | 47 ++++++++++++++++++++\n drivers/net/hns3/hns3_rxtx_vec.h | 57 ++++++++++++++++++++++++\n drivers/net/hns3/hns3_rxtx_vec_neon.h | 81 +++++++++++++++++++++++++++++++++++\n drivers/net/hns3/meson.build | 4 ++\n 12 files changed, 254 insertions(+), 1 deletion(-)\n create mode 100644 drivers/net/hns3/hns3_rxtx_vec.c\n create mode 100644 drivers/net/hns3/hns3_rxtx_vec.h\n create mode 100644 drivers/net/hns3/hns3_rxtx_vec_neon.h", "diff": "diff --git a/config/common_base b/config/common_base\nindex fbf0ee7..af1dea6 100644\n--- a/config/common_base\n+++ b/config/common_base\n@@ -292,6 +292,7 @@ CONFIG_RTE_LIBRTE_HINIC_PMD=n\n # Compile burst-oriented HNS3 PMD driver\n #\n CONFIG_RTE_LIBRTE_HNS3_PMD=n\n+CONFIG_RTE_LIBRTE_HNS3_INC_VECTOR=n\n \n #\n # Compile Pensando IONIC PMD driver\ndiff --git a/config/common_linux b/config/common_linux\nindex 8168106..e88a404 100644\n--- a/config/common_linux\n+++ b/config/common_linux\n@@ -66,3 +66,4 @@ CONFIG_RTE_LIBRTE_HINIC_PMD=y\n # Hisilicon HNS3 PMD driver\n #\n CONFIG_RTE_LIBRTE_HNS3_PMD=y\n+CONFIG_RTE_LIBRTE_HNS3_INC_VECTOR=y\ndiff --git a/drivers/net/hns3/Makefile b/drivers/net/hns3/Makefile\nindex d7798a4..d08d8fa 100644\n--- a/drivers/net/hns3/Makefile\n+++ b/drivers/net/hns3/Makefile\n@@ -30,6 +30,11 @@ SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_ethdev_vf.c\n SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_cmd.c\n SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_mbx.c\n SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rxtx.c\n+\n+ifeq ($(CONFIG_RTE_ARCH_ARM64),y)\n+SRCS-$(CONFIG_RTE_LIBRTE_HNS3_INC_VECTOR) += hns3_rxtx_vec.c\n+endif\n+\n SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_rss.c\n SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_flow.c\n SRCS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += hns3_fdir.c\ndiff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c\nindex 8701994..68239f5 100644\n--- a/drivers/net/hns3/hns3_ethdev.c\n+++ b/drivers/net/hns3/hns3_ethdev.c\n@@ -2353,6 +2353,8 @@ hns3_dev_configure(struct rte_eth_dev *dev)\n \n \thns->rx_simple_allowed = true;\n \thns->tx_simple_allowed = true;\n+\thns->tx_vec_allowed = true;\n+\n \thns3_init_rx_ptype_tble(dev);\n \thw->adapter_state = HNS3_NIC_CONFIGURED;\n \ndiff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h\nindex ef85034..098b6ce 100644\n--- a/drivers/net/hns3/hns3_ethdev.h\n+++ b/drivers/net/hns3/hns3_ethdev.h\n@@ -644,6 +644,8 @@ struct hns3_adapter {\n \n \tbool rx_simple_allowed;\n \tbool tx_simple_allowed;\n+\tbool tx_vec_allowed;\n+\n \tstruct hns3_ptype_table ptype_tbl __rte_cache_min_aligned;\n };\n \ndiff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c\nindex 915b896..f3e6aea 100644\n--- a/drivers/net/hns3/hns3_ethdev_vf.c\n+++ b/drivers/net/hns3/hns3_ethdev_vf.c\n@@ -823,6 +823,8 @@ hns3vf_dev_configure(struct rte_eth_dev *dev)\n \n \thns->rx_simple_allowed = true;\n \thns->tx_simple_allowed = true;\n+\thns->tx_vec_allowed = true;\n+\n \thns3_init_rx_ptype_tble(dev);\n \n \thw->adapter_state = HNS3_NIC_CONFIGURED;\ndiff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c\nindex 08a3dcd..a537fbe 100644\n--- a/drivers/net/hns3/hns3_rxtx.c\n+++ b/drivers/net/hns3/hns3_rxtx.c\n@@ -95,6 +95,8 @@ hns3_tx_queue_release(void *queue)\n \t\t\trte_memzone_free(txq->mz);\n \t\tif (txq->sw_ring)\n \t\t\trte_free(txq->sw_ring);\n+\t\tif (txq->free)\n+\t\t\trte_free(txq->free);\n \t\trte_free(txq);\n \t}\n }\n@@ -1020,6 +1022,7 @@ hns3_fake_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx,\n \n \t/* Don't need alloc sw_ring, because upper applications don't use it */\n \ttxq->sw_ring = NULL;\n+\ttxq->free = NULL;\n \n \ttxq->hns = hns;\n \ttxq->tx_deferred_start = false;\n@@ -2052,6 +2055,15 @@ hns3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc,\n \ttxq->tx_bd_ready = txq->nb_tx_desc - 1;\n \ttxq->tx_free_thresh = tx_free_thresh;\n \ttxq->tx_rs_thresh = tx_rs_thresh;\n+\ttxq->free = rte_zmalloc_socket(\"hns3 TX mbuf free array\",\n+\t\t\t\tsizeof(struct rte_mbuf *) * txq->tx_rs_thresh,\n+\t\t\t\tRTE_CACHE_LINE_SIZE, socket_id);\n+\tif (!txq->free) {\n+\t\thns3_err(hw, \"failed to allocate tx mbuf free array!\");\n+\t\thns3_tx_queue_release(txq);\n+\t\treturn -ENOMEM;\n+\t}\n+\n \ttxq->port_id = dev->data->port_id;\n \ttxq->pvid_state = hw->port_base_vlan_cfg.state;\n \ttxq->configured = true;\n@@ -3105,6 +3117,20 @@ hns3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \treturn nb_tx;\n }\n \n+int __rte_weak\n+hns3_tx_check_vec_support(__rte_unused struct rte_eth_dev *dev)\n+{\n+\treturn -ENOTSUP;\n+}\n+\n+uint16_t __rte_weak\n+hns3_xmit_pkts_vec(__rte_unused void *tx_queue,\n+\t\t __rte_unused struct rte_mbuf **tx_pkts,\n+\t\t __rte_unused uint16_t nb_pkts)\n+{\n+\treturn 0;\n+}\n+\n int\n hns3_tx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,\n \t\t struct rte_eth_burst_mode *mode)\n@@ -3116,6 +3142,8 @@ hns3_tx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,\n \t\tinfo = \"Scalar Simple\";\n \telse if (pkt_burst == hns3_xmit_pkts)\n \t\tinfo = \"Scalar\";\n+\telse if (pkt_burst == hns3_xmit_pkts_vec)\n+\t\tinfo = \"Vector Neon\";\n \n \tif (info == NULL)\n \t\treturn -EINVAL;\n@@ -3131,6 +3159,11 @@ hns3_get_tx_function(struct rte_eth_dev *dev, eth_tx_prep_t *prep)\n \tuint64_t offloads = dev->data->dev_conf.txmode.offloads;\n \tstruct hns3_adapter *hns = dev->data->dev_private;\n \n+\tif (hns->tx_vec_allowed && hns3_tx_check_vec_support(dev) == 0) {\n+\t\t*prep = NULL;\n+\t\treturn hns3_xmit_pkts_vec;\n+\t}\n+\n \tif (hns->tx_simple_allowed &&\n \t offloads == (offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)) {\n \t\t*prep = NULL;\ndiff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h\nindex 9933494..c5a510b 100644\n--- a/drivers/net/hns3/hns3_rxtx.h\n+++ b/drivers/net/hns3/hns3_rxtx.h\n@@ -17,6 +17,10 @@\n #define HNS3_DEFAULT_TX_RS_THRESH\t32\n #define HNS3_TX_FAST_FREE_AHEAD\t\t64\n \n+#define HNS3_UINT8_BIT\t\t\t8\n+#define HNS3_UINT16_BIT\t\t\t16\n+#define HNS3_UINT32_BIT\t\t\t32\n+\n #define HNS3_512_BD_BUF_SIZE\t512\n #define HNS3_1K_BD_BUF_SIZE\t1024\n #define HNS3_2K_BD_BUF_SIZE\t2048\n@@ -132,6 +136,13 @@\n #define HNS3_L3_LEN_UNIT\t\t\t2UL\n #define HNS3_L4_LEN_UNIT\t\t\t2UL\n \n+#define HNS3_TXD_DEFAULT_BDTYPE\t\t0\n+#define HNS3_TXD_VLD_CMD\t\t(0x1 << HNS3_TXD_VLD_B)\n+#define HNS3_TXD_FE_CMD\t\t\t(0x1 << HNS3_TXD_FE_B)\n+#define HNS3_TXD_DEFAULT_VLD_FE_BDTYPE\t\t\\\n+\t\t(HNS3_TXD_VLD_CMD | HNS3_TXD_FE_CMD | HNS3_TXD_DEFAULT_BDTYPE)\n+#define HNS3_TXD_SEND_SIZE_SHIFT\t16\n+\n enum hns3_pkt_l2t_type {\n \tHNS3_L2_TYPE_UNICAST,\n \tHNS3_L2_TYPE_MULTICAST,\n@@ -317,9 +328,13 @@ struct hns3_tx_queue {\n \t * all descriptors are cleared. and then free all mbufs in the batch.\n \t * - tx_rs_thresh\n \t * Number of mbufs released at a time.\n-\n+\t *\n+\t * - free\n+\t * Tx mbuf free array used for preserving temporarily address of mbuf\n+\t * released back to mempool, when releasing mbuf in batches.\n \t */\n \tuint16_t tx_rs_thresh;\n+\tstruct rte_mbuf **free;\n \n \t/*\n \t * port based vlan configuration state.\n@@ -558,6 +573,8 @@ uint16_t hns3_xmit_pkts_simple(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t uint16_t nb_pkts);\n uint16_t hns3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\tuint16_t nb_pkts);\n+uint16_t hns3_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t\t\t\t\t\tuint16_t nb_pkts);\n int hns3_tx_burst_mode_get(struct rte_eth_dev *dev,\n \t\t\t __rte_unused uint16_t queue_id,\n \t\t\t struct rte_eth_burst_mode *mode);\n@@ -577,6 +594,7 @@ int hns3_restore_gro_conf(struct hns3_hw *hw);\n void hns3_update_all_queues_pvid_state(struct hns3_hw *hw);\n void hns3_rx_scattered_reset(struct rte_eth_dev *dev);\n void hns3_rx_scattered_calc(struct rte_eth_dev *dev);\n+int hns3_tx_check_vec_support(struct rte_eth_dev *dev);\n void hns3_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \t\t struct rte_eth_rxq_info *qinfo);\n void hns3_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\ndiff --git a/drivers/net/hns3/hns3_rxtx_vec.c b/drivers/net/hns3/hns3_rxtx_vec.c\nnew file mode 100644\nindex 0000000..1154b6f\n--- /dev/null\n+++ b/drivers/net/hns3/hns3_rxtx_vec.c\n@@ -0,0 +1,47 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020 Hisilicon Limited.\n+ */\n+\n+#include <rte_io.h>\n+#include <rte_ethdev_driver.h>\n+\n+#include \"hns3_ethdev.h\"\n+#include \"hns3_rxtx.h\"\n+#include \"hns3_rxtx_vec.h\"\n+\n+#if defined RTE_ARCH_ARM64\n+#include \"hns3_rxtx_vec_neon.h\"\n+#endif\n+\n+int\n+hns3_tx_check_vec_support(struct rte_eth_dev *dev)\n+{\n+\tstruct rte_eth_txmode *txmode = &dev->data->dev_conf.txmode;\n+\n+\t/* Only support DEV_TX_OFFLOAD_MBUF_FAST_FREE */\n+\tif (txmode->offloads != DEV_TX_OFFLOAD_MBUF_FAST_FREE)\n+\t\treturn -ENOTSUP;\n+\n+\treturn 0;\n+}\n+\n+uint16_t\n+hns3_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n+{\n+\tstruct hns3_tx_queue *txq = (struct hns3_tx_queue *)tx_queue;\n+\tuint16_t nb_tx = 0;\n+\n+\twhile (nb_pkts) {\n+\t\tuint16_t ret, new_burst;\n+\n+\t\tnew_burst = RTE_MIN(nb_pkts, txq->tx_rs_thresh);\n+\t\tret = hns3_xmit_fixed_burst_vec(tx_queue, &tx_pkts[nb_tx],\n+\t\t\t\t\t\tnew_burst);\n+\t\tnb_tx += ret;\n+\t\tnb_pkts -= ret;\n+\t\tif (ret < new_burst)\n+\t\t\tbreak;\n+\t}\n+\n+\treturn nb_tx;\n+}\ndiff --git a/drivers/net/hns3/hns3_rxtx_vec.h b/drivers/net/hns3/hns3_rxtx_vec.h\nnew file mode 100644\nindex 0000000..90679bf\n--- /dev/null\n+++ b/drivers/net/hns3/hns3_rxtx_vec.h\n@@ -0,0 +1,57 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020 Hisilicon Limited.\n+ */\n+\n+#ifndef _HNS3_RXTX_VEC_H_\n+#define _HNS3_RXTX_VEC_H_\n+\n+#include \"hns3_rxtx.h\"\n+#include \"hns3_ethdev.h\"\n+\n+static inline void\n+hns3_tx_free_buffers(struct hns3_tx_queue *txq)\n+{\n+\tstruct rte_mbuf **free = txq->free;\n+\tstruct hns3_entry *tx_entry;\n+\tstruct hns3_desc *tx_desc;\n+\tstruct rte_mbuf *m;\n+\tint nb_free = 0;\n+\tint i;\n+\n+\t/*\n+\t * All mbufs can be released only when the VLD bits of all\n+\t * descriptors in a batch are cleared.\n+\t */\n+\ttx_desc = &txq->tx_ring[txq->next_to_clean];\n+\tfor (i = 0; i < txq->tx_rs_thresh; i++, tx_desc++) {\n+\t\tif (tx_desc->tx.tp_fe_sc_vld_ra_ri &\n+\t\t\t\trte_le_to_cpu_16(BIT(HNS3_TXD_VLD_B)))\n+\t\t\treturn;\n+\t}\n+\n+\ttx_entry = &txq->sw_ring[txq->next_to_clean];\n+\tfor (i = 0; i < txq->tx_rs_thresh; i++, tx_entry++) {\n+\t\tm = rte_pktmbuf_prefree_seg(tx_entry->mbuf);\n+\t\ttx_entry->mbuf = NULL;\n+\n+\t\tif (m == NULL)\n+\t\t\tcontinue;\n+\n+\t\tif (nb_free && m->pool != free[0]->pool) {\n+\t\t\trte_mempool_put_bulk(free[0]->pool, (void **)free,\n+\t\t\t\t\t nb_free);\n+\t\t\tnb_free = 0;\n+\t\t}\n+\t\tfree[nb_free++] = m;\n+\t}\n+\n+\tif (nb_free)\n+\t\trte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);\n+\n+\t/* Update numbers of available descriptor due to buffer freed */\n+\ttxq->tx_bd_ready += txq->tx_rs_thresh;\n+\ttxq->next_to_clean += txq->tx_rs_thresh;\n+\tif (txq->next_to_clean >= txq->nb_tx_desc)\n+\t\ttxq->next_to_clean = 0;\n+}\n+#endif /* _HNS3_RXTX_VEC_H_ */\ndiff --git a/drivers/net/hns3/hns3_rxtx_vec_neon.h b/drivers/net/hns3/hns3_rxtx_vec_neon.h\nnew file mode 100644\nindex 0000000..2bd2b35\n--- /dev/null\n+++ b/drivers/net/hns3/hns3_rxtx_vec_neon.h\n@@ -0,0 +1,81 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020 Hisilicon Limited.\n+ */\n+\n+#ifndef _HNS3_RXTX_VEC_NEON_H_\n+#define _HNS3_RXTX_VEC_NEON_H_\n+\n+#include <arm_neon.h>\n+\n+#pragma GCC diagnostic ignored \"-Wcast-qual\"\n+\n+static inline void\n+hns3_vec_tx(volatile struct hns3_desc *desc, struct rte_mbuf *pkt)\n+{\n+\tuint64x2_t val1 = { pkt->buf_iova + pkt->data_off,\n+\t\t((uint64_t)pkt->data_len) << HNS3_TXD_SEND_SIZE_SHIFT };\n+\tuint64x2_t val2 = { 0,\n+\t\t((uint64_t)HNS3_TXD_DEFAULT_VLD_FE_BDTYPE) << HNS3_UINT32_BIT };\n+\tvst1q_u64((uint64_t *)&desc->addr, val1);\n+\tvst1q_u64((uint64_t *)&desc->tx.outer_vlan_tag, val2);\n+}\n+\n+static uint16_t\n+hns3_xmit_fixed_burst_vec(void *__restrict tx_queue,\n+\t\t\t struct rte_mbuf **__restrict tx_pkts,\n+\t\t\t uint16_t nb_pkts)\n+{\n+\tstruct hns3_tx_queue *txq = (struct hns3_tx_queue *)tx_queue;\n+\tvolatile struct hns3_desc *tx_desc;\n+\tstruct hns3_entry *tx_entry;\n+\tuint16_t next_to_use;\n+\tuint16_t nb_commit;\n+\tuint16_t nb_tx;\n+\tuint16_t n, i;\n+\n+\tif (txq->tx_bd_ready < txq->tx_free_thresh)\n+\t\thns3_tx_free_buffers(txq);\n+\n+\tnb_commit = RTE_MIN(txq->tx_bd_ready, nb_pkts);\n+\tif (unlikely(nb_commit == 0)) {\n+\t\ttxq->queue_full_cnt++;\n+\t\treturn 0;\n+\t}\n+\tnb_tx = nb_commit;\n+\n+\tnext_to_use = txq->next_to_use;\n+\ttx_desc = &txq->tx_ring[next_to_use];\n+\ttx_entry = &txq->sw_ring[next_to_use];\n+\n+\t/*\n+\t * We need to deal with n descriptors first for better performance,\n+\t * if nb_commit is greater than the difference between txq->nb_tx_desc\n+\t * and next_to_use in sw_ring and tx_ring.\n+\t */\n+\tn = txq->nb_tx_desc - next_to_use;\n+\tif (nb_commit >= n) {\n+\t\tfor (i = 0; i < n; i++, tx_pkts++, tx_desc++) {\n+\t\t\thns3_vec_tx(tx_desc, *tx_pkts);\n+\t\t\ttx_entry[i].mbuf = *tx_pkts;\n+\t\t}\n+\n+\t\tnb_commit -= n;\n+\t\tnext_to_use = 0;\n+\t\ttx_desc = &txq->tx_ring[next_to_use];\n+\t\ttx_entry = &txq->sw_ring[next_to_use];\n+\t}\n+\n+\tfor (i = 0; i < nb_commit; i++, tx_pkts++, tx_desc++) {\n+\t\thns3_vec_tx(tx_desc, *tx_pkts);\n+\t\ttx_entry[i].mbuf = *tx_pkts;\n+\t}\n+\n+\tnext_to_use += nb_commit;\n+\ttxq->next_to_use = next_to_use;\n+\ttxq->tx_bd_ready -= nb_tx;\n+\n+\thns3_write_reg_opt(txq->io_tail_reg, nb_tx);\n+\n+\treturn nb_tx;\n+}\n+#endif /* _HNS3_RXTX_VEC_NEON_H_ */\ndiff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build\nindex e01e6ce..19aee71 100644\n--- a/drivers/net/hns3/meson.build\n+++ b/drivers/net/hns3/meson.build\n@@ -27,4 +27,8 @@ sources = files('hns3_cmd.c',\n \t'hns3_stats.c',\n \t'hns3_mp.c')\n \n+if (dpdk_conf.has('RTE_ARCH_ARM64'))\n+\tsources += files('hns3_rxtx_vec.c')\n+endif\n+\n deps += ['hash']\n", "prefixes": [ "5/8" ] }