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GET /api/patches/76398/?format=api
{ "id": 76398, "url": "http://patches.dpdk.org/api/patches/76398/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1599128029-2092-16-git-send-email-michaelba@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1599128029-2092-16-git-send-email-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1599128029-2092-16-git-send-email-michaelba@nvidia.com", "date": "2020-09-03T10:13:46", "name": "[v1,15/18] net/mlx5: share Rx queue indirection table code", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "29d2f48d188455e747af075bf35f5ef1a3bf5afc", "submitter": { "id": 1949, "url": "http://patches.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1599128029-2092-16-git-send-email-michaelba@nvidia.com/mbox/", "series": [ { "id": 11924, "url": "http://patches.dpdk.org/api/series/11924/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11924", "date": "2020-09-03T10:13:31", "name": "mlx5 Rx DevX/Verbs separation", "version": 1, "mbox": "http://patches.dpdk.org/series/11924/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/76398/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/76398/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 258FAA04DB;\n\tThu, 3 Sep 2020 12:17:17 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9B7141C1B2;\n\tThu, 3 Sep 2020 12:15:12 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 2C3D61C125\n for <dev@dpdk.org>; Thu, 3 Sep 2020 12:15:10 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n michaelba@nvidia.com) with SMTP; 3 Sep 2020 13:15:08 +0300", "from nvidia.com (pegasus07.mtr.labs.mlnx [10.210.16.112])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 083AEP9D031645;\n Thu, 3 Sep 2020 13:15:08 +0300" ], "From": "Michael Baum <michaelba@nvidia.com>", "To": "dev@dpdk.org", "Cc": "Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "Date": "Thu, 3 Sep 2020 10:13:46 +0000", "Message-Id": "<1599128029-2092-16-git-send-email-michaelba@nvidia.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1599128029-2092-1-git-send-email-michaelba@nvidia.com>", "References": "<1599128029-2092-1-git-send-email-michaelba@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v1 15/18] net/mlx5: share Rx queue indirection\n\ttable code", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Move Rx indirection table object similar resources allocations from DevX\nand Verbs modules to a shared location.\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/linux/mlx5_verbs.c | 75 ++++++++++++++----------------------\n drivers/net/mlx5/mlx5.h | 7 ++--\n drivers/net/mlx5/mlx5_devx.c | 76 ++++++++++++++-----------------------\n drivers/net/mlx5/mlx5_rxq.c | 56 ++++++++++++++++++++++++++-\n drivers/net/mlx5/mlx5_rxtx.h | 3 ++\n 5 files changed, 117 insertions(+), 100 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c\nindex 6eef85e..be810b1 100644\n--- a/drivers/net/mlx5/linux/mlx5_verbs.c\n+++ b/drivers/net/mlx5/linux/mlx5_verbs.c\n@@ -441,67 +441,49 @@\n }\n \n /**\n- * Create an indirection table.\n+ * Creates a receive work queue as a filed of indirection table.\n *\n * @param dev\n * Pointer to Ethernet device.\n- * @param queues\n- * Queues entering in the indirection table.\n- * @param queues_n\n- * Number of queues in the array.\n+ * @param log_n\n+ * Log of number of queues in the array.\n+ * @param ind_tbl\n+ * Verbs indirection table object.\n *\n * @return\n- * The Verbs object initialized, NULL otherwise and rte_errno is set.\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n-static struct mlx5_ind_table_obj *\n-mlx5_ibv_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,\n-\t\t\t uint32_t queues_n)\n+static int\n+mlx5_ibv_ind_table_new(struct rte_eth_dev *dev, const unsigned int log_n,\n+\t\t struct mlx5_ind_table_obj *ind_tbl)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_ind_table_obj *ind_tbl;\n-\tconst unsigned int wq_n = rte_is_power_of_2(queues_n) ?\n-\t\t\t\t log2above(queues_n) :\n-\t\t\t\t log2above(priv->config.ind_table_max_size);\n-\tstruct ibv_wq *wq[1 << wq_n];\n-\tunsigned int i = 0, j = 0, k = 0;\n+\tstruct ibv_wq *wq[1 << log_n];\n+\tunsigned int i, j;\n \n-\tind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +\n-\t\t\t queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);\n-\tif (!ind_tbl) {\n-\t\trte_errno = ENOMEM;\n-\t\treturn NULL;\n-\t}\n-\tfor (i = 0; i != queues_n; ++i) {\n-\t\tstruct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);\n-\t\tif (!rxq)\n-\t\t\tgoto error;\n-\t\twq[i] = rxq->obj->wq;\n-\t\tind_tbl->queues[i] = queues[i];\n+\tMLX5_ASSERT(ind_tbl);\n+\tfor (i = 0; i != ind_tbl->queues_n; ++i) {\n+\t\tstruct mlx5_rxq_data *rxq = (*priv->rxqs)[ind_tbl->queues[i]];\n+\t\tstruct mlx5_rxq_ctrl *rxq_ctrl =\n+\t\t\t\tcontainer_of(rxq, struct mlx5_rxq_ctrl, rxq);\n+\n+\t\twq[i] = rxq_ctrl->obj->wq;\n \t}\n-\tind_tbl->queues_n = queues_n;\n+\tMLX5_ASSERT(i > 0);\n \t/* Finalise indirection table. */\n-\tk = i; /* Retain value of i for use in error case. */\n-\tfor (j = 0; k != (unsigned int)(1 << wq_n); ++k, ++j)\n-\t\twq[k] = wq[j];\n+\tfor (j = 0; i != (unsigned int)(1 << log_n); ++j, ++i)\n+\t\twq[i] = wq[j];\n \tind_tbl->ind_table = mlx5_glue->create_rwq_ind_table(priv->sh->ctx,\n \t\t\t\t\t&(struct ibv_rwq_ind_table_init_attr){\n-\t\t\t\t\t\t.log_ind_tbl_size = wq_n,\n+\t\t\t\t\t\t.log_ind_tbl_size = log_n,\n \t\t\t\t\t\t.ind_tbl = wq,\n \t\t\t\t\t\t.comp_mask = 0,\n \t\t\t\t\t});\n \tif (!ind_tbl->ind_table) {\n \t\trte_errno = errno;\n-\t\tgoto error;\n+\t\treturn -rte_errno;\n \t}\n-\trte_atomic32_inc(&ind_tbl->refcnt);\n-\tLIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);\n-\treturn ind_tbl;\n-error:\n-\tfor (j = 0; j < i; j++)\n-\t\tmlx5_rxq_release(dev, ind_tbl->queues[j]);\n-\tmlx5_free(ind_tbl);\n-\tDEBUG(\"Port %u cannot create indirection table.\", dev->data->port_id);\n-\treturn NULL;\n+\treturn 0;\n }\n \n /**\n@@ -511,7 +493,7 @@\n * Indirection table to release.\n */\n static void\n-mlx5_ibv_ind_table_obj_destroy(struct mlx5_ind_table_obj *ind_tbl)\n+mlx5_ibv_ind_table_destroy(struct mlx5_ind_table_obj *ind_tbl)\n {\n \tclaim_zero(mlx5_glue->destroy_rwq_ind_table(ind_tbl->ind_table));\n }\n@@ -555,8 +537,7 @@\n \tqueues_n = hash_fields ? queues_n : 1;\n \tind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);\n \tif (!ind_tbl)\n-\t\tind_tbl = priv->obj_ops->ind_table_obj_new(dev, queues,\n-\t\t\t\t\t\t\t queues_n);\n+\t\tind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n);\n \tif (!ind_tbl) {\n \t\trte_errno = ENOMEM;\n \t\treturn 0;\n@@ -672,8 +653,8 @@ struct mlx5_obj_ops ibv_obj_ops = {\n \t.rxq_event_get = mlx5_rx_ibv_get_event,\n \t.rxq_obj_modify = mlx5_ibv_modify_wq,\n \t.rxq_obj_release = mlx5_rxq_ibv_obj_release,\n-\t.ind_table_obj_new = mlx5_ibv_ind_table_obj_new,\n-\t.ind_table_obj_destroy = mlx5_ibv_ind_table_obj_destroy,\n+\t.ind_table_new = mlx5_ibv_ind_table_new,\n+\t.ind_table_destroy = mlx5_ibv_ind_table_destroy,\n \t.hrxq_new = mlx5_ibv_hrxq_new,\n \t.hrxq_destroy = mlx5_ibv_qp_destroy,\n };\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 9594856..12017e8 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -742,10 +742,9 @@ struct mlx5_obj_ops {\n \tint (*rxq_event_get)(struct mlx5_rxq_obj *rxq_obj);\n \tint (*rxq_obj_modify)(struct mlx5_rxq_obj *rxq_obj, bool is_start);\n \tvoid (*rxq_obj_release)(struct mlx5_rxq_obj *rxq_obj);\n-\tstruct mlx5_ind_table_obj *(*ind_table_obj_new)(struct rte_eth_dev *dev,\n-\t\t\t\t\t\t\tconst uint16_t *queues,\n-\t\t\t\t\t\t\tuint32_t queues_n);\n-\tvoid (*ind_table_obj_destroy)(struct mlx5_ind_table_obj *ind_tbl);\n+\tint (*ind_table_new)(struct rte_eth_dev *dev, const unsigned int log_n,\n+\t\t\t struct mlx5_ind_table_obj *ind_tbl);\n+\tvoid (*ind_table_destroy)(struct mlx5_ind_table_obj *ind_tbl);\n \tuint32_t (*hrxq_new)(struct rte_eth_dev *dev, const uint8_t *rss_key,\n \t\t\t uint32_t rss_key_len, uint64_t hash_fields,\n \t\t\t const uint16_t *queues, uint32_t queues_n,\ndiff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c\nindex 5fa41f1..ebc3929 100644\n--- a/drivers/net/mlx5/mlx5_devx.c\n+++ b/drivers/net/mlx5/mlx5_devx.c\n@@ -609,76 +609,57 @@\n }\n \n /**\n- * Create an indirection table.\n+ * Create RQT using DevX API as a filed of indirection table.\n *\n * @param dev\n * Pointer to Ethernet device.\n- * @param queues\n- * Queues entering in the indirection table.\n- * @param queues_n\n- * Number of queues in the array.\n+ * @param log_n\n+ * Log of number of queues in the array.\n+ * @param ind_tbl\n+ * DevX indirection table object.\n *\n * @return\n- * The DevX object initialized, NULL otherwise and rte_errno is set.\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n-static struct mlx5_ind_table_obj *\n-mlx5_devx_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,\n-\t\t\t uint32_t queues_n)\n+static int\n+mlx5_devx_ind_table_new(struct rte_eth_dev *dev, const unsigned int log_n,\n+\t\t\tstruct mlx5_ind_table_obj *ind_tbl)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_ind_table_obj *ind_tbl;\n \tstruct mlx5_devx_rqt_attr *rqt_attr = NULL;\n-\tconst unsigned int rqt_n = 1 << (rte_is_power_of_2(queues_n) ?\n-\t\t\t\t log2above(queues_n) :\n-\t\t\t\t log2above(priv->config.ind_table_max_size));\n-\tunsigned int i = 0, j = 0, k = 0;\n+\tconst unsigned int rqt_n = 1 << log_n;\n+\tunsigned int i, j;\n \n-\tind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +\n-\t\t\t queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);\n-\tif (!ind_tbl) {\n-\t\trte_errno = ENOMEM;\n-\t\treturn NULL;\n-\t}\n+\tMLX5_ASSERT(ind_tbl);\n \trqt_attr = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*rqt_attr) +\n \t\t\t rqt_n * sizeof(uint32_t), 0, SOCKET_ID_ANY);\n \tif (!rqt_attr) {\n \t\tDRV_LOG(ERR, \"Port %u cannot allocate RQT resources.\",\n \t\t\tdev->data->port_id);\n \t\trte_errno = ENOMEM;\n-\t\tgoto error;\n+\t\treturn -rte_errno;\n \t}\n \trqt_attr->rqt_max_size = priv->config.ind_table_max_size;\n \trqt_attr->rqt_actual_size = rqt_n;\n-\tfor (i = 0; i != queues_n; ++i) {\n-\t\tstruct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);\n-\t\tif (!rxq) {\n-\t\t\tmlx5_free(rqt_attr);\n-\t\t\tgoto error;\n-\t\t}\n-\t\trqt_attr->rq_list[i] = rxq->obj->rq->id;\n-\t\tind_tbl->queues[i] = queues[i];\n+\tfor (i = 0; i != ind_tbl->queues_n; ++i) {\n+\t\tstruct mlx5_rxq_data *rxq = (*priv->rxqs)[ind_tbl->queues[i]];\n+\t\tstruct mlx5_rxq_ctrl *rxq_ctrl =\n+\t\t\t\tcontainer_of(rxq, struct mlx5_rxq_ctrl, rxq);\n+\n+\t\trqt_attr->rq_list[i] = rxq_ctrl->obj->rq->id;\n \t}\n-\tk = i; /* Retain value of i for use in error case. */\n-\tfor (j = 0; k != rqt_n; ++k, ++j)\n-\t\trqt_attr->rq_list[k] = rqt_attr->rq_list[j];\n+\tMLX5_ASSERT(i > 0);\n+\tfor (j = 0; i != rqt_n; ++j, ++i)\n+\t\trqt_attr->rq_list[i] = rqt_attr->rq_list[j];\n \tind_tbl->rqt = mlx5_devx_cmd_create_rqt(priv->sh->ctx, rqt_attr);\n \tmlx5_free(rqt_attr);\n \tif (!ind_tbl->rqt) {\n \t\tDRV_LOG(ERR, \"Port %u cannot create DevX RQT.\",\n \t\t\tdev->data->port_id);\n \t\trte_errno = errno;\n-\t\tgoto error;\n+\t\treturn -rte_errno;\n \t}\n-\tind_tbl->queues_n = queues_n;\n-\trte_atomic32_inc(&ind_tbl->refcnt);\n-\tLIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);\n-\treturn ind_tbl;\n-error:\n-\tfor (j = 0; j < i; j++)\n-\t\tmlx5_rxq_release(dev, ind_tbl->queues[j]);\n-\tmlx5_free(ind_tbl);\n-\tDEBUG(\"Port %u cannot create indirection table.\", dev->data->port_id);\n-\treturn NULL;\n+\treturn 0;\n }\n \n /**\n@@ -688,7 +669,7 @@\n * Indirection table to release.\n */\n static void\n-mlx5_devx_ind_table_obj_destroy(struct mlx5_ind_table_obj *ind_tbl)\n+mlx5_devx_ind_table_destroy(struct mlx5_ind_table_obj *ind_tbl)\n {\n \tclaim_zero(mlx5_devx_cmd_destroy(ind_tbl->rqt));\n }\n@@ -738,8 +719,7 @@\n \tqueues_n = hash_fields ? queues_n : 1;\n \tind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);\n \tif (!ind_tbl)\n-\t\tind_tbl = priv->obj_ops->ind_table_obj_new(dev, queues,\n-\t\t\t\t\t\t\t queues_n);\n+\t\tind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n);\n \tif (!ind_tbl) {\n \t\trte_errno = ENOMEM;\n \t\treturn 0;\n@@ -852,8 +832,8 @@ struct mlx5_obj_ops devx_obj_ops = {\n \t.rxq_event_get = mlx5_rx_devx_get_event,\n \t.rxq_obj_modify = mlx5_devx_modify_rq,\n \t.rxq_obj_release = mlx5_rxq_devx_obj_release,\n-\t.ind_table_obj_new = mlx5_devx_ind_table_obj_new,\n-\t.ind_table_obj_destroy = mlx5_devx_ind_table_obj_destroy,\n+\t.ind_table_new = mlx5_devx_ind_table_new,\n+\t.ind_table_destroy = mlx5_devx_ind_table_destroy,\n \t.hrxq_new = mlx5_devx_hrxq_new,\n \t.hrxq_destroy = mlx5_devx_tir_destroy,\n };\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex d84dfe1..c353139 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -1762,7 +1762,7 @@ struct mlx5_ind_table_obj *\n \tunsigned int i;\n \n \tif (rte_atomic32_dec_and_test(&ind_tbl->refcnt))\n-\t\tpriv->obj_ops->ind_table_obj_destroy(ind_tbl);\n+\t\tpriv->obj_ops->ind_table_destroy(ind_tbl);\n \tfor (i = 0; i != ind_tbl->queues_n; ++i)\n \t\tclaim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));\n \tif (!rte_atomic32_read(&ind_tbl->refcnt)) {\n@@ -1799,6 +1799,60 @@ struct mlx5_ind_table_obj *\n }\n \n /**\n+ * Create an indirection table.\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device.\n+ * @param queues\n+ * Queues entering in the indirection table.\n+ * @param queues_n\n+ * Number of queues in the array.\n+ *\n+ * @return\n+ * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.\n+ */\n+struct mlx5_ind_table_obj *\n+mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,\n+\t\t uint32_t queues_n)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_ind_table_obj *ind_tbl;\n+\tconst unsigned int n = rte_is_power_of_2(queues_n) ?\n+\t\t\t log2above(queues_n) :\n+\t\t\t log2above(priv->config.ind_table_max_size);\n+\tunsigned int i, j;\n+\tint ret;\n+\n+\tind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +\n+\t\t\t queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);\n+\tif (!ind_tbl) {\n+\t\trte_errno = ENOMEM;\n+\t\treturn NULL;\n+\t}\n+\tind_tbl->queues_n = queues_n;\n+\tfor (i = 0; i != queues_n; ++i) {\n+\t\tstruct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);\n+\t\tif (!rxq)\n+\t\t\tgoto error;\n+\t\tind_tbl->queues[i] = queues[i];\n+\t}\n+\tret = priv->obj_ops->ind_table_new(dev, n, ind_tbl);\n+\tif (ret < 0)\n+\t\tgoto error;\n+\trte_atomic32_inc(&ind_tbl->refcnt);\n+\tLIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);\n+\treturn ind_tbl;\n+error:\n+\tret = rte_errno;\n+\tfor (j = 0; j < i; j++)\n+\t\tmlx5_rxq_release(dev, ind_tbl->queues[j]);\n+\trte_errno = ret;\n+\tmlx5_free(ind_tbl);\n+\tDEBUG(\"Port %u cannot create indirection table.\", dev->data->port_id);\n+\treturn NULL;\n+}\n+\n+/**\n * Get an Rx Hash queue.\n *\n * @param dev\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 14a3535..237344f 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -365,6 +365,9 @@ struct mlx5_rxq_ctrl *mlx5_rxq_hairpin_new\n int mlx5_rxq_verify(struct rte_eth_dev *dev);\n int rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl);\n int mlx5_ind_table_obj_verify(struct rte_eth_dev *dev);\n+struct mlx5_ind_table_obj *mlx5_ind_table_obj_new(struct rte_eth_dev *dev,\n+\t\t\t\t\t\t const uint16_t *queues,\n+\t\t\t\t\t\t uint32_t queues_n);\n struct mlx5_ind_table_obj *mlx5_ind_table_obj_get(struct rte_eth_dev *dev,\n \t\t\t\t\t\t const uint16_t *queues,\n \t\t\t\t\t\t uint32_t queues_n);\n", "prefixes": [ "v1", "15/18" ] }