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GET /api/patches/76395/?format=api
{ "id": 76395, "url": "http://patches.dpdk.org/api/patches/76395/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1599128029-2092-13-git-send-email-michaelba@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1599128029-2092-13-git-send-email-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1599128029-2092-13-git-send-email-michaelba@nvidia.com", "date": "2020-09-03T10:13:43", "name": "[v1,12/18] net/mlx5: separate Rx indirection table object creation", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "367d78036e0b1a17ce371fdf952e627e265ca6f5", "submitter": { "id": 1949, "url": "http://patches.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1599128029-2092-13-git-send-email-michaelba@nvidia.com/mbox/", "series": [ { "id": 11924, "url": "http://patches.dpdk.org/api/series/11924/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11924", "date": "2020-09-03T10:13:31", "name": "mlx5 Rx DevX/Verbs separation", "version": 1, "mbox": "http://patches.dpdk.org/series/11924/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/76395/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/76395/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D43CFA04DB;\n\tThu, 3 Sep 2020 12:16:46 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6D7841C0D1;\n\tThu, 3 Sep 2020 12:15:06 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 1CB961C0B0\n for <dev@dpdk.org>; Thu, 3 Sep 2020 12:15:05 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n michaelba@nvidia.com) with SMTP; 3 Sep 2020 13:15:01 +0300", "from nvidia.com (pegasus07.mtr.labs.mlnx [10.210.16.112])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 083AEP9A031645;\n Thu, 3 Sep 2020 13:15:00 +0300" ], "From": "Michael Baum <michaelba@nvidia.com>", "To": "dev@dpdk.org", "Cc": "Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "Date": "Thu, 3 Sep 2020 10:13:43 +0000", "Message-Id": "<1599128029-2092-13-git-send-email-michaelba@nvidia.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1599128029-2092-1-git-send-email-michaelba@nvidia.com>", "References": "<1599128029-2092-1-git-send-email-michaelba@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v1 12/18] net/mlx5: separate Rx indirection table\n\tobject creation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Separate Rx indirection table object creation into both Verbs and DevX\nmodules.\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/linux/mlx5_verbs.c | 79 ++++++++++++++++++++++\n drivers/net/mlx5/mlx5.h | 23 +++++++\n drivers/net/mlx5/mlx5_devx.c | 89 ++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_flow_verbs.c | 8 +--\n drivers/net/mlx5/mlx5_rxq.c | 131 ++----------------------------------\n drivers/net/mlx5/mlx5_rxtx.h | 19 ------\n 6 files changed, 201 insertions(+), 148 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c\nindex 5eb556e..d36d915 100644\n--- a/drivers/net/mlx5/linux/mlx5_verbs.c\n+++ b/drivers/net/mlx5/linux/mlx5_verbs.c\n@@ -440,10 +440,89 @@\n \treturn -rte_errno;\n }\n \n+/**\n+ * Create an indirection table.\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device.\n+ * @param queues\n+ * Queues entering in the indirection table.\n+ * @param queues_n\n+ * Number of queues in the array.\n+ *\n+ * @return\n+ * The Verbs object initialized, NULL otherwise and rte_errno is set.\n+ */\n+static struct mlx5_ind_table_obj *\n+mlx5_ibv_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,\n+\t\t\t uint32_t queues_n)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_ind_table_obj *ind_tbl;\n+\tconst unsigned int wq_n = rte_is_power_of_2(queues_n) ?\n+\t\t\t\t log2above(queues_n) :\n+\t\t\t\t log2above(priv->config.ind_table_max_size);\n+\tstruct ibv_wq *wq[1 << wq_n];\n+\tunsigned int i = 0, j = 0, k = 0;\n+\n+\tind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +\n+\t\t\t queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);\n+\tif (!ind_tbl) {\n+\t\trte_errno = ENOMEM;\n+\t\treturn NULL;\n+\t}\n+\tind_tbl->type = MLX5_IND_TBL_TYPE_IBV;\n+\tfor (i = 0; i != queues_n; ++i) {\n+\t\tstruct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);\n+\t\tif (!rxq)\n+\t\t\tgoto error;\n+\t\twq[i] = rxq->obj->wq;\n+\t\tind_tbl->queues[i] = queues[i];\n+\t}\n+\tind_tbl->queues_n = queues_n;\n+\t/* Finalise indirection table. */\n+\tk = i; /* Retain value of i for use in error case. */\n+\tfor (j = 0; k != (unsigned int)(1 << wq_n); ++k, ++j)\n+\t\twq[k] = wq[j];\n+\tind_tbl->ind_table = mlx5_glue->create_rwq_ind_table(priv->sh->ctx,\n+\t\t\t\t\t&(struct ibv_rwq_ind_table_init_attr){\n+\t\t\t\t\t\t.log_ind_tbl_size = wq_n,\n+\t\t\t\t\t\t.ind_tbl = wq,\n+\t\t\t\t\t\t.comp_mask = 0,\n+\t\t\t\t\t});\n+\tif (!ind_tbl->ind_table) {\n+\t\trte_errno = errno;\n+\t\tgoto error;\n+\t}\n+\trte_atomic32_inc(&ind_tbl->refcnt);\n+\tLIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);\n+\treturn ind_tbl;\n+error:\n+\tfor (j = 0; j < i; j++)\n+\t\tmlx5_rxq_release(dev, ind_tbl->queues[j]);\n+\tmlx5_free(ind_tbl);\n+\tDEBUG(\"Port %u cannot create indirection table.\", dev->data->port_id);\n+\treturn NULL;\n+}\n+\n+/**\n+ * Destroys the specified Indirection Table.\n+ *\n+ * @param ind_table\n+ * Indirection table to release.\n+ */\n+static void\n+mlx5_ibv_ind_table_obj_destroy(struct mlx5_ind_table_obj *ind_tbl)\n+{\n+\tclaim_zero(mlx5_glue->destroy_rwq_ind_table(ind_tbl->ind_table));\n+}\n+\n struct mlx5_obj_ops ibv_obj_ops = {\n \t.rxq_obj_modify_vlan_strip = mlx5_rxq_obj_modify_wq_vlan_strip,\n \t.rxq_obj_new = mlx5_rxq_ibv_obj_new,\n \t.rxq_event_get = mlx5_rx_ibv_get_event,\n \t.rxq_obj_modify = mlx5_ibv_modify_wq,\n \t.rxq_obj_release = mlx5_rxq_ibv_obj_release,\n+\t.ind_table_obj_new = mlx5_ibv_ind_table_obj_new,\n+\t.ind_table_obj_destroy = mlx5_ibv_ind_table_obj_destroy,\n };\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex a51c88f..c151e64 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -704,6 +704,25 @@ struct mlx5_rxq_obj {\n \t};\n };\n \n+enum mlx5_ind_tbl_type {\n+\tMLX5_IND_TBL_TYPE_IBV,\n+\tMLX5_IND_TBL_TYPE_DEVX,\n+};\n+\n+/* Indirection table. */\n+struct mlx5_ind_table_obj {\n+\tLIST_ENTRY(mlx5_ind_table_obj) next; /* Pointer to the next element. */\n+\trte_atomic32_t refcnt; /* Reference counter. */\n+\tenum mlx5_ind_tbl_type type;\n+\tRTE_STD_C11\n+\tunion {\n+\t\tvoid *ind_table; /**< Indirection table. */\n+\t\tstruct mlx5_devx_obj *rqt; /* DevX RQT object. */\n+\t};\n+\tuint32_t queues_n; /**< Number of queues in the list. */\n+\tuint16_t queues[]; /**< Queue list. */\n+};\n+\n /* HW objects operations structure. */\n struct mlx5_obj_ops {\n \tint (*rxq_obj_modify_vlan_strip)(struct mlx5_rxq_obj *rxq_obj, int on);\n@@ -711,6 +730,10 @@ struct mlx5_obj_ops {\n \tint (*rxq_event_get)(struct mlx5_rxq_obj *rxq_obj);\n \tint (*rxq_obj_modify)(struct mlx5_rxq_obj *rxq_obj, bool is_start);\n \tvoid (*rxq_obj_release)(struct mlx5_rxq_obj *rxq_obj);\n+\tstruct mlx5_ind_table_obj *(*ind_table_obj_new)(struct rte_eth_dev *dev,\n+\t\t\t\t\t\t\tconst uint16_t *queues,\n+\t\t\t\t\t\t\tuint32_t queues_n);\n+\tvoid (*ind_table_obj_destroy)(struct mlx5_ind_table_obj *ind_tbl);\n };\n \n struct mlx5_priv {\ndiff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c\nindex 07922c2..aab5e50 100644\n--- a/drivers/net/mlx5/mlx5_devx.c\n+++ b/drivers/net/mlx5/mlx5_devx.c\n@@ -22,6 +22,7 @@\n #include \"mlx5_rxtx.h\"\n #include \"mlx5_utils.h\"\n #include \"mlx5_devx.h\"\n+#include \"mlx5_flow.h\"\n \n \n /**\n@@ -607,10 +608,98 @@\n \treturn -rte_errno;\n }\n \n+/**\n+ * Create an indirection table.\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device.\n+ * @param queues\n+ * Queues entering in the indirection table.\n+ * @param queues_n\n+ * Number of queues in the array.\n+ *\n+ * @return\n+ * The DevX object initialized, NULL otherwise and rte_errno is set.\n+ */\n+static struct mlx5_ind_table_obj *\n+mlx5_devx_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,\n+\t\t\t uint32_t queues_n)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_ind_table_obj *ind_tbl;\n+\tstruct mlx5_devx_rqt_attr *rqt_attr = NULL;\n+\tconst unsigned int rqt_n = 1 << (rte_is_power_of_2(queues_n) ?\n+\t\t\t\t log2above(queues_n) :\n+\t\t\t\t log2above(priv->config.ind_table_max_size));\n+\tunsigned int i = 0, j = 0, k = 0;\n+\n+\tind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +\n+\t\t\t queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);\n+\tif (!ind_tbl) {\n+\t\trte_errno = ENOMEM;\n+\t\treturn NULL;\n+\t}\n+\tind_tbl->type = MLX5_IND_TBL_TYPE_DEVX;\n+\trqt_attr = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*rqt_attr) +\n+\t\t\t rqt_n * sizeof(uint32_t), 0, SOCKET_ID_ANY);\n+\tif (!rqt_attr) {\n+\t\tDRV_LOG(ERR, \"Port %u cannot allocate RQT resources.\",\n+\t\t\tdev->data->port_id);\n+\t\trte_errno = ENOMEM;\n+\t\tgoto error;\n+\t}\n+\trqt_attr->rqt_max_size = priv->config.ind_table_max_size;\n+\trqt_attr->rqt_actual_size = rqt_n;\n+\tfor (i = 0; i != queues_n; ++i) {\n+\t\tstruct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);\n+\t\tif (!rxq) {\n+\t\t\tmlx5_free(rqt_attr);\n+\t\t\tgoto error;\n+\t\t}\n+\t\trqt_attr->rq_list[i] = rxq->obj->rq->id;\n+\t\tind_tbl->queues[i] = queues[i];\n+\t}\n+\tk = i; /* Retain value of i for use in error case. */\n+\tfor (j = 0; k != rqt_n; ++k, ++j)\n+\t\trqt_attr->rq_list[k] = rqt_attr->rq_list[j];\n+\tind_tbl->rqt = mlx5_devx_cmd_create_rqt(priv->sh->ctx, rqt_attr);\n+\tmlx5_free(rqt_attr);\n+\tif (!ind_tbl->rqt) {\n+\t\tDRV_LOG(ERR, \"Port %u cannot create DevX RQT.\",\n+\t\t\tdev->data->port_id);\n+\t\trte_errno = errno;\n+\t\tgoto error;\n+\t}\n+\tind_tbl->queues_n = queues_n;\n+\trte_atomic32_inc(&ind_tbl->refcnt);\n+\tLIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);\n+\treturn ind_tbl;\n+error:\n+\tfor (j = 0; j < i; j++)\n+\t\tmlx5_rxq_release(dev, ind_tbl->queues[j]);\n+\tmlx5_free(ind_tbl);\n+\tDEBUG(\"Port %u cannot create indirection table.\", dev->data->port_id);\n+\treturn NULL;\n+}\n+\n+/**\n+ * Destroy the DevX RQT object.\n+ *\n+ * @param ind_table\n+ * Indirection table to release.\n+ */\n+static void\n+mlx5_devx_ind_table_obj_destroy(struct mlx5_ind_table_obj *ind_tbl)\n+{\n+\tclaim_zero(mlx5_devx_cmd_destroy(ind_tbl->rqt));\n+}\n+\n struct mlx5_obj_ops devx_obj_ops = {\n \t.rxq_obj_modify_vlan_strip = mlx5_rxq_obj_modify_rq_vlan_strip,\n \t.rxq_obj_new = mlx5_rxq_devx_obj_new,\n \t.rxq_event_get = mlx5_rx_devx_get_event,\n \t.rxq_obj_modify = mlx5_devx_modify_rq,\n \t.rxq_obj_release = mlx5_rxq_devx_obj_release,\n+\t.ind_table_obj_new = mlx5_devx_ind_table_obj_new,\n+\t.ind_table_obj_destroy = mlx5_devx_ind_table_obj_destroy,\n };\ndiff --git a/drivers/net/mlx5/mlx5_flow_verbs.c b/drivers/net/mlx5/mlx5_flow_verbs.c\nindex 334e19b..80c549a 100644\n--- a/drivers/net/mlx5/mlx5_flow_verbs.c\n+++ b/drivers/net/mlx5/mlx5_flow_verbs.c\n@@ -1981,10 +1981,10 @@\n \n \t\t\tMLX5_ASSERT(rss_desc->queue_num);\n \t\t\thrxq_idx = mlx5_hrxq_get(dev, rss_desc->key,\n-\t\t\t\t\t MLX5_RSS_HASH_KEY_LEN,\n-\t\t\t\t\t dev_flow->hash_fields,\n-\t\t\t\t\t rss_desc->queue,\n-\t\t\t\t\t rss_desc->queue_num);\n+\t\t\t\t\t\t MLX5_RSS_HASH_KEY_LEN,\n+\t\t\t\t\t\t dev_flow->hash_fields,\n+\t\t\t\t\t\t rss_desc->queue,\n+\t\t\t\t\t\t rss_desc->queue_num);\n \t\t\tif (!hrxq_idx)\n \t\t\t\thrxq_idx = mlx5_hrxq_new(dev, rss_desc->key,\n \t\t\t\t\t\tMLX5_RSS_HASH_KEY_LEN,\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex c18610d..aa39892 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -25,7 +25,6 @@\n \n #include \"mlx5_defs.h\"\n #include \"mlx5.h\"\n-#include \"mlx5_common_os.h\"\n #include \"mlx5_rxtx.h\"\n #include \"mlx5_utils.h\"\n #include \"mlx5_autoconf.h\"\n@@ -1710,115 +1709,6 @@ enum mlx5_rxq_type\n }\n \n /**\n- * Create an indirection table.\n- *\n- * @param dev\n- * Pointer to Ethernet device.\n- * @param queues\n- * Queues entering in the indirection table.\n- * @param queues_n\n- * Number of queues in the array.\n- *\n- * @return\n- * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.\n- */\n-static struct mlx5_ind_table_obj *\n-mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,\n-\t\t uint32_t queues_n, enum mlx5_ind_tbl_type type)\n-{\n-\tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_ind_table_obj *ind_tbl;\n-\tunsigned int i = 0, j = 0, k = 0;\n-\n-\tind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +\n-\t\t\t queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);\n-\tif (!ind_tbl) {\n-\t\trte_errno = ENOMEM;\n-\t\treturn NULL;\n-\t}\n-\tind_tbl->type = type;\n-\tif (ind_tbl->type == MLX5_IND_TBL_TYPE_IBV) {\n-\t\tconst unsigned int wq_n = rte_is_power_of_2(queues_n) ?\n-\t\t\tlog2above(queues_n) :\n-\t\t\tlog2above(priv->config.ind_table_max_size);\n-\t\tstruct ibv_wq *wq[1 << wq_n];\n-\n-\t\tfor (i = 0; i != queues_n; ++i) {\n-\t\t\tstruct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev,\n-\t\t\t\t\t\t\t\t queues[i]);\n-\t\t\tif (!rxq)\n-\t\t\t\tgoto error;\n-\t\t\twq[i] = rxq->obj->wq;\n-\t\t\tind_tbl->queues[i] = queues[i];\n-\t\t}\n-\t\tind_tbl->queues_n = queues_n;\n-\t\t/* Finalise indirection table. */\n-\t\tk = i; /* Retain value of i for use in error case. */\n-\t\tfor (j = 0; k != (unsigned int)(1 << wq_n); ++k, ++j)\n-\t\t\twq[k] = wq[j];\n-\t\tind_tbl->ind_table = mlx5_glue->create_rwq_ind_table\n-\t\t\t(priv->sh->ctx,\n-\t\t\t &(struct ibv_rwq_ind_table_init_attr){\n-\t\t\t\t.log_ind_tbl_size = wq_n,\n-\t\t\t\t.ind_tbl = wq,\n-\t\t\t\t.comp_mask = 0,\n-\t\t\t});\n-\t\tif (!ind_tbl->ind_table) {\n-\t\t\trte_errno = errno;\n-\t\t\tgoto error;\n-\t\t}\n-\t} else { /* ind_tbl->type == MLX5_IND_TBL_TYPE_DEVX */\n-\t\tstruct mlx5_devx_rqt_attr *rqt_attr = NULL;\n-\t\tconst unsigned int rqt_n =\n-\t\t\t1 << (rte_is_power_of_2(queues_n) ?\n-\t\t\t log2above(queues_n) :\n-\t\t\t log2above(priv->config.ind_table_max_size));\n-\n-\t\trqt_attr = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*rqt_attr) +\n-\t\t\t\t rqt_n * sizeof(uint32_t), 0,\n-\t\t\t\t SOCKET_ID_ANY);\n-\t\tif (!rqt_attr) {\n-\t\t\tDRV_LOG(ERR, \"port %u cannot allocate RQT resources\",\n-\t\t\t\tdev->data->port_id);\n-\t\t\trte_errno = ENOMEM;\n-\t\t\tgoto error;\n-\t\t}\n-\t\trqt_attr->rqt_max_size = priv->config.ind_table_max_size;\n-\t\trqt_attr->rqt_actual_size = rqt_n;\n-\t\tfor (i = 0; i != queues_n; ++i) {\n-\t\t\tstruct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev,\n-\t\t\t\t\t\t\t\t queues[i]);\n-\t\t\tif (!rxq)\n-\t\t\t\tgoto error;\n-\t\t\trqt_attr->rq_list[i] = rxq->obj->rq->id;\n-\t\t\tind_tbl->queues[i] = queues[i];\n-\t\t}\n-\t\tk = i; /* Retain value of i for use in error case. */\n-\t\tfor (j = 0; k != rqt_n; ++k, ++j)\n-\t\t\trqt_attr->rq_list[k] = rqt_attr->rq_list[j];\n-\t\tind_tbl->rqt = mlx5_devx_cmd_create_rqt(priv->sh->ctx,\n-\t\t\t\t\t\t\trqt_attr);\n-\t\tmlx5_free(rqt_attr);\n-\t\tif (!ind_tbl->rqt) {\n-\t\t\tDRV_LOG(ERR, \"port %u cannot create DevX RQT\",\n-\t\t\t\tdev->data->port_id);\n-\t\t\trte_errno = errno;\n-\t\t\tgoto error;\n-\t\t}\n-\t\tind_tbl->queues_n = queues_n;\n-\t}\n-\trte_atomic32_inc(&ind_tbl->refcnt);\n-\tLIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);\n-\treturn ind_tbl;\n-error:\n-\tfor (j = 0; j < i; j++)\n-\t\tmlx5_rxq_release(dev, ind_tbl->queues[j]);\n-\tmlx5_free(ind_tbl);\n-\tDEBUG(\"port %u cannot create indirection table\", dev->data->port_id);\n-\treturn NULL;\n-}\n-\n-/**\n * Get an indirection table.\n *\n * @param dev\n@@ -1870,15 +1760,11 @@ enum mlx5_rxq_type\n mlx5_ind_table_obj_release(struct rte_eth_dev *dev,\n \t\t\t struct mlx5_ind_table_obj *ind_tbl)\n {\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n \tunsigned int i;\n \n-\tif (rte_atomic32_dec_and_test(&ind_tbl->refcnt)) {\n-\t\tif (ind_tbl->type == MLX5_IND_TBL_TYPE_IBV)\n-\t\t\tclaim_zero(mlx5_glue->destroy_rwq_ind_table\n-\t\t\t\t\t\t\t(ind_tbl->ind_table));\n-\t\telse if (ind_tbl->type == MLX5_IND_TBL_TYPE_DEVX)\n-\t\t\tclaim_zero(mlx5_devx_cmd_destroy(ind_tbl->rqt));\n-\t}\n+\tif (rte_atomic32_dec_and_test(&ind_tbl->refcnt))\n+\t\tpriv->obj_ops->ind_table_obj_destroy(ind_tbl);\n \tfor (i = 0; i != ind_tbl->queues_n; ++i)\n \t\tclaim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));\n \tif (!rte_atomic32_read(&ind_tbl->refcnt)) {\n@@ -1956,13 +1842,9 @@ enum mlx5_rxq_type\n \n \tqueues_n = hash_fields ? queues_n : 1;\n \tind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);\n-\tif (!ind_tbl) {\n-\t\tenum mlx5_ind_tbl_type type;\n-\n-\t\ttype = rxq_ctrl->obj->type == MLX5_RXQ_OBJ_TYPE_IBV ?\n-\t\t\t\tMLX5_IND_TBL_TYPE_IBV : MLX5_IND_TBL_TYPE_DEVX;\n-\t\tind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n, type);\n-\t}\n+\tif (!ind_tbl)\n+\t\tind_tbl = priv->obj_ops->ind_table_obj_new(dev, queues,\n+\t\t\t\t\t\t\t queues_n);\n \tif (!ind_tbl) {\n \t\trte_errno = ENOMEM;\n \t\treturn 0;\n@@ -2062,7 +1944,6 @@ enum mlx5_rxq_type\n \t\t\tstruct mlx5_rx_hash_field_select *rx_hash_field_select =\n \t\t\t\t\t&tir_attr.rx_hash_field_selector_outer;\n #endif\n-\n \t\t\t/* 1 bit: 0: IPv4, 1: IPv6. */\n \t\t\trx_hash_field_select->l3_prot_type =\n \t\t\t\t!!(hash_fields & MLX5_IPV6_IBV_RX_HASH);\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 75eedff..7878c81 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -186,25 +186,6 @@ struct mlx5_rxq_ctrl {\n \tstruct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration. */\n };\n \n-enum mlx5_ind_tbl_type {\n-\tMLX5_IND_TBL_TYPE_IBV,\n-\tMLX5_IND_TBL_TYPE_DEVX,\n-};\n-\n-/* Indirection table. */\n-struct mlx5_ind_table_obj {\n-\tLIST_ENTRY(mlx5_ind_table_obj) next; /* Pointer to the next element. */\n-\trte_atomic32_t refcnt; /* Reference counter. */\n-\tenum mlx5_ind_tbl_type type;\n-\tRTE_STD_C11\n-\tunion {\n-\t\tvoid *ind_table; /**< Indirection table. */\n-\t\tstruct mlx5_devx_obj *rqt; /* DevX RQT object. */\n-\t};\n-\tuint32_t queues_n; /**< Number of queues in the list. */\n-\tuint16_t queues[]; /**< Queue list. */\n-};\n-\n /* Hash Rx queue. */\n struct mlx5_hrxq {\n \tILIST_ENTRY(uint32_t)next; /* Index to the next element. */\n", "prefixes": [ "v1", "12/18" ] }