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GET /api/patches/76384/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 76384,
    "url": "http://patches.dpdk.org/api/patches/76384/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1599128029-2092-3-git-send-email-michaelba@nvidia.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1599128029-2092-3-git-send-email-michaelba@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1599128029-2092-3-git-send-email-michaelba@nvidia.com",
    "date": "2020-09-03T10:13:33",
    "name": "[v1,02/18] net/mlx5: fix Rx queue state update",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "c099bfe43cc230cf89d3082b14ed2052bf570a18",
    "submitter": {
        "id": 1949,
        "url": "http://patches.dpdk.org/api/people/1949/?format=api",
        "name": "Michael Baum",
        "email": "michaelba@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "http://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1599128029-2092-3-git-send-email-michaelba@nvidia.com/mbox/",
    "series": [
        {
            "id": 11924,
            "url": "http://patches.dpdk.org/api/series/11924/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11924",
            "date": "2020-09-03T10:13:31",
            "name": "mlx5 Rx DevX/Verbs separation",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/11924/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/76384/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/76384/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3493CA04DB;\n\tThu,  3 Sep 2020 12:14:39 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 78C7E1C0C6;\n\tThu,  3 Sep 2020 12:14:36 +0200 (CEST)",
            "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id DF0061C0C0\n for <dev@dpdk.org>; Thu,  3 Sep 2020 12:14:34 +0200 (CEST)",
            "from Internal Mail-Server by MTLPINE1 (envelope-from\n michaelba@nvidia.com) with SMTP; 3 Sep 2020 13:14:32 +0300",
            "from nvidia.com (pegasus07.mtr.labs.mlnx [10.210.16.112])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 083AEP90031645;\n Thu, 3 Sep 2020 13:14:32 +0300"
        ],
        "From": "Michael Baum <michaelba@nvidia.com>",
        "To": "dev@dpdk.org",
        "Cc": "Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, stable@dpdk.org",
        "Date": "Thu,  3 Sep 2020 10:13:33 +0000",
        "Message-Id": "<1599128029-2092-3-git-send-email-michaelba@nvidia.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1599128029-2092-1-git-send-email-michaelba@nvidia.com>",
        "References": "<1599128029-2092-1-git-send-email-michaelba@nvidia.com>",
        "Subject": "[dpdk-dev] [PATCH v1 02/18] net/mlx5: fix Rx queue state update",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "In order to support DevX Rx queue stop and start operations, the state\nof the queue should be updated in FW.\nThe state update PRM command requires to set both the current state and\nthe new requested state.\n\nThe current state and the new requested state fields setting were\nwrongly switched.\n\nSwitch them back to the correct setting.\n\nFixes: 161d103b231c (\"net/mlx5: add queue start and stop\")\nCc: stable@dpdk.org\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/mlx5_rxq.c | 10 +++++-----\n 1 file changed, 5 insertions(+), 5 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 0d16592..2e6cbd4 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -505,8 +505,8 @@\n \t\tstruct mlx5_devx_modify_rq_attr rq_attr;\n \n \t\tmemset(&rq_attr, 0, sizeof(rq_attr));\n-\t\trq_attr.rq_state = MLX5_RQC_STATE_RST;\n-\t\trq_attr.state = MLX5_RQC_STATE_RDY;\n+\t\trq_attr.rq_state = MLX5_RQC_STATE_RDY;\n+\t\trq_attr.state = MLX5_RQC_STATE_RST;\n \t\tret = mlx5_devx_cmd_modify_rq(rxq_ctrl->obj->rq, &rq_attr);\n \t}\n \tif (ret) {\n@@ -604,7 +604,7 @@\n \trte_cio_wmb();\n \t*rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);\n \trte_cio_wmb();\n-\t/* Reset RQ consumer before moving queue ro READY state. */\n+\t/* Reset RQ consumer before moving queue to READY state. */\n \t*rxq->rq_db = rte_cpu_to_be_32(0);\n \trte_cio_wmb();\n \tif (rxq_ctrl->obj->type == MLX5_RXQ_OBJ_TYPE_IBV) {\n@@ -618,8 +618,8 @@\n \t\tstruct mlx5_devx_modify_rq_attr rq_attr;\n \n \t\tmemset(&rq_attr, 0, sizeof(rq_attr));\n-\t\trq_attr.rq_state = MLX5_RQC_STATE_RDY;\n-\t\trq_attr.state = MLX5_RQC_STATE_RST;\n+\t\trq_attr.rq_state = MLX5_RQC_STATE_RST;\n+\t\trq_attr.state = MLX5_RQC_STATE_RDY;\n \t\tret = mlx5_devx_cmd_modify_rq(rxq_ctrl->obj->rq, &rq_attr);\n \t}\n \tif (ret) {\n",
    "prefixes": [
        "v1",
        "02/18"
    ]
}