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GET /api/patches/76035/?format=api
{ "id": 76035, "url": "http://patches.dpdk.org/api/patches/76035/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200826151445.51500-41-cristian.dumitrescu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200826151445.51500-41-cristian.dumitrescu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200826151445.51500-41-cristian.dumitrescu@intel.com", "date": "2020-08-26T15:14:45", "name": "[40/40] examples/pipeline: add VXLAN encap example", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "03490838156c9fef88e54a8b8e1003cf1f7450d8", "submitter": { "id": 19, "url": "http://patches.dpdk.org/api/people/19/?format=api", "name": "Cristian Dumitrescu", "email": "cristian.dumitrescu@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200826151445.51500-41-cristian.dumitrescu@intel.com/mbox/", "series": [ { "id": 11806, "url": "http://patches.dpdk.org/api/series/11806/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11806", "date": "2020-08-26T15:14:05", "name": "Pipeline alignment with the P4 language", "version": 1, "mbox": "http://patches.dpdk.org/series/11806/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/76035/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/76035/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 31EB8A04B1;\n\tWed, 26 Aug 2020 17:24:40 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 34C171C2ED;\n\tWed, 26 Aug 2020 17:15:58 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by dpdk.org (Postfix) with ESMTP id 011FB1C196\n for <dev@dpdk.org>; Wed, 26 Aug 2020 17:15:31 +0200 (CEST)", "from orsmga004.jf.intel.com ([10.7.209.38])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 26 Aug 2020 08:15:31 -0700", "from silpixa00400573.ir.intel.com (HELO\n silpixa00400573.ger.corp.intel.com) ([10.237.223.107])\n by orsmga004.jf.intel.com with ESMTP; 26 Aug 2020 08:15:30 -0700" ], "IronPort-SDR": [ "\n NcI23TO2zSo266ftIhrLPZR434WSYWc7Trm25diDrqeEzKLHay7+L1oc/u4vZf8WVGAI1CInxO\n UGLpPYqA+EMg==", "\n YQDyyjP5aCFLxLrv9l9l9IW/7ULEXUrjKn14ZJVEHRXzXk7SyCR6slYsY+Lx5XA5204Fmx1W2J\n 482XEHaE95+w==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9725\"; a=\"153879650\"", "E=Sophos;i=\"5.76,356,1592895600\"; d=\"scan'208\";a=\"153879650\"", "E=Sophos;i=\"5.76,356,1592895600\"; d=\"scan'208\";a=\"444081508\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Cristian Dumitrescu <cristian.dumitrescu@intel.com>", "To": "dev@dpdk.org", "Date": "Wed, 26 Aug 2020 16:14:45 +0100", "Message-Id": "<20200826151445.51500-41-cristian.dumitrescu@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200826151445.51500-1-cristian.dumitrescu@intel.com>", "References": "<20200826151445.51500-1-cristian.dumitrescu@intel.com>", "Subject": "[dpdk-dev] [PATCH 40/40] examples/pipeline: add VXLAN encap example", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add VXLAN encapsulation example to the pipeline application. The VXLAN\ntunnels can be generated with the vxlan.py script. Example command\nline: ./build/pipeline -l0-1 -- -s ./examples/vxlan.cli\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\n---\n examples/pipeline/Makefile | 2 +-\n examples/pipeline/cli.c | 3 +\n examples/pipeline/example_vxlan.c | 318 ++++++++++++++++++++++\n examples/pipeline/examples/vxlan.cli | 27 ++\n examples/pipeline/examples/vxlan.py | 71 +++++\n examples/pipeline/examples/vxlan.txt | 16 ++\n examples/pipeline/examples/vxlan_pcap.cli | 22 ++\n examples/pipeline/meson.build | 1 +\n 8 files changed, 459 insertions(+), 1 deletion(-)\n create mode 100644 examples/pipeline/example_vxlan.c\n create mode 100644 examples/pipeline/examples/vxlan.cli\n create mode 100644 examples/pipeline/examples/vxlan.py\n create mode 100644 examples/pipeline/examples/vxlan.txt\n create mode 100644 examples/pipeline/examples/vxlan_pcap.cli", "diff": "diff --git a/examples/pipeline/Makefile b/examples/pipeline/Makefile\nindex df5176296..9e8088ec4 100644\n--- a/examples/pipeline/Makefile\n+++ b/examples/pipeline/Makefile\n@@ -12,7 +12,7 @@ SRCS-y += obj.c\n SRCS-y += thread.c\n SRCS-y += example_l2fwd.c\n SRCS-y += example_l2fwd_macswp.c\n-\n+SRCS-y += example_vxlan.c\n \n # Build using pkg-config variables if possible\n ifeq ($(shell pkg-config --exists libdpdk && echo 0),0)\ndiff --git a/examples/pipeline/cli.c b/examples/pipeline/cli.c\nindex 9547e1b4c..d98400c78 100644\n--- a/examples/pipeline/cli.c\n+++ b/examples/pipeline/cli.c\n@@ -732,6 +732,7 @@ static const char cmd_pipeline_build_help[] =\n \n int pipeline_setup_l2fwd(struct rte_swx_pipeline *p);\n int pipeline_setup_l2fwd_macswp(struct rte_swx_pipeline *p);\n+int pipeline_setup_vxlan(struct rte_swx_pipeline *p);\n \n static void\n cmd_pipeline_build(char **tokens,\n@@ -761,6 +762,8 @@ cmd_pipeline_build(char **tokens,\n \t\tstatus = pipeline_setup_l2fwd(p->p);\n \telse if (!strcmp(app, \"l2fwd_macswp\"))\n \t\tstatus = pipeline_setup_l2fwd_macswp(p->p);\n+\telse if (!strcmp(app, \"vxlan\"))\n+\t\tstatus = pipeline_setup_vxlan(p->p);\n \telse {\n \t\tsnprintf(out, out_size, MSG_ARG_INVALID, tokens[0]);\n \t\treturn;\ndiff --git a/examples/pipeline/example_vxlan.c b/examples/pipeline/example_vxlan.c\nnew file mode 100644\nindex 000000000..b4701e20f\n--- /dev/null\n+++ b/examples/pipeline/example_vxlan.c\n@@ -0,0 +1,318 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020 Intel Corporation\n+ */\n+#include <stdlib.h>\n+#include <string.h>\n+#include <stdio.h>\n+\n+#include <rte_common.h>\n+\n+#include \"rte_swx_pipeline.h\"\n+#include \"rte_swx_table_em.h\"\n+\n+#define CHECK(condition) \\\n+do { \\\n+\tif (!(condition)) { \\\n+\t\tprintf(\"Error in function %s at line %d\\n\", \\\n+\t\t\t__FUNCTION__, __LINE__); \\\n+\t\treturn -1; \\\n+\t} \\\n+} while (0)\n+\n+/*\n+ * Packet headers.\n+ */\n+static struct rte_swx_field_params ethernet_h[] = {\n+\t{\"dst_addr\", 48},\n+\t{\"src_addr\", 48},\n+\t{\"ether_type\", 16},\n+};\n+\n+static struct rte_swx_field_params ipv4_h[] = {\n+\t{\"ver_ihl\", 8},\n+\t{\"diffserv\", 8},\n+\t{\"total_len\", 16},\n+\t{\"identification\", 16},\n+\t{\"flags_offset\", 16},\n+\t{\"ttl\", 8},\n+\t{\"protocol\", 8},\n+\t{\"hdr_checksum\", 16},\n+\t{\"src_addr\", 32},\n+\t{\"dst_addr\", 32},\n+};\n+\n+static struct rte_swx_field_params udp_h[] = {\n+\t{\"src_port\", 16},\n+\t{\"dst_port\", 16},\n+\t{\"length\", 16},\n+\t{\"checksum\", 16},\n+};\n+\n+static struct rte_swx_field_params vxlan_h[] = {\n+\t{\"flags\", 8},\n+\t{\"reserved\", 24},\n+\t{\"vni\", 24},\n+\t{\"reserved2\", 8},\n+};\n+\n+/*\n+ * Packet meta-data.\n+ */\n+static struct rte_swx_field_params metadata_t[] = {\n+\t{\"port_in\", 32},\n+\t{\"port_out\", 32},\n+};\n+\n+/*\n+ * Actions.\n+ */\n+static const char *drop_instructions[] = {\n+\t\"mov m.port_out 4\",\n+\t\"tx m.port_out\",\n+};\n+\n+static struct rte_swx_field_params vxlan_encap_args_t[] = {\n+\t{\"ethernet_dst_addr\", 48},\n+\t{\"ethernet_src_addr\", 48},\n+\t{\"ethernet_ether_type\", 16},\n+\t{\"ipv4_ver_ihl\", 8},\n+\t{\"ipv4_diffserv\", 8},\n+\t{\"ipv4_total_len\", 16},\n+\t{\"ipv4_identification\", 16},\n+\t{\"ipv4_flags_offset\", 16},\n+\t{\"ipv4_ttl\", 8},\n+\t{\"ipv4_protocol\", 8},\n+\t{\"ipv4_hdr_checksum\", 16},\n+\t{\"ipv4_src_addr\", 32},\n+\t{\"ipv4_dst_addr\", 32},\n+\t{\"udp_src_port\", 16},\n+\t{\"udp_dst_port\", 16},\n+\t{\"udp_length\", 16},\n+\t{\"udp_checksum\", 16},\n+\t{\"vxlan_flags\", 8},\n+\t{\"vxlan_reserved\", 24},\n+\t{\"vxlan_vni\", 24},\n+\t{\"vxlan_reserved2\", 8},\n+\t{\"port_out\", 32},\n+};\n+\n+/* Input frame:\n+ * Ethernet (14) | IPv4 (total_len)\n+ *\n+ * Output frame:\n+ * Ethernet (14) | IPv4 (20) | UDP (8) | VXLAN (8) | Input frame | FCS (4)\n+ *\n+ * Note: The input frame has its FCS removed before encapsulation in the output\n+ * frame.\n+ *\n+ * Assumption: When read from the table, the outer IPv4 and UDP headers contain\n+ * the following fields:\n+ * - t.ipv4_total_len: Set to 50, which covers the length of:\n+ * - The outer IPv4 header (20 bytes);\n+ * - The outer UDP header (8 bytes);\n+ * - The outer VXLAN header (8 bytes);\n+ * - The inner Ethernet header (14 bytes);\n+ * - t.ipv4_hdr_checksum: Includes the above total length.\n+ * - t.udp_length: Set to 30, which covers the length of:\n+ * - The outer UDP header (8 bytes);\n+ * - The outer VXLAN header (8 bytes);\n+ * - The inner Ethernet header (14 bytes);\n+ * - t.udp_checksum: Set to 0.\n+ *\n+ * Once the total length of the inner IPv4 packet (h.ipv4.total_len) is known,\n+ * the outer IPv4 and UDP headers are updated as follows:\n+ * - h.outer_ipv4.total_len = t.ipv4_total_len + h.ipv4.total_len\n+ * - h.outer_ipv4.hdr_checksum = t.ipv4_hdr_checksum + h.ipv4.total_len\n+ * - h.outer_udp.length = t.udp_length + h.ipv4.total_len\n+ * - h.outer_udp.checksum: No change.\n+ */\n+static const char *vxlan_encap_instructions[] = {\n+\t/* Copy from table entry to haders and metadata. */\n+\t\"dma h.outer_ethernet t.ethernet_dst_addr\",\n+\t\"dma h.outer_ipv4 t.ipv4_ver_ihl\",\n+\t\"dma h.outer_udp t.udp_src_port\",\n+\t\"dma h.outer_vxlan t.vxlan_flags\",\n+\t\"mov m.port_out t.port_out\",\n+\n+\t/* Update h.outer_ipv4.total_len field. */\n+\t\"add h.outer_ipv4.total_len h.ipv4.total_len\",\n+\n+\t/* Update h.outer_ipv4.hdr_checksum field. */\n+\t\"ckadd h.outer_ipv4.hdr_checksum h.ipv4.total_len\",\n+\n+\t/* Update h.outer_udp.length field. */\n+\t\"add h.outer_udp.length h.ipv4.total_len\",\n+\n+\t\"return\"\n+};\n+\n+/*\n+ * Tables.\n+ */\n+static struct rte_swx_match_field_params table_match_fields[] = {\n+\t[0] = {\n+\t\t.name = \"h.ethernet.dst_addr\",\n+\t\t.match_type = RTE_SWX_TABLE_MATCH_EXACT,\n+\t},\n+};\n+\n+static const char *table_actions[] = {\"drop\", \"vxlan_encap\"};\n+\n+static struct rte_swx_pipeline_table_params table_params = {\n+\t/* Match. */\n+\t.fields = table_match_fields,\n+\t.n_fields = RTE_DIM(table_match_fields),\n+\n+\t/* Action. */\n+\t.action_names = table_actions,\n+\t.n_actions = RTE_DIM(table_actions),\n+\t.default_action_name = \"drop\",\n+\t.default_action_data = NULL,\n+\t.default_action_is_const = 0,\n+};\n+\n+/*\n+ * Pipeline.\n+ */\n+static const char *pipeline_instructions[] = {\n+\t\"rx m.port_in\",\n+\t\"extract h.ethernet\",\n+\t\"extract h.ipv4\",\n+\t\"table vxlan\",\n+\t\"emit h.outer_ethernet\",\n+\t\"emit h.outer_ipv4\",\n+\t\"emit h.outer_udp\",\n+\t\"emit h.outer_vxlan\",\n+\t\"emit h.ethernet\",\n+\t\"emit h.ipv4\",\n+\t\"tx m.port_out\",\n+};\n+\n+int\n+pipeline_setup_vxlan(struct rte_swx_pipeline *p);\n+\n+int\n+pipeline_setup_vxlan(struct rte_swx_pipeline *p)\n+{\n+\tint err;\n+\n+\t/*\n+\t * Packet headers.\n+\t */\n+\terr = rte_swx_pipeline_struct_type_register(p,\n+\t\t\"ethernet_h\",\n+\t\tethernet_h,\n+\t\tRTE_DIM(ethernet_h));\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_struct_type_register(p,\n+\t\t\"ipv4_h\",\n+\t\tipv4_h,\n+\t\tRTE_DIM(ipv4_h));\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_struct_type_register(p,\n+\t\t\"udp_h\",\n+\t\tudp_h,\n+\t\tRTE_DIM(udp_h));\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_struct_type_register(p,\n+\t\t\"vxlan_h\",\n+\t\tvxlan_h,\n+\t\tRTE_DIM(vxlan_h));\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_packet_header_register(p,\n+\t\t\"outer_ethernet\",\n+\t\t\"ethernet_h\");\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_packet_header_register(p,\n+\t\t\"outer_ipv4\",\n+\t\t\"ipv4_h\");\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_packet_header_register(p,\n+\t\t\"outer_udp\",\n+\t\t\"udp_h\");\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_packet_header_register(p,\n+\t\t\"outer_vxlan\",\n+\t\t\"vxlan_h\");\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_packet_header_register(p,\n+\t\t\"ethernet\",\n+\t\t\"ethernet_h\");\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_packet_header_register(p,\n+\t\t\"ipv4\",\n+\t\t\"ipv4_h\");\n+\tCHECK(!err);\n+\n+\t/*\n+\t * Packet meta-data.\n+\t */\n+\terr = rte_swx_pipeline_struct_type_register(p,\n+\t\t\"metadata_t\",\n+\t\tmetadata_t,\n+\t\tRTE_DIM(metadata_t));\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_packet_metadata_register(p,\n+\t\t\"metadata_t\");\n+\tCHECK(!err);\n+\n+\t/*\n+\t * Actions.\n+\t */\n+\terr = rte_swx_pipeline_action_config(p,\n+\t\t\"drop\",\n+\t\tNULL,\n+\t\tdrop_instructions,\n+\t\tRTE_DIM(drop_instructions));\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_struct_type_register(p,\n+\t\t\"vxlan_encap_args_t\",\n+\t\tvxlan_encap_args_t,\n+\t\tRTE_DIM(vxlan_encap_args_t));\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_action_config(p,\n+\t\t\"vxlan_encap\",\n+\t\t\"vxlan_encap_args_t\",\n+\t\tvxlan_encap_instructions,\n+\t\tRTE_DIM(vxlan_encap_instructions));\n+\tCHECK(!err);\n+\n+\t/*\n+\t * Tables.\n+\t */\n+\terr = rte_swx_pipeline_table_type_register(p,\n+\t\t\"exact\",\n+\t\tRTE_SWX_TABLE_MATCH_EXACT,\n+\t\t&rte_swx_table_exact_match_ops);\n+\tCHECK(!err);\n+\n+\terr = rte_swx_pipeline_table_config(p,\n+\t\t\"vxlan\",\n+\t\t&table_params,\n+\t\tNULL,\n+\t\tNULL,\n+\t\t1 * 1024 * 1024);\n+\tCHECK(!err);\n+\n+\t/*\n+\t * Pipeline.\n+\t */\n+\terr = rte_swx_pipeline_instructions_config(p,\n+\t\tpipeline_instructions,\n+\t\tRTE_DIM(pipeline_instructions));\n+\tCHECK(!err);\n+\n+\treturn 0;\n+}\ndiff --git a/examples/pipeline/examples/vxlan.cli b/examples/pipeline/examples/vxlan.cli\nnew file mode 100644\nindex 000000000..53a8b2a0a\n--- /dev/null\n+++ b/examples/pipeline/examples/vxlan.cli\n@@ -0,0 +1,27 @@\n+; SPDX-License-Identifier: BSD-3-Clause\n+; Copyright(c) 2010-2020 Intel Corporation\n+\n+mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0\n+\n+link LINK0 dev 0000:18:00.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on\n+link LINK1 dev 0000:18:00.1 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on\n+link LINK2 dev 0000:3b:00.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on\n+link LINK3 dev 0000:3b:00.1 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on\n+\n+pipeline PIPELINE0 create 0\n+\n+pipeline PIPELINE0 port in 0 link LINK0 rxq 0 bsz 32\n+pipeline PIPELINE0 port in 1 link LINK1 rxq 0 bsz 32\n+pipeline PIPELINE0 port in 2 link LINK2 rxq 0 bsz 32\n+pipeline PIPELINE0 port in 3 link LINK3 rxq 0 bsz 32\n+\n+pipeline PIPELINE0 port out 0 link LINK0 txq 0 bsz 32\n+pipeline PIPELINE0 port out 1 link LINK1 txq 0 bsz 32\n+pipeline PIPELINE0 port out 2 link LINK2 txq 0 bsz 32\n+pipeline PIPELINE0 port out 3 link LINK3 txq 0 bsz 32\n+pipeline PIPELINE0 port out 4 sink none\n+\n+pipeline PIPELINE0 build vxlan\n+pipeline PIPELINE0 table vxlan update ./examples/vxlan.txt none none\n+\n+thread 1 pipeline PIPELINE0 enable\ndiff --git a/examples/pipeline/examples/vxlan.py b/examples/pipeline/examples/vxlan.py\nnew file mode 100644\nindex 000000000..179d31b53\n--- /dev/null\n+++ b/examples/pipeline/examples/vxlan.py\n@@ -0,0 +1,71 @@\n+#!/usr/bin/env python2\n+# SPDX-License-Identifier: BSD-3-Clause\n+# Copyright(c) 2020 Intel Corporation\n+#\n+\n+from __future__ import print_function\n+import argparse\n+import re\n+import os\n+\n+DESCRIPTION = 'Table Generator'\n+\n+KEY = '0xaabbccdd{0:04x}'\n+ACTION = 'vxlan_encap'\n+ETHERNET_HEADER = 'ethernet_dst_addr N(0xa0a1a2a3{0:04x}) ' \\\n+\t'ethernet_src_addr N(0xb0b1b2b3{0:04x}) ' \\\n+\t'ethernet_ether_type N(0x0800)'\n+IPV4_HEADER = 'ipv4_ver_ihl N(0x45) ' \\\n+\t'ipv4_diffserv N(0) ' \\\n+\t'ipv4_total_len N(50) ' \\\n+\t'ipv4_identification N(0) ' \\\n+\t'ipv4_flags_offset N(0) ' \\\n+\t'ipv4_ttl N(64) ' \\\n+\t'ipv4_protocol N(17) ' \\\n+\t'ipv4_hdr_checksum N(0x{1:04x}) ' \\\n+\t'ipv4_src_addr N(0xc0c1{0:04x}) ' \\\n+\t'ipv4_dst_addr N(0xd0d1{0:04x})'\n+UDP_HEADER = 'udp_src_port N(0xe0{0:02x}) ' \\\n+\t'udp_dst_port N(4789) ' \\\n+\t'udp_length N(30) ' \\\n+\t'udp_checksum N(0)'\n+VXLAN_HEADER = 'vxlan_flags N(0) ' \\\n+\t'vxlan_reserved N(0) ' \\\n+\t'vxlan_vni N({0:d}) ' \\\n+\t'vxlan_reserved2 N(0)'\n+PORT_OUT = 'port_out H({0:d})'\n+\n+def ipv4_header_checksum(i):\n+\tcksum = (0x4500 + 0x0032) + (0x0000 + 0x0000) + (0x4011 + 0x0000) + (0xc0c1 + i) + (0xd0d1 + i)\n+\tcksum = (cksum & 0xFFFF) + (cksum >> 16)\n+\tcksum = (cksum & 0xFFFF) + (cksum >> 16)\n+\tcksum = ~cksum & 0xFFFF\n+\treturn cksum\n+\n+def table_generate(n, p):\n+\tfor i in range(0, n):\n+\t\tprint(\"match %s action %s %s %s %s %s %s\" % (KEY.format(i),\n+\t\t\tACTION,\n+\t\t\tETHERNET_HEADER.format(i),\n+\t\t\tIPV4_HEADER.format(i, ipv4_header_checksum(i)),\n+\t\t\tUDP_HEADER.format(i % 256),\n+\t\t\tVXLAN_HEADER.format(i),\n+\t\t\tPORT_OUT.format(i % p)))\n+\n+if __name__ == '__main__':\n+\tparser = argparse.ArgumentParser(description=DESCRIPTION)\n+\n+\tparser.add_argument(\n+\t\t'-n',\n+\t\thelp='number of table entries (default: 65536)',\n+\t\trequired=False,\n+\t\tdefault=65536)\n+\n+\tparser.add_argument(\n+\t\t'-p',\n+\t\thelp='number of network ports (default: 4)',\n+\t\trequired=False,\n+\t\tdefault=4)\n+\n+\targs = parser.parse_args()\n+\ttable_generate(int(args.n), int(args.p))\ndiff --git a/examples/pipeline/examples/vxlan.txt b/examples/pipeline/examples/vxlan.txt\nnew file mode 100644\nindex 000000000..acac80a38\n--- /dev/null\n+++ b/examples/pipeline/examples/vxlan.txt\n@@ -0,0 +1,16 @@\n+match 0xaabbccdd0000 action vxlan_encap ethernet_dst_addr N(0xa0a1a2a30000) ethernet_src_addr N(0xb0b1b2b30000) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe928) ipv4_src_addr N(0xc0c10000) ipv4_dst_addr N(0xd0d10000) udp_src_port N(0xe000) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(0) vxlan_reserved2 N(0) port_out H(0)\n+match 0xaabbccdd0001 action vxlan_encap ethernet_dst_addr N(0xa0a1a2a30001) ethernet_src_addr N(0xb0b1b2b30001) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe926) ipv4_src_addr N(0xc0c10001) ipv4_dst_addr N(0xd0d10001) udp_src_port N(0xe001) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(1) vxlan_reserved2 N(0) port_out H(1)\n+match 0xaabbccdd0002 action vxlan_encap ethernet_dst_addr N(0xa0a1a2a30002) ethernet_src_addr N(0xb0b1b2b30002) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe924) ipv4_src_addr N(0xc0c10002) ipv4_dst_addr N(0xd0d10002) udp_src_port N(0xe002) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(2) vxlan_reserved2 N(0) port_out H(2)\n+match 0xaabbccdd0003 action vxlan_encap ethernet_dst_addr N(0xa0a1a2a30003) ethernet_src_addr N(0xb0b1b2b30003) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe922) ipv4_src_addr N(0xc0c10003) ipv4_dst_addr N(0xd0d10003) udp_src_port N(0xe003) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(3) vxlan_reserved2 N(0) port_out H(3)\n+match 0xaabbccdd0004 action vxlan_encap ethernet_dst_addr N(0xa0a1a2a30004) ethernet_src_addr N(0xb0b1b2b30004) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe920) ipv4_src_addr N(0xc0c10004) ipv4_dst_addr N(0xd0d10004) udp_src_port N(0xe004) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(4) vxlan_reserved2 N(0) port_out H(0)\n+match 0xaabbccdd0005 action vxlan_encap ethernet_dst_addr N(0xa0a1a2a30005) ethernet_src_addr N(0xb0b1b2b30005) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe91e) ipv4_src_addr N(0xc0c10005) ipv4_dst_addr N(0xd0d10005) udp_src_port N(0xe005) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(5) vxlan_reserved2 N(0) port_out H(1)\n+match 0xaabbccdd0006 action vxlan_encap ethernet_dst_addr N(0xa0a1a2a30006) ethernet_src_addr N(0xb0b1b2b30006) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe91c) ipv4_src_addr N(0xc0c10006) ipv4_dst_addr N(0xd0d10006) udp_src_port N(0xe006) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(6) vxlan_reserved2 N(0) port_out H(2)\n+match 0xaabbccdd0007 action vxlan_encap ethernet_dst_addr N(0xa0a1a2a30007) ethernet_src_addr N(0xb0b1b2b30007) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe91a) ipv4_src_addr N(0xc0c10007) ipv4_dst_addr N(0xd0d10007) udp_src_port N(0xe007) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(7) vxlan_reserved2 N(0) port_out H(3)\n+match 0xaabbccdd0008 action vxlan_encap ethernet_dst_addr N(0xa0a1a2a30008) ethernet_src_addr N(0xb0b1b2b30008) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe918) ipv4_src_addr N(0xc0c10008) ipv4_dst_addr N(0xd0d10008) udp_src_port N(0xe008) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(8) vxlan_reserved2 N(0) port_out H(0)\n+match 0xaabbccdd0009 action vxlan_encap ethernet_dst_addr N(0xa0a1a2a30009) ethernet_src_addr N(0xb0b1b2b30009) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe916) ipv4_src_addr N(0xc0c10009) ipv4_dst_addr N(0xd0d10009) udp_src_port N(0xe009) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(9) vxlan_reserved2 N(0) port_out H(1)\n+match 0xaabbccdd000a action vxlan_encap ethernet_dst_addr N(0xa0a1a2a3000a) ethernet_src_addr N(0xb0b1b2b3000a) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe914) ipv4_src_addr N(0xc0c1000a) ipv4_dst_addr N(0xd0d1000a) udp_src_port N(0xe00a) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(10) vxlan_reserved2 N(0) port_out H(2)\n+match 0xaabbccdd000b action vxlan_encap ethernet_dst_addr N(0xa0a1a2a3000b) ethernet_src_addr N(0xb0b1b2b3000b) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe912) ipv4_src_addr N(0xc0c1000b) ipv4_dst_addr N(0xd0d1000b) udp_src_port N(0xe00b) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(11) vxlan_reserved2 N(0) port_out H(3)\n+match 0xaabbccdd000c action vxlan_encap ethernet_dst_addr N(0xa0a1a2a3000c) ethernet_src_addr N(0xb0b1b2b3000c) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe910) ipv4_src_addr N(0xc0c1000c) ipv4_dst_addr N(0xd0d1000c) udp_src_port N(0xe00c) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(12) vxlan_reserved2 N(0) port_out H(0)\n+match 0xaabbccdd000d action vxlan_encap ethernet_dst_addr N(0xa0a1a2a3000d) ethernet_src_addr N(0xb0b1b2b3000d) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe90e) ipv4_src_addr N(0xc0c1000d) ipv4_dst_addr N(0xd0d1000d) udp_src_port N(0xe00d) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(13) vxlan_reserved2 N(0) port_out H(1)\n+match 0xaabbccdd000e action vxlan_encap ethernet_dst_addr N(0xa0a1a2a3000e) ethernet_src_addr N(0xb0b1b2b3000e) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe90c) ipv4_src_addr N(0xc0c1000e) ipv4_dst_addr N(0xd0d1000e) udp_src_port N(0xe00e) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(14) vxlan_reserved2 N(0) port_out H(2)\n+match 0xaabbccdd000f action vxlan_encap ethernet_dst_addr N(0xa0a1a2a3000f) ethernet_src_addr N(0xb0b1b2b3000f) ethernet_ether_type N(0x0800) ipv4_ver_ihl N(0x45) ipv4_diffserv N(0) ipv4_total_len N(50) ipv4_identification N(0) ipv4_flags_offset N(0) ipv4_ttl N(64) ipv4_protocol N(17) ipv4_hdr_checksum N(0xe90a) ipv4_src_addr N(0xc0c1000f) ipv4_dst_addr N(0xd0d1000f) udp_src_port N(0xe00f) udp_dst_port N(4789) udp_length N(30) udp_checksum N(0) vxlan_flags N(0) vxlan_reserved N(0) vxlan_vni N(15) vxlan_reserved2 N(0) port_out H(3)\ndiff --git a/examples/pipeline/examples/vxlan_pcap.cli b/examples/pipeline/examples/vxlan_pcap.cli\nnew file mode 100644\nindex 000000000..c406e27d3\n--- /dev/null\n+++ b/examples/pipeline/examples/vxlan_pcap.cli\n@@ -0,0 +1,22 @@\n+; SPDX-License-Identifier: BSD-3-Clause\n+; Copyright(c) 2010-2020 Intel Corporation\n+\n+mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0\n+\n+pipeline PIPELINE0 create 0\n+\n+pipeline PIPELINE0 port in 0 source MEMPOOL0 ./examples/packet.pcap\n+pipeline PIPELINE0 port in 1 source MEMPOOL0 ./examples/packet.pcap\n+pipeline PIPELINE0 port in 2 source MEMPOOL0 ./examples/packet.pcap\n+pipeline PIPELINE0 port in 3 source MEMPOOL0 ./examples/packet.pcap\n+\n+pipeline PIPELINE0 port out 0 sink none\n+pipeline PIPELINE0 port out 1 sink none\n+pipeline PIPELINE0 port out 2 sink none\n+pipeline PIPELINE0 port out 3 sink none\n+pipeline PIPELINE0 port out 4 sink none\n+\n+pipeline PIPELINE0 build vxlan\n+pipeline PIPELINE0 table vxlan update ./examples/vxlan.txt none none\n+\n+thread 1 pipeline PIPELINE0 enable\ndiff --git a/examples/pipeline/meson.build b/examples/pipeline/meson.build\nindex b13f04e01..7f6f5218b 100644\n--- a/examples/pipeline/meson.build\n+++ b/examples/pipeline/meson.build\n@@ -17,4 +17,5 @@ sources = files(\n \t'thread.c',\n \t'example_l2fwd.c',\n \t'example_l2fwd_macswp.c',\n+\t'example_vxlan.c',\n )\n", "prefixes": [ "40/40" ] }