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{
    "id": 76018,
    "url": "http://patches.dpdk.org/api/patches/76018/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200826151445.51500-24-cristian.dumitrescu@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200826151445.51500-24-cristian.dumitrescu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200826151445.51500-24-cristian.dumitrescu@intel.com",
    "date": "2020-08-26T15:14:28",
    "name": "[23/40] pipeline: introduce table instruction",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "0deb20ddd5d7ef10e1aa856be2998e1714fc4e24",
    "submitter": {
        "id": 19,
        "url": "http://patches.dpdk.org/api/people/19/?format=api",
        "name": "Cristian Dumitrescu",
        "email": "cristian.dumitrescu@intel.com"
    },
    "delegate": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200826151445.51500-24-cristian.dumitrescu@intel.com/mbox/",
    "series": [
        {
            "id": 11806,
            "url": "http://patches.dpdk.org/api/series/11806/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11806",
            "date": "2020-08-26T15:14:05",
            "name": "Pipeline alignment with the P4 language",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/11806/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/76018/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/76018/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AFFB0A04B1;\n\tWed, 26 Aug 2020 17:20:05 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 90C191C1BC;\n\tWed, 26 Aug 2020 17:15:37 +0200 (CEST)",
            "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by dpdk.org (Postfix) with ESMTP id 603801C00D\n for <dev@dpdk.org>; Wed, 26 Aug 2020 17:15:11 +0200 (CEST)",
            "from orsmga004.jf.intel.com ([10.7.209.38])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 26 Aug 2020 08:15:10 -0700",
            "from silpixa00400573.ir.intel.com (HELO\n silpixa00400573.ger.corp.intel.com) ([10.237.223.107])\n by orsmga004.jf.intel.com with ESMTP; 26 Aug 2020 08:15:10 -0700"
        ],
        "IronPort-SDR": [
            "\n oxlzlBLeFTaobGrdU45hhwYaNFn1ta2dZOvyCpnE59vjVy4GXvpT++GAAbgBwMSGkZWHI2sOJ8\n CGyYzVTneYVQ==",
            "\n LvgjIhLbgMSCqjUYbUgJmlHjVh4eHFaTAdkXeCQ34+iDh+v8FijrThCqtljaAWoq/D9zBvZWSf\n aGosogYediSg=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9725\"; a=\"153879572\"",
            "E=Sophos;i=\"5.76,356,1592895600\"; d=\"scan'208\";a=\"153879572\"",
            "E=Sophos;i=\"5.76,356,1592895600\"; d=\"scan'208\";a=\"444081399\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Cristian Dumitrescu <cristian.dumitrescu@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Wed, 26 Aug 2020 16:14:28 +0100",
        "Message-Id": "<20200826151445.51500-24-cristian.dumitrescu@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20200826151445.51500-1-cristian.dumitrescu@intel.com>",
        "References": "<20200826151445.51500-1-cristian.dumitrescu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 23/40] pipeline: introduce table instruction",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The table instruction looks up the input key into the table and then\nit triggers the execution of the action found in the table entry. On\nlookup miss, the default table action is executed.\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\n---\n lib/librte_pipeline/rte_swx_pipeline.c | 100 +++++++++++++++++++++++++\n 1 file changed, 100 insertions(+)",
    "diff": "diff --git a/lib/librte_pipeline/rte_swx_pipeline.c b/lib/librte_pipeline/rte_swx_pipeline.c\nindex 0c0490eef..51741dc99 100644\n--- a/lib/librte_pipeline/rte_swx_pipeline.c\n+++ b/lib/librte_pipeline/rte_swx_pipeline.c\n@@ -349,6 +349,9 @@ enum instruction_type {\n \tINSTR_ALU_SHR_HH, /* dst = H, src = H */\n \tINSTR_ALU_SHR_MI, /* dst = MEF, src = I */\n \tINSTR_ALU_SHR_HI, /* dst = H, src = I */\n+\n+\t/* table TABLE */\n+\tINSTR_TABLE,\n };\n \n struct instr_operand {\n@@ -376,6 +379,10 @@ struct instr_hdr_validity {\n \tuint8_t header_id;\n };\n \n+struct instr_table {\n+\tuint8_t table_id;\n+};\n+\n struct instr_dst_src {\n \tstruct instr_operand dst;\n \tunion {\n@@ -405,6 +412,7 @@ struct instruction {\n \t\tstruct instr_dst_src mov;\n \t\tstruct instr_dma dma;\n \t\tstruct instr_dst_src alu;\n+\t\tstruct instr_table table;\n \t};\n };\n \n@@ -2057,6 +2065,15 @@ thread_ip_reset(struct rte_swx_pipeline *p, struct thread *t)\n \tt->ip = p->instructions;\n }\n \n+static inline void\n+thread_ip_action_call(struct rte_swx_pipeline *p,\n+\t\t      struct thread *t,\n+\t\t      uint32_t action_id)\n+{\n+\tt->ret = t->ip + 1;\n+\tt->ip = p->action_instructions[action_id];\n+}\n+\n static inline void\n thread_ip_inc(struct rte_swx_pipeline *p);\n \n@@ -2670,6 +2687,79 @@ instr_hdr_invalidate_exec(struct rte_swx_pipeline *p)\n \tthread_ip_inc(p);\n }\n \n+/*\n+ * table.\n+ */\n+static struct table *\n+table_find(struct rte_swx_pipeline *p, const char *name);\n+\n+static int\n+instr_table_translate(struct rte_swx_pipeline *p,\n+\t\t      struct action *action,\n+\t\t      char **tokens,\n+\t\t      int n_tokens,\n+\t\t      struct instruction *instr,\n+\t\t      struct instruction_data *data __rte_unused)\n+{\n+\tstruct table *t;\n+\n+\tCHECK(!action, EINVAL);\n+\tCHECK(n_tokens == 2, EINVAL);\n+\n+\tt = table_find(p, tokens[1]);\n+\tCHECK(t, EINVAL);\n+\n+\tinstr->type = INSTR_TABLE;\n+\tinstr->table.table_id = t->id;\n+\treturn 0;\n+}\n+\n+static inline void\n+instr_table_exec(struct rte_swx_pipeline *p)\n+{\n+\tstruct thread *t = &p->threads[p->thread_id];\n+\tstruct instruction *ip = t->ip;\n+\tuint32_t table_id = ip->table.table_id;\n+\tstruct rte_swx_table_state *ts = &t->table_state[table_id];\n+\tstruct table_runtime *table = &t->tables[table_id];\n+\tuint64_t action_id;\n+\tuint8_t *action_data;\n+\tint done, hit;\n+\n+\t/* Table. */\n+\tdone = table->func(ts->obj,\n+\t\t\t   table->mailbox,\n+\t\t\t   table->key,\n+\t\t\t   &action_id,\n+\t\t\t   &action_data,\n+\t\t\t   &hit);\n+\tif (!done) {\n+\t\t/* Thread. */\n+\t\tTRACE(\"[Thread %2u] table %u (not finalized)\\n\",\n+\t\t      p->thread_id,\n+\t\t      table_id);\n+\n+\t\tthread_yield(p);\n+\t\treturn;\n+\t}\n+\n+\taction_id = hit ? action_id : ts->default_action_id;\n+\taction_data = hit ? action_data : ts->default_action_data;\n+\n+\tTRACE(\"[Thread %2u] table %u (%s, action %u)\\n\",\n+\t      p->thread_id,\n+\t      table_id,\n+\t      hit ? \"hit\" : \"miss\",\n+\t      (uint32_t)action_id);\n+\n+\tt->action_id = action_id;\n+\tt->structs[0] = action_data;\n+\tt->hit = hit;\n+\n+\t/* Thread. */\n+\tthread_ip_action_call(p, t, action_id);\n+}\n+\n /*\n  * mov.\n  */\n@@ -4269,6 +4359,14 @@ instr_translate(struct rte_swx_pipeline *p,\n \t\t\t\t\t       instr,\n \t\t\t\t\t       data);\n \n+\tif (!strcmp(tokens[tpos], \"table\"))\n+\t\treturn instr_table_translate(p,\n+\t\t\t\t\t     action,\n+\t\t\t\t\t     &tokens[tpos],\n+\t\t\t\t\t     n_tokens - tpos,\n+\t\t\t\t\t     instr,\n+\t\t\t\t\t     data);\n+\n \tCHECK(0, EINVAL);\n }\n \n@@ -4471,6 +4569,8 @@ static instr_exec_t instruction_table[] = {\n \t[INSTR_ALU_SHR_HH] = instr_alu_shr_hh_exec,\n \t[INSTR_ALU_SHR_MI] = instr_alu_shr_mi_exec,\n \t[INSTR_ALU_SHR_HI] = instr_alu_shr_hi_exec,\n+\n+\t[INSTR_TABLE] = instr_table_exec,\n };\n \n static inline void\n",
    "prefixes": [
        "23/40"
    ]
}