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GET /api/patches/75651/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 75651,
    "url": "http://patches.dpdk.org/api/patches/75651/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1597791894-37041-9-git-send-email-nicolas.chautru@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1597791894-37041-9-git-send-email-nicolas.chautru@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1597791894-37041-9-git-send-email-nicolas.chautru@intel.com",
    "date": "2020-08-18T23:04:51",
    "name": "[v2,08/11] baseband/acc100: add interrupt support to PMD",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "85d29e828ba19ba2b653cd28b5a8d2ec5a1fe038",
    "submitter": {
        "id": 1314,
        "url": "http://patches.dpdk.org/api/people/1314/?format=api",
        "name": "Chautru, Nicolas",
        "email": "nicolas.chautru@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1597791894-37041-9-git-send-email-nicolas.chautru@intel.com/mbox/",
    "series": [
        {
            "id": 11695,
            "url": "http://patches.dpdk.org/api/series/11695/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11695",
            "date": "2020-08-18T23:04:43",
            "name": "bbdev PMD ACC100",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/11695/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/75651/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/75651/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 542E8A04AF;\n\tWed, 19 Aug 2020 01:08:06 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id DA58A1C121;\n\tWed, 19 Aug 2020 01:06:57 +0200 (CEST)",
            "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by dpdk.org (Postfix) with ESMTP id BD9DB1C023\n for <dev@dpdk.org>; Wed, 19 Aug 2020 01:06:47 +0200 (CEST)",
            "from orsmga004.jf.intel.com ([10.7.209.38])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 Aug 2020 16:06:44 -0700",
            "from skx-5gnr-sc12-4.sc.intel.com ([172.25.69.210])\n by orsmga004.jf.intel.com with ESMTP; 18 Aug 2020 16:06:44 -0700"
        ],
        "IronPort-SDR": [
            "\n u+BDyTsgyoGWZxr4p4gRVVKM06Et5AMj7/PxZ0XitlKEF+IJ1pZcwOComNSOmeBr3t3hMMrR+R\n SLbvBFGQdVJg==",
            "\n krrQ9wY1gn5hWK2ahFTAxiCdfltDe/l1MVdTrF4NYI3lPop4HINfaJiyQfNct8DNy8v3Jdj3yY\n EJGPOrPQ23ew=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9717\"; a=\"154281363\"",
            "E=Sophos;i=\"5.76,329,1592895600\"; d=\"scan'208\";a=\"154281363\"",
            "E=Sophos;i=\"5.76,329,1592895600\"; d=\"scan'208\";a=\"441400712\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Nicolas Chautru <nicolas.chautru@intel.com>",
        "To": "dev@dpdk.org,\n\takhil.goyal@nxp.com",
        "Cc": "bruce.richardson@intel.com,\n\tNicolas Chautru <nicolas.chautru@intel.com>",
        "Date": "Tue, 18 Aug 2020 16:04:51 -0700",
        "Message-Id": "<1597791894-37041-9-git-send-email-nicolas.chautru@intel.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1597791894-37041-1-git-send-email-nicolas.chautru@intel.com>",
        "References": "<1597791894-37041-1-git-send-email-nicolas.chautru@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2 08/11] baseband/acc100: add interrupt support\n\tto PMD",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Adding capability and functions to support MSI\ninterrupts, call backs and inforing.\n\nSigned-off-by: Nicolas Chautru <nicolas.chautru@intel.com>\n---\n drivers/baseband/acc100/rte_acc100_pmd.c | 288 ++++++++++++++++++++++++++++++-\n drivers/baseband/acc100/rte_acc100_pmd.h |  15 ++\n 2 files changed, 300 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c\nindex 1de7531..ba8e1d8 100644\n--- a/drivers/baseband/acc100/rte_acc100_pmd.c\n+++ b/drivers/baseband/acc100/rte_acc100_pmd.c\n@@ -339,6 +339,213 @@\n \tfree_base_addresses(base_addrs, i);\n }\n \n+/*\n+ * Find queue_id of a device queue based on details from the Info Ring.\n+ * If a queue isn't found UINT16_MAX is returned.\n+ */\n+static inline uint16_t\n+get_queue_id_from_ring_info(struct rte_bbdev_data *data,\n+\t\tconst union acc100_info_ring_data ring_data)\n+{\n+\tuint16_t queue_id;\n+\n+\tfor (queue_id = 0; queue_id < data->num_queues; ++queue_id) {\n+\t\tstruct acc100_queue *acc100_q =\n+\t\t\t\tdata->queues[queue_id].queue_private;\n+\t\tif (acc100_q != NULL && acc100_q->aq_id == ring_data.aq_id &&\n+\t\t\t\tacc100_q->qgrp_id == ring_data.qg_id &&\n+\t\t\t\tacc100_q->vf_id == ring_data.vf_id)\n+\t\t\treturn queue_id;\n+\t}\n+\n+\treturn UINT16_MAX;\n+}\n+\n+/* Checks PF Info Ring to find the interrupt cause and handles it accordingly */\n+static inline void\n+acc100_check_ir(struct acc100_device *acc100_dev)\n+{\n+\tvolatile union acc100_info_ring_data *ring_data;\n+\tuint16_t info_ring_head = acc100_dev->info_ring_head;\n+\tif (acc100_dev->info_ring == NULL)\n+\t\treturn;\n+\n+\tring_data = acc100_dev->info_ring + (acc100_dev->info_ring_head &\n+\t\t\tACC100_INFO_RING_MASK);\n+\n+\twhile (ring_data->valid) {\n+\t\tif ((ring_data->int_nb < ACC100_PF_INT_DMA_DL_DESC_IRQ) || (\n+\t\t\t\tring_data->int_nb >\n+\t\t\t\tACC100_PF_INT_DMA_DL5G_DESC_IRQ))\n+\t\t\trte_bbdev_log(WARNING, \"InfoRing: ITR:%d Info:0x%x\",\n+\t\t\t\tring_data->int_nb, ring_data->detailed_info);\n+\t\t/* Initialize Info Ring entry and move forward */\n+\t\tring_data->val = 0;\n+\t\tinfo_ring_head++;\n+\t\tring_data = acc100_dev->info_ring +\n+\t\t\t\t(info_ring_head & ACC100_INFO_RING_MASK);\n+\t}\n+}\n+\n+/* Checks PF Info Ring to find the interrupt cause and handles it accordingly */\n+static inline void\n+acc100_pf_interrupt_handler(struct rte_bbdev *dev)\n+{\n+\tstruct acc100_device *acc100_dev = dev->data->dev_private;\n+\tvolatile union acc100_info_ring_data *ring_data;\n+\tstruct acc100_deq_intr_details deq_intr_det;\n+\n+\tring_data = acc100_dev->info_ring + (acc100_dev->info_ring_head &\n+\t\t\tACC100_INFO_RING_MASK);\n+\n+\twhile (ring_data->valid) {\n+\n+\t\trte_bbdev_log_debug(\n+\t\t\t\t\"ACC100 PF Interrupt received, Info Ring data: 0x%x\",\n+\t\t\t\tring_data->val);\n+\n+\t\tswitch (ring_data->int_nb) {\n+\t\tcase ACC100_PF_INT_DMA_DL_DESC_IRQ:\n+\t\tcase ACC100_PF_INT_DMA_UL_DESC_IRQ:\n+\t\tcase ACC100_PF_INT_DMA_UL5G_DESC_IRQ:\n+\t\tcase ACC100_PF_INT_DMA_DL5G_DESC_IRQ:\n+\t\t\tdeq_intr_det.queue_id = get_queue_id_from_ring_info(\n+\t\t\t\t\tdev->data, *ring_data);\n+\t\t\tif (deq_intr_det.queue_id == UINT16_MAX) {\n+\t\t\t\trte_bbdev_log(ERR,\n+\t\t\t\t\t\t\"Couldn't find queue: aq_id: %u, qg_id: %u, vf_id: %u\",\n+\t\t\t\t\t\tring_data->aq_id,\n+\t\t\t\t\t\tring_data->qg_id,\n+\t\t\t\t\t\tring_data->vf_id);\n+\t\t\t\treturn;\n+\t\t\t}\n+\t\t\trte_bbdev_pmd_callback_process(dev,\n+\t\t\t\t\tRTE_BBDEV_EVENT_DEQUEUE, &deq_intr_det);\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\trte_bbdev_pmd_callback_process(dev,\n+\t\t\t\t\tRTE_BBDEV_EVENT_ERROR, NULL);\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\t/* Initialize Info Ring entry and move forward */\n+\t\tring_data->val = 0;\n+\t\t++acc100_dev->info_ring_head;\n+\t\tring_data = acc100_dev->info_ring +\n+\t\t\t\t(acc100_dev->info_ring_head &\n+\t\t\t\tACC100_INFO_RING_MASK);\n+\t}\n+}\n+\n+/* Checks VF Info Ring to find the interrupt cause and handles it accordingly */\n+static inline void\n+acc100_vf_interrupt_handler(struct rte_bbdev *dev)\n+{\n+\tstruct acc100_device *acc100_dev = dev->data->dev_private;\n+\tvolatile union acc100_info_ring_data *ring_data;\n+\tstruct acc100_deq_intr_details deq_intr_det;\n+\n+\tring_data = acc100_dev->info_ring + (acc100_dev->info_ring_head &\n+\t\t\tACC100_INFO_RING_MASK);\n+\n+\twhile (ring_data->valid) {\n+\n+\t\trte_bbdev_log_debug(\n+\t\t\t\t\"ACC100 VF Interrupt received, Info Ring data: 0x%x\",\n+\t\t\t\tring_data->val);\n+\n+\t\tswitch (ring_data->int_nb) {\n+\t\tcase ACC100_VF_INT_DMA_DL_DESC_IRQ:\n+\t\tcase ACC100_VF_INT_DMA_UL_DESC_IRQ:\n+\t\tcase ACC100_VF_INT_DMA_UL5G_DESC_IRQ:\n+\t\tcase ACC100_VF_INT_DMA_DL5G_DESC_IRQ:\n+\t\t\t/* VFs are not aware of their vf_id - it's set to 0 in\n+\t\t\t * queue structures.\n+\t\t\t */\n+\t\t\tring_data->vf_id = 0;\n+\t\t\tdeq_intr_det.queue_id = get_queue_id_from_ring_info(\n+\t\t\t\t\tdev->data, *ring_data);\n+\t\t\tif (deq_intr_det.queue_id == UINT16_MAX) {\n+\t\t\t\trte_bbdev_log(ERR,\n+\t\t\t\t\t\t\"Couldn't find queue: aq_id: %u, qg_id: %u\",\n+\t\t\t\t\t\tring_data->aq_id,\n+\t\t\t\t\t\tring_data->qg_id);\n+\t\t\t\treturn;\n+\t\t\t}\n+\t\t\trte_bbdev_pmd_callback_process(dev,\n+\t\t\t\t\tRTE_BBDEV_EVENT_DEQUEUE, &deq_intr_det);\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\trte_bbdev_pmd_callback_process(dev,\n+\t\t\t\t\tRTE_BBDEV_EVENT_ERROR, NULL);\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\t/* Initialize Info Ring entry and move forward */\n+\t\tring_data->valid = 0;\n+\t\t++acc100_dev->info_ring_head;\n+\t\tring_data = acc100_dev->info_ring + (acc100_dev->info_ring_head\n+\t\t\t\t& ACC100_INFO_RING_MASK);\n+\t}\n+}\n+\n+/* Interrupt handler triggered by ACC100 dev for handling specific interrupt */\n+static void\n+acc100_dev_interrupt_handler(void *cb_arg)\n+{\n+\tstruct rte_bbdev *dev = cb_arg;\n+\tstruct acc100_device *acc100_dev = dev->data->dev_private;\n+\n+\t/* Read info ring */\n+\tif (acc100_dev->pf_device)\n+\t\tacc100_pf_interrupt_handler(dev);\n+\telse\n+\t\tacc100_vf_interrupt_handler(dev);\n+}\n+\n+/* Allocate and setup inforing */\n+static int\n+allocate_inforing(struct rte_bbdev *dev)\n+{\n+\tstruct acc100_device *d = dev->data->dev_private;\n+\tconst struct acc100_registry_addr *reg_addr;\n+\trte_iova_t info_ring_phys;\n+\tuint32_t phys_low, phys_high;\n+\n+\tif (d->info_ring != NULL)\n+\t\treturn 0; /* Already configured */\n+\n+\t/* Choose correct registry addresses for the device type */\n+\tif (d->pf_device)\n+\t\treg_addr = &pf_reg_addr;\n+\telse\n+\t\treg_addr = &vf_reg_addr;\n+\t/* Allocate InfoRing */\n+\td->info_ring = rte_zmalloc_socket(\"Info Ring\",\n+\t\t\tACC100_INFO_RING_NUM_ENTRIES *\n+\t\t\tsizeof(*d->info_ring), RTE_CACHE_LINE_SIZE,\n+\t\t\tdev->data->socket_id);\n+\tif (d->info_ring == NULL) {\n+\t\trte_bbdev_log(ERR,\n+\t\t\t\t\"Failed to allocate Info Ring for %s:%u\",\n+\t\t\t\tdev->device->driver->name,\n+\t\t\t\tdev->data->dev_id);\n+\t\treturn -ENOMEM;\n+\t}\n+\tinfo_ring_phys = rte_malloc_virt2iova(d->info_ring);\n+\n+\t/* Setup Info Ring */\n+\tphys_high = (uint32_t)(info_ring_phys >> 32);\n+\tphys_low  = (uint32_t)(info_ring_phys);\n+\tacc100_reg_write(d, reg_addr->info_ring_hi, phys_high);\n+\tacc100_reg_write(d, reg_addr->info_ring_lo, phys_low);\n+\tacc100_reg_write(d, reg_addr->info_ring_en, ACC100_REG_IRQ_EN_ALL);\n+\td->info_ring_head = (acc100_reg_read(d, reg_addr->info_ring_ptr) &\n+\t\t\t0xFFF) / sizeof(union acc100_info_ring_data);\n+\treturn 0;\n+}\n+\n+\n /* Allocate 64MB memory used for all software rings */\n static int\n acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)\n@@ -426,6 +633,7 @@\n \tacc100_reg_write(d, reg_addr->tail_ptrs_dl4g_hi, phys_high);\n \tacc100_reg_write(d, reg_addr->tail_ptrs_dl4g_lo, phys_low);\n \n+\tallocate_inforing(dev);\n \td->harq_layout = rte_zmalloc_socket(\"HARQ Layout\",\n \t\t\tACC100_HARQ_LAYOUT * sizeof(*d->harq_layout),\n \t\t\tRTE_CACHE_LINE_SIZE, dev->data->socket_id);\n@@ -437,13 +645,53 @@\n \treturn 0;\n }\n \n+static int\n+acc100_intr_enable(struct rte_bbdev *dev)\n+{\n+\tint ret;\n+\tstruct acc100_device *d = dev->data->dev_private;\n+\n+\t/* Only MSI are currently supported */\n+\tif (dev->intr_handle->type == RTE_INTR_HANDLE_VFIO_MSI ||\n+\t\t\tdev->intr_handle->type == RTE_INTR_HANDLE_UIO) {\n+\n+\t\tallocate_inforing(dev);\n+\n+\t\tret = rte_intr_enable(dev->intr_handle);\n+\t\tif (ret < 0) {\n+\t\t\trte_bbdev_log(ERR,\n+\t\t\t\t\t\"Couldn't enable interrupts for device: %s\",\n+\t\t\t\t\tdev->data->name);\n+\t\t\trte_free(d->info_ring);\n+\t\t\treturn ret;\n+\t\t}\n+\t\tret = rte_intr_callback_register(dev->intr_handle,\n+\t\t\t\tacc100_dev_interrupt_handler, dev);\n+\t\tif (ret < 0) {\n+\t\t\trte_bbdev_log(ERR,\n+\t\t\t\t\t\"Couldn't register interrupt callback for device: %s\",\n+\t\t\t\t\tdev->data->name);\n+\t\t\trte_free(d->info_ring);\n+\t\t\treturn ret;\n+\t\t}\n+\n+\t\treturn 0;\n+\t}\n+\n+\trte_bbdev_log(ERR, \"ACC100 (%s) supports only VFIO MSI interrupts\",\n+\t\t\tdev->data->name);\n+\treturn -ENOTSUP;\n+}\n+\n /* Free 64MB memory used for software rings */\n static int\n acc100_dev_close(struct rte_bbdev *dev)\n {\n \tstruct acc100_device *d = dev->data->dev_private;\n+\tacc100_check_ir(d);\n \tif (d->sw_rings_base != NULL) {\n \t\trte_free(d->tail_ptrs);\n+\t\trte_free(d->info_ring);\n \t\trte_free(d->sw_rings_base);\n \t\td->sw_rings_base = NULL;\n \t}\n@@ -643,6 +891,7 @@\n \t\t\t\t\tRTE_BBDEV_TURBO_CRC_TYPE_24B |\n \t\t\t\t\tRTE_BBDEV_TURBO_HALF_ITERATION_EVEN |\n \t\t\t\t\tRTE_BBDEV_TURBO_EARLY_TERMINATION |\n+\t\t\t\t\tRTE_BBDEV_TURBO_DEC_INTERRUPTS |\n \t\t\t\t\tRTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN |\n \t\t\t\t\tRTE_BBDEV_TURBO_MAP_DEC |\n \t\t\t\t\tRTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP |\n@@ -663,6 +912,7 @@\n \t\t\t\t\tRTE_BBDEV_TURBO_CRC_24B_ATTACH |\n \t\t\t\t\tRTE_BBDEV_TURBO_RV_INDEX_BYPASS |\n \t\t\t\t\tRTE_BBDEV_TURBO_RATE_MATCH |\n+\t\t\t\t\tRTE_BBDEV_TURBO_ENC_INTERRUPTS |\n \t\t\t\t\tRTE_BBDEV_TURBO_ENC_SCATTER_GATHER,\n \t\t\t\t.num_buffers_src =\n \t\t\t\t\t\tRTE_BBDEV_TURBO_MAX_CODE_BLOCKS,\n@@ -676,7 +926,8 @@\n \t\t\t\t.capability_flags =\n \t\t\t\t\tRTE_BBDEV_LDPC_RATE_MATCH |\n \t\t\t\t\tRTE_BBDEV_LDPC_CRC_24B_ATTACH |\n-\t\t\t\t\tRTE_BBDEV_LDPC_INTERLEAVER_BYPASS,\n+\t\t\t\t\tRTE_BBDEV_LDPC_INTERLEAVER_BYPASS |\n+\t\t\t\t\tRTE_BBDEV_LDPC_ENC_INTERRUPTS,\n \t\t\t\t.num_buffers_src =\n \t\t\t\t\t\tRTE_BBDEV_LDPC_MAX_CODE_BLOCKS,\n \t\t\t\t.num_buffers_dst =\n@@ -701,7 +952,8 @@\n \t\t\t\tRTE_BBDEV_LDPC_DECODE_BYPASS |\n \t\t\t\tRTE_BBDEV_LDPC_DEC_SCATTER_GATHER |\n \t\t\t\tRTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION |\n-\t\t\t\tRTE_BBDEV_LDPC_LLR_COMPRESSION,\n+\t\t\t\tRTE_BBDEV_LDPC_LLR_COMPRESSION |\n+\t\t\t\tRTE_BBDEV_LDPC_DEC_INTERRUPTS,\n \t\t\t.llr_size = 8,\n \t\t\t.llr_decimals = 1,\n \t\t\t.num_buffers_src =\n@@ -751,14 +1003,39 @@\n #else\n \tdev_info->harq_buffer_size = 0;\n #endif\n+\tacc100_check_ir(d);\n+}\n+\n+static int\n+acc100_queue_intr_enable(struct rte_bbdev *dev, uint16_t queue_id)\n+{\n+\tstruct acc100_queue *q = dev->data->queues[queue_id].queue_private;\n+\n+\tif (dev->intr_handle->type != RTE_INTR_HANDLE_VFIO_MSI &&\n+\t\t\tdev->intr_handle->type != RTE_INTR_HANDLE_UIO)\n+\t\treturn -ENOTSUP;\n+\n+\tq->irq_enable = 1;\n+\treturn 0;\n+}\n+\n+static int\n+acc100_queue_intr_disable(struct rte_bbdev *dev, uint16_t queue_id)\n+{\n+\tstruct acc100_queue *q = dev->data->queues[queue_id].queue_private;\n+\tq->irq_enable = 0;\n+\treturn 0;\n }\n \n static const struct rte_bbdev_ops acc100_bbdev_ops = {\n \t.setup_queues = acc100_setup_queues,\n+\t.intr_enable = acc100_intr_enable,\n \t.close = acc100_dev_close,\n \t.info_get = acc100_dev_info_get,\n \t.queue_setup = acc100_queue_setup,\n \t.queue_release = acc100_queue_release,\n+\t.queue_intr_enable = acc100_queue_intr_enable,\n+\t.queue_intr_disable = acc100_queue_intr_disable\n };\n \n /* ACC100 PCI PF address map */\n@@ -3018,8 +3295,10 @@\n \t\t\t? (1 << RTE_BBDEV_DATA_ERROR) : 0);\n \top->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);\n \top->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);\n-\tif (op->status != 0)\n+\tif (op->status != 0) {\n \t\tq_data->queue_stats.dequeue_err_count++;\n+\t\tacc100_check_ir(q->d);\n+\t}\n \n \t/* CRC invalid if error exists */\n \tif (!op->status)\n@@ -3076,6 +3355,9 @@\n \t\top->status |= 1 << RTE_BBDEV_SYNDROME_ERROR;\n \top->ldpc_dec.iter_count = (uint8_t) rsp.iter_cnt;\n \n+\tif (op->status & (1 << RTE_BBDEV_DRV_ERROR))\n+\t\tacc100_check_ir(q->d);\n+\n \t/* Check if this is the last desc in batch (Atomic Queue) */\n \tif (desc->req.last_desc_in_batch) {\n \t\t(*aq_dequeued)++;\ndiff --git a/drivers/baseband/acc100/rte_acc100_pmd.h b/drivers/baseband/acc100/rte_acc100_pmd.h\nindex 0fb6862..fd151fe 100644\n--- a/drivers/baseband/acc100/rte_acc100_pmd.h\n+++ b/drivers/baseband/acc100/rte_acc100_pmd.h\n@@ -559,7 +559,14 @@ struct acc100_device {\n \t/* Virtual address of the info memory routed to the this function under\n \t * operation, whether it is PF or VF.\n \t */\n+\tunion acc100_info_ring_data *info_ring;\n+\n \tunion acc100_harq_layout_data *harq_layout;\n+\t/* Virtual Info Ring head */\n+\tuint16_t info_ring_head;\n+\t/* Number of bytes available for each queue in device, depending on\n+\t * how many queues are enabled with configure()\n+\t */\n \tuint32_t sw_ring_size;\n \tuint32_t ddr_size; /* Size in kB */\n \tuint32_t *tail_ptrs; /* Base address of response tail pointer buffer */\n@@ -575,4 +582,12 @@ struct acc100_device {\n \tbool configured; /**< True if this ACC100 device is configured */\n };\n \n+/**\n+ * Structure with details about RTE_BBDEV_EVENT_DEQUEUE event. It's passed to\n+ * the callback function.\n+ */\n+struct acc100_deq_intr_details {\n+\tuint16_t queue_id;\n+};\n+\n #endif /* _RTE_ACC100_PMD_H_ */\n",
    "prefixes": [
        "v2",
        "08/11"
    ]
}