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GET /api/patches/75067/?format=api
{ "id": 75067, "url": "http://patches.dpdk.org/api/patches/75067/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1596138614-17409-17-git-send-email-timothy.mcdaniel@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1596138614-17409-17-git-send-email-timothy.mcdaniel@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1596138614-17409-17-git-send-email-timothy.mcdaniel@intel.com", "date": "2020-07-30T19:50:03", "name": "[16/27] event/dlb: add infos_get and configure", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e9cb151c2ab182282036b249532a687d95acee85", "submitter": { "id": 826, "url": "http://patches.dpdk.org/api/people/826/?format=api", "name": "Timothy McDaniel", "email": "timothy.mcdaniel@intel.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1596138614-17409-17-git-send-email-timothy.mcdaniel@intel.com/mbox/", "series": [ { "id": 11425, "url": "http://patches.dpdk.org/api/series/11425/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11425", "date": "2020-07-30T19:49:47", "name": "Add Intel DLM PMD to 20.11", "version": 1, "mbox": "http://patches.dpdk.org/series/11425/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/75067/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/75067/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8E98CA052B;\n\tThu, 30 Jul 2020 21:55:57 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8717F1C129;\n\tThu, 30 Jul 2020 21:53:35 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by dpdk.org (Postfix) with ESMTP id 78D031C0B3\n for <dev@dpdk.org>; Thu, 30 Jul 2020 21:53:17 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 30 Jul 2020 12:53:17 -0700", "from txasoft-yocto.an.intel.com ([10.123.72.192])\n by orsmga005.jf.intel.com with ESMTP; 30 Jul 2020 12:53:16 -0700" ], "IronPort-SDR": [ "\n YO8EhS0IauneRSukJGC7TFFhzYTkvZk6GsNIGaUfA+iNGi/BAcldQ1gnVQKlNnKE61Jh9nmjPq\n NoKauxoRAjKQ==", "\n wpIceYB5KBsFbkcSxDXbiNqLobHcoYjCTDHbnqvdkPrUc81y9Xa9y2R32GSyDk7JV+brvxm/I8\n e7FmmshpKwcQ==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9698\"; a=\"139672324\"", "E=Sophos;i=\"5.75,415,1589266800\"; d=\"scan'208\";a=\"139672324\"", "E=Sophos;i=\"5.75,415,1589266800\"; d=\"scan'208\";a=\"465378126\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "\"McDaniel, Timothy\" <timothy.mcdaniel@intel.com>", "To": "jerinj@marvell.com", "Cc": "mattias.ronnblom@ericsson.com, dev@dpdk.org, gage.eads@intel.com,\n harry.van.haaren@intel.com,\n \"McDaniel, Timothy\" <timothy.mcdaniel@intel.com>", "Date": "Thu, 30 Jul 2020 14:50:03 -0500", "Message-Id": "<1596138614-17409-17-git-send-email-timothy.mcdaniel@intel.com>", "X-Mailer": "git-send-email 1.7.10", "In-Reply-To": "<1596138614-17409-1-git-send-email-timothy.mcdaniel@intel.com>", "References": "<1593232671-5690-0-git-send-email-timothy.mcdaniel@intel.com>\n <1596138614-17409-1-git-send-email-timothy.mcdaniel@intel.com>", "Subject": "[dpdk-dev] [PATCH 16/27] event/dlb: add infos_get and configure", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: \"McDaniel, Timothy\" <timothy.mcdaniel@intel.com>\n\nSigned-off-by: McDaniel, Timothy <timothy.mcdaniel@intel.com>\n---\n drivers/event/dlb/dlb.c | 401 +++++++++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 401 insertions(+)", "diff": "diff --git a/drivers/event/dlb/dlb.c b/drivers/event/dlb/dlb.c\nindex c1054d7..2da5cd1 100644\n--- a/drivers/event/dlb/dlb.c\n+++ b/drivers/event/dlb/dlb.c\n@@ -218,6 +218,395 @@ int dlb_string_to_int(int *result, const char *str)\n \t\t\t DLB_MAX_NUM_DIR_CREDITS);\n \t\treturn -EINVAL;\n \t}\n+\treturn 0;\n+}\n+\n+/* VDEV-only notes:\n+ * This function first unmaps all memory mappings and closes the\n+ * domain's file descriptor, which causes the driver to reset the\n+ * scheduling domain. Once that completes (when close() returns), we\n+ * can safely free the dynamically allocated memory used by the\n+ * scheduling domain.\n+ *\n+ * PF-only notes:\n+ * We will maintain a use count and use that to determine when\n+ * a reset is required. In PF mode, we never mmap, or munmap\n+ * device memory, and we own the entire physical PCI device.\n+ */\n+\n+static void\n+dlb_hw_reset_sched_domain(const struct rte_eventdev *dev, bool reconfig)\n+{\n+\tstruct dlb_eventdev *dlb = dlb_pmd_priv(dev);\n+\tenum dlb_configuration_state config_state;\n+\tint i, j;\n+\n+\t/* Close and reset the domain */\n+\tdlb_iface_domain_close(dlb);\n+\n+\t/* Free all dynamically allocated port memory */\n+\tfor (i = 0; i < dlb->num_ports; i++)\n+\t\tdlb_free_qe_mem(&dlb->ev_ports[i].qm_port);\n+\n+\t/* If reconfiguring, mark the device's queues and ports as \"previously\n+\t * configured.\" If the user doesn't reconfigure them, the PMD will\n+\t * reapply their previous configuration when the device is started.\n+\t */\n+\tconfig_state = (reconfig) ? DLB_PREV_CONFIGURED : DLB_NOT_CONFIGURED;\n+\n+\tfor (i = 0; i < dlb->num_ports; i++) {\n+\t\tdlb->ev_ports[i].qm_port.config_state = config_state;\n+\t\t/* Reset setup_done so ports can be reconfigured */\n+\t\tdlb->ev_ports[i].setup_done = false;\n+\t\tfor (j = 0; j < DLB_MAX_NUM_QIDS_PER_LDB_CQ; j++)\n+\t\t\tdlb->ev_ports[i].link[j].mapped = false;\n+\t}\n+\n+\tfor (i = 0; i < dlb->num_queues; i++)\n+\t\tdlb->ev_queues[i].qm_queue.config_state = config_state;\n+\n+\tfor (i = 0; i < DLB_MAX_NUM_QUEUES; i++)\n+\t\tdlb->ev_queues[i].setup_done = false;\n+\n+\tdlb->num_ports = 0;\n+\tdlb->num_ldb_ports = 0;\n+\tdlb->num_dir_ports = 0;\n+\tdlb->num_queues = 0;\n+\tdlb->num_ldb_queues = 0;\n+\tdlb->num_dir_queues = 0;\n+\tdlb->configured = false;\n+}\n+\n+static int\n+dlb_ldb_credit_pool_create(struct dlb_hw_dev *handle)\n+{\n+\tstruct dlb_create_ldb_pool_args cfg;\n+\tstruct dlb_cmd_response response;\n+\tint ret;\n+\n+\tif (handle == NULL)\n+\t\treturn -EINVAL;\n+\n+\tif (!handle->cfg.resources.num_ldb_credits) {\n+\t\thandle->cfg.ldb_credit_pool_id = 0;\n+\t\thandle->cfg.num_ldb_credits = 0;\n+\t\treturn 0;\n+\t}\n+\n+\tcfg.response = (uintptr_t)&response;\n+\tcfg.num_ldb_credits = handle->cfg.resources.num_ldb_credits;\n+\n+\tret = dlb_iface_ldb_credit_pool_create(handle,\n+\t\t\t\t\t &cfg);\n+\tif (ret < 0) {\n+\t\tDLB_LOG_ERR(\"dlb: ldb_credit_pool_create ret=%d (driver status: %s)\\n\",\n+\t\t\t ret, dlb_error_strings[response.status]);\n+\t}\n+\n+\thandle->cfg.ldb_credit_pool_id = response.id;\n+\thandle->cfg.num_ldb_credits = cfg.num_ldb_credits;\n+\n+\treturn ret;\n+}\n+\n+static int\n+dlb_dir_credit_pool_create(struct dlb_hw_dev *handle)\n+{\n+\tstruct dlb_create_dir_pool_args cfg;\n+\tstruct dlb_cmd_response response;\n+\tint ret;\n+\n+\tif (handle == NULL)\n+\t\treturn -EINVAL;\n+\n+\tif (!handle->cfg.resources.num_dir_credits) {\n+\t\thandle->cfg.dir_credit_pool_id = 0;\n+\t\thandle->cfg.num_dir_credits = 0;\n+\t\treturn 0;\n+\t}\n+\n+\tcfg.response = (uintptr_t)&response;\n+\tcfg.num_dir_credits = handle->cfg.resources.num_dir_credits;\n+\n+\tret = dlb_iface_dir_credit_pool_create(handle,\n+\t\t\t\t\t &cfg);\n+\tif (ret < 0)\n+\t\tDLB_LOG_ERR(\"dlb: dir_credit_pool_create ret=%d (driver status: %s)\\n\",\n+\t\t\t ret, dlb_error_strings[response.status]);\n+\n+\thandle->cfg.dir_credit_pool_id = response.id;\n+\thandle->cfg.num_dir_credits = cfg.num_dir_credits;\n+\n+\treturn ret;\n+}\n+\n+static int\n+dlb_hw_create_sched_domain(struct dlb_hw_dev *handle,\n+\t\t\t struct dlb_eventdev *dlb,\n+\t\t\t const struct dlb_hw_rsrcs *resources_asked)\n+{\n+\tint ret = 0;\n+\tstruct dlb_create_sched_domain_args *config_params;\n+\tstruct dlb_cmd_response response;\n+\n+\tif (resources_asked == NULL) {\n+\t\tDLB_LOG_ERR(\"dlb: dlb_create NULL parameter\\n\");\n+\t\tret = EINVAL;\n+\t\tgoto error_exit;\n+\t}\n+\n+\t/* Map generic qm resources to dlb resources */\n+\tconfig_params = &handle->cfg.resources;\n+\n+\tconfig_params->response = (uintptr_t)&response;\n+\n+\t/* DIR ports and queues */\n+\n+\tconfig_params->num_dir_ports =\n+\t\tresources_asked->num_dir_ports;\n+\n+\tconfig_params->num_dir_credits =\n+\t\tresources_asked->num_dir_credits;\n+\n+\t/* LDB ports and queues */\n+\n+\tconfig_params->num_ldb_queues =\n+\t\tresources_asked->num_ldb_queues;\n+\n+\tconfig_params->num_ldb_ports =\n+\t\tresources_asked->num_ldb_ports;\n+\n+\tconfig_params->num_ldb_credits =\n+\t\tresources_asked->num_ldb_credits;\n+\n+\tconfig_params->num_atomic_inflights =\n+\t\tdlb->num_atm_inflights_per_queue *\n+\t\tconfig_params->num_ldb_queues;\n+\n+\tconfig_params->num_hist_list_entries = config_params->num_ldb_ports *\n+\t\tDLB_NUM_HIST_LIST_ENTRIES_PER_LDB_PORT;\n+\n+\t/* dlb limited to 1 credit pool per queue type */\n+\tconfig_params->num_ldb_credit_pools = 1;\n+\tconfig_params->num_dir_credit_pools = 1;\n+\n+\tDLB_LOG_DBG(\"sched domain create - ldb_qs=%d, ldb_ports=%d, dir_ports=%d, atomic_inflights=%d, hist_list_entries=%d, ldb_credits=%d, dir_credits=%d, ldb_cred_pools=%d, dir-credit_pools=%d\\n\",\n+\t\t config_params->num_ldb_queues,\n+\t\t config_params->num_ldb_ports,\n+\t\t config_params->num_dir_ports,\n+\t\t config_params->num_atomic_inflights,\n+\t\t config_params->num_hist_list_entries,\n+\t\t config_params->num_ldb_credits,\n+\t\t config_params->num_dir_credits,\n+\t\t config_params->num_ldb_credit_pools,\n+\t\t config_params->num_dir_credit_pools);\n+\n+\t/* Configure the QM */\n+\n+\tret = dlb_iface_sched_domain_create(handle, config_params);\n+\tif (ret < 0) {\n+\t\tDLB_LOG_ERR(\"dlb: domain create failed, device_id = %d, (driver ret = %d, extra status: %s)\\n\",\n+\t\t\t handle->device_id,\n+\t\t\t ret,\n+\t\t\t dlb_error_strings[response.status]);\n+\t\tgoto error_exit;\n+\t}\n+\n+\thandle->domain_id = response.id;\n+\thandle->domain_id_valid = 1;\n+\n+\tconfig_params->response = 0;\n+\n+\tret = dlb_ldb_credit_pool_create(handle);\n+\tif (ret < 0) {\n+\t\tDLB_LOG_ERR(\"dlb: create ldb credit pool failed\\n\");\n+\t\tgoto error_exit2;\n+\t}\n+\n+\tret = dlb_dir_credit_pool_create(handle);\n+\tif (ret < 0) {\n+\t\tDLB_LOG_ERR(\"dlb: create dir credit pool failed\\n\");\n+\t\tgoto error_exit2;\n+\t}\n+\n+\thandle->cfg.configured = true;\n+\n+\treturn 0;\n+\n+error_exit2:\n+\tdlb_iface_domain_close(dlb);\n+\n+error_exit:\n+\n+\treturn ret;\n+}\n+\n+/* End HW specific */\n+static void\n+dlb_eventdev_info_get(struct rte_eventdev *dev,\n+\t\t struct rte_event_dev_info *dev_info)\n+{\n+\tstruct dlb_eventdev *dlb = dlb_pmd_priv(dev);\n+\tint ret;\n+\n+\tret = dlb_hw_query_resources(dlb);\n+\tif (ret) {\n+\t\tconst struct rte_eventdev_data *data = dev->data;\n+\n+\t\tDLB_LOG_ERR(\"get resources err=%d, devid=%d\\n\",\n+\t\t\t ret, data->dev_id);\n+\t\t/* fn is void, so fall through and return values set up in\n+\t\t * probe\n+\t\t */\n+\t}\n+\n+\t/* Add num resources currently owned by this domain.\n+\t * These would become available if the scheduling domain were reset due\n+\t * to the application recalling eventdev_configure to *reconfigure* the\n+\t * domain.\n+\t */\n+\tevdev_dlb_default_info.max_event_ports += dlb->num_ldb_ports;\n+\tevdev_dlb_default_info.max_event_queues += dlb->num_ldb_queues;\n+\tevdev_dlb_default_info.max_num_events += dlb->num_ldb_credits;\n+\n+\n+\t/* In DLB A-stepping hardware, applications are limited to 128\n+\t * configured ports (load-balanced or directed). The reported number of\n+\t * available ports must reflect this.\n+\t */\n+\tif (dlb->revision < DLB_REV_B0) {\n+\t\tint used_ports;\n+\n+\t\tused_ports = DLB_MAX_NUM_LDB_PORTS + DLB_MAX_NUM_DIR_PORTS -\n+\t\t\tdlb->hw_rsrc_query_results.num_ldb_ports -\n+\t\t\tdlb->hw_rsrc_query_results.num_dir_ports;\n+\n+\t\tevdev_dlb_default_info.max_event_ports =\n+\t\t\tRTE_MIN(evdev_dlb_default_info.max_event_ports,\n+\t\t\t\t128 - used_ports);\n+\t}\n+\n+\tevdev_dlb_default_info.max_event_queues =\n+\t\tRTE_MIN(evdev_dlb_default_info.max_event_queues,\n+\t\t\tRTE_EVENT_MAX_QUEUES_PER_DEV);\n+\n+\tevdev_dlb_default_info.max_num_events =\n+\t\tRTE_MIN(evdev_dlb_default_info.max_num_events,\n+\t\t\tdlb->max_num_events_override);\n+\n+\t*dev_info = evdev_dlb_default_info;\n+}\n+\n+/* Note: 1 QM instance per QM device, QM instance/device == event device */\n+static int\n+dlb_eventdev_configure(const struct rte_eventdev *dev)\n+{\n+\tstruct dlb_eventdev *dlb = dlb_pmd_priv(dev);\n+\tstruct dlb_hw_dev *handle = &dlb->qm_instance;\n+\tstruct dlb_hw_rsrcs *rsrcs = &handle->info.hw_rsrc_max;\n+\tconst struct rte_eventdev_data *data = dev->data;\n+\tconst struct rte_event_dev_config *config = &data->dev_conf;\n+\tint ret;\n+\n+\t/* If this eventdev is already configured, we must release the current\n+\t * scheduling domain before attempting to configure a new one.\n+\t */\n+\tif (dlb->configured) {\n+\t\tdlb_hw_reset_sched_domain(dev, true);\n+\n+\t\tret = dlb_hw_query_resources(dlb);\n+\t\tif (ret) {\n+\t\t\tDLB_LOG_ERR(\"get resources err=%d, devid=%d\\n\",\n+\t\t\t\t ret, data->dev_id);\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n+\n+\tif (config->nb_event_queues > rsrcs->num_queues) {\n+\t\tDLB_LOG_ERR(\"nb_event_queues parameter (%d) exceeds the QM device's capabilities (%d).\\n\",\n+\t\t\t config->nb_event_queues,\n+\t\t\t rsrcs->num_queues);\n+\t\treturn -EINVAL;\n+\t}\n+\tif (config->nb_event_ports > (rsrcs->num_ldb_ports\n+\t\t\t+ rsrcs->num_dir_ports)) {\n+\t\tDLB_LOG_ERR(\"nb_event_ports parameter (%d) exceeds the QM device's capabilities (%d).\\n\",\n+\t\t\t config->nb_event_ports,\n+\t\t\t (rsrcs->num_ldb_ports + rsrcs->num_dir_ports));\n+\t\treturn -EINVAL;\n+\t}\n+\tif (config->nb_events_limit > rsrcs->nb_events_limit) {\n+\t\tDLB_LOG_ERR(\"nb_events_limit parameter (%d) exceeds the QM device's capabilities (%d).\\n\",\n+\t\t\t config->nb_events_limit,\n+\t\t\t rsrcs->nb_events_limit);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (config->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT) {\n+\t\tdlb->global_dequeue_wait = false;\n+\t} else {\n+\t\tuint32_t timeout32;\n+\n+\t\tdlb->global_dequeue_wait = true;\n+\n+\t\ttimeout32 = config->dequeue_timeout_ns;\n+\n+\t\t/* PF PMD does not support interrupts, and\n+\t\t * UMONITOR wait is temporarily disabled.\n+\t\t */\n+\n+\t\tdlb->global_dequeue_wait_ticks =\n+\t\t\ttimeout32 * (rte_get_timer_hz() / 1E9);\n+\t}\n+\n+\t/* Does this platform support umonitor/umwait? */\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_UMWAIT)) {\n+\t\tif (RTE_LIBRTE_PMD_DLB_UMWAIT_CTL_STATE != 0 &&\n+\t\t RTE_LIBRTE_PMD_DLB_UMWAIT_CTL_STATE != 1) {\n+\t\t\tDLB_LOG_ERR(\"invalid value (%d) for RTE_LIBRTE_PMD_DLB_UMWAIT_CTL_STATE must be 0 or 1.\\n\",\n+\t\t\t\t RTE_LIBRTE_PMD_DLB_UMWAIT_CTL_STATE);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tdlb->umwait_allowed = true;\n+\t}\n+\n+\trsrcs->num_dir_ports = config->nb_single_link_event_port_queues;\n+\trsrcs->num_ldb_ports = config->nb_event_ports - rsrcs->num_dir_ports;\n+\t/* 1 dir queue per dir port */\n+\trsrcs->num_ldb_queues = config->nb_event_queues - rsrcs->num_dir_ports;\n+\n+\t/* Scale down nb_events_limit by 4 for directed credits, since there\n+\t * are 4x as many load-balanced credits.\n+\t */\n+\trsrcs->num_ldb_credits = 0;\n+\trsrcs->num_dir_credits = 0;\n+\n+\tif (rsrcs->num_ldb_queues)\n+\t\trsrcs->num_ldb_credits = config->nb_events_limit;\n+\tif (rsrcs->num_dir_ports)\n+\t\trsrcs->num_dir_credits = config->nb_events_limit / 4;\n+\tif (dlb->num_dir_credits_override != -1)\n+\t\trsrcs->num_dir_credits = dlb->num_dir_credits_override;\n+\n+\tif (dlb_hw_create_sched_domain(handle, dlb, rsrcs) < 0) {\n+\t\tDLB_LOG_ERR(\"dlb_hw_create_sched_domain failed\\n\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tdlb->new_event_limit = config->nb_events_limit;\n+\trte_atomic32_set(&dlb->inflights, 0);\n+\n+\t/* Save number of ports/queues for this event dev */\n+\tdlb->num_ports = config->nb_event_ports;\n+\tdlb->num_queues = config->nb_event_queues;\n+\tdlb->num_dir_ports = rsrcs->num_dir_ports;\n+\tdlb->num_ldb_ports = dlb->num_ports - dlb->num_dir_ports;\n+\tdlb->num_ldb_queues = dlb->num_queues - dlb->num_dir_ports;\n+\tdlb->num_dir_queues = dlb->num_dir_ports;\n+\tdlb->num_ldb_credits = rsrcs->num_ldb_credits;\n+\tdlb->num_dir_credits = rsrcs->num_dir_credits;\n+\n+\tdlb->configured = true;\n \n \treturn 0;\n }\n@@ -292,6 +681,18 @@ int dlb_string_to_int(int *result, const char *str)\n \treturn 0;\n }\n \n+void\n+dlb_entry_points_init(struct rte_eventdev *dev)\n+{\n+\tstatic struct rte_eventdev_ops dlb_eventdev_entry_ops = {\n+\t\t.dev_infos_get = dlb_eventdev_info_get,\n+\t\t.dev_configure = dlb_eventdev_configure,\n+\t};\n+\n+\t/* Expose PMD's eventdev interface */\n+\tdev->dev_ops = &dlb_eventdev_entry_ops;\n+\n+}\n \n static void\n dlb_qm_mmio_fn_init(void)\n", "prefixes": [ "16/27" ] }