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GET /api/patches/74881/?format=api
{ "id": 74881, "url": "http://patches.dpdk.org/api/patches/74881/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200727220341.29084-4-manishc@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200727220341.29084-4-manishc@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200727220341.29084-4-manishc@marvell.com", "date": "2020-07-27T22:03:38", "name": "[v4,3/6] net/qede: configure VFs on hardware", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d567e47b7367b329c086b42352fd32cf678fb037", "submitter": { "id": 1591, "url": "http://patches.dpdk.org/api/people/1591/?format=api", "name": "Manish Chopra", "email": "manishc@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200727220341.29084-4-manishc@marvell.com/mbox/", "series": [ { "id": 11335, "url": "http://patches.dpdk.org/api/series/11335/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11335", "date": "2020-07-27T22:03:35", "name": "qede: SR-IOV PF driver support", "version": 4, "mbox": "http://patches.dpdk.org/series/11335/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/74881/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/74881/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E5B7FA052B;\n\tTue, 28 Jul 2020 00:05:24 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C5E422C6E;\n\tTue, 28 Jul 2020 00:05:24 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 287742C01\n for <dev@dpdk.org>; Tue, 28 Jul 2020 00:05:23 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 06RLjiGb020739; Mon, 27 Jul 2020 15:05:22 -0700", "from sc-exch01.marvell.com ([199.233.58.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 32gm8ngkgy-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 27 Jul 2020 15:05:22 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Mon, 27 Jul 2020 15:05:20 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Mon, 27 Jul 2020 15:05:20 -0700", "from dut1171.mv.qlogic.com (unknown [10.112.88.18])\n by maili.marvell.com (Postfix) with ESMTP id 7A1293F703F;\n Mon, 27 Jul 2020 15:05:20 -0700 (PDT)", "from dut1171.mv.qlogic.com (localhost [127.0.0.1])\n by dut1171.mv.qlogic.com (8.14.7/8.14.7) with ESMTP id 06RM5KSl029142;\n Mon, 27 Jul 2020 15:05:20 -0700", "(from root@localhost)\n by dut1171.mv.qlogic.com (8.14.7/8.14.7/Submit) id 06RM5KMD029141;\n Mon, 27 Jul 2020 15:05:20 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0818; bh=jFsi+/He4RSzGaHg1257ewwXDyCHHNbdFcUwtrxvrZU=;\n b=HGkIR5/py8te6TQsZPY7ehERIAdoWh1Owy0vS7TWMtV74WiwtCQsfIljZP5m5witETbr\n 740JVLnO3xc+BHC4u2saqH2tphXkdaK+VFYqYKKVGYwAMXFYZD0Oox46V/vY26gAOBpy\n xTswIEmclWG5w1tmS2yXz1EfqbRn94m/ZSNf/AYJ8ku0o88qja+bQhKiXLAyjl/1okq0\n lHiSvUwMy74IQUsh6EXJBa4meuHzDPJp0MadSrzk4Ot/S4cBrW1vSrSD6o56Oi7h/GIA\n c/GFJ8pqw9Q0+lACTbrYPCsRwnRLgQ6OVu/6wrdRKnwElBl1ulyPaCdKA9YynHwjiUqB ow==", "From": "Manish Chopra <manishc@marvell.com>", "To": "<jerinjacobk@gmail.com>, <jerinj@marvell.com>, <ferruh.yigit@intel.com>,\n <grive@u256.net>", "CC": "<dev@dpdk.org>, <irusskikh@marvell.com>, <rmody@marvell.com>,\n <GR-Everest-DPDK-Dev@marvell.com>, <rosen.xu@intel.com>,\n <tianfei.zhang@intel.com>, <heinrich.kuhn@netronome.com>,\n <qiming.yang@intel.com>, <qi.z.zhang@intel.com>", "Date": "Mon, 27 Jul 2020 15:03:38 -0700", "Message-ID": "<20200727220341.29084-4-manishc@marvell.com>", "X-Mailer": "git-send-email 2.12.0", "In-Reply-To": "<20200727220341.29084-1-manishc@marvell.com>", "References": "<20200727220341.29084-1-manishc@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687\n definitions=2020-07-27_15:2020-07-27,\n 2020-07-27 signatures=0", "Subject": "[dpdk-dev] [PATCH v4 3/6] net/qede: configure VFs on hardware", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Based on number of VFs enabled at PCI, PF-PMD driver instance\nenables/configures those VFs from hardware perspective, such\nthat in later patches they could get required HW access to\ncommunicate with PFs for slowpath configuration and run the\nfastpath themsleves.\n\nThis patch also add two new qede IOV files [qede_sriov(.c|.h)]\nunder qede directory to add non-base driver IOV APIs/contents there.\n\nSigned-off-by: Manish Chopra <manishc@marvell.com>\nSigned-off-by: Igor Russkikh <irusskikh@marvell.com>\nSigned-off-by: Rasesh Mody <rmody@marvell.com>\n---\n drivers/net/qede/Makefile | 1 +\n drivers/net/qede/meson.build | 1 +\n drivers/net/qede/qede_ethdev.c | 1 +\n drivers/net/qede/qede_ethdev.h | 1 +\n drivers/net/qede/qede_if.h | 1 +\n drivers/net/qede/qede_main.c | 1 +\n drivers/net/qede/qede_sriov.c | 85 ++++++++++++++++++++++++++++++++++\n drivers/net/qede/qede_sriov.h | 9 ++++\n 8 files changed, 100 insertions(+)\n create mode 100644 drivers/net/qede/qede_sriov.c\n create mode 100644 drivers/net/qede/qede_sriov.h", "diff": "diff --git a/drivers/net/qede/Makefile b/drivers/net/qede/Makefile\nindex 0e8a67b0d..c57bef0e3 100644\n--- a/drivers/net/qede/Makefile\n+++ b/drivers/net/qede/Makefile\n@@ -105,5 +105,6 @@ SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_rxtx.c\n SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_filter.c\n SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_debug.c\n SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_regs.c\n+SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_sriov.c\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/net/qede/meson.build b/drivers/net/qede/meson.build\nindex 05c9bff73..ff0ac0b03 100644\n--- a/drivers/net/qede/meson.build\n+++ b/drivers/net/qede/meson.build\n@@ -11,6 +11,7 @@ sources = files(\n \t'qede_rxtx.c',\n \t'qede_debug.c',\n \t'qede_regs.c',\n+\t'qede_sriov.c',\n )\n \n if cc.has_argument('-Wno-format-nonliteral')\ndiff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c\nindex 70d48e48e..0235c0798 100644\n--- a/drivers/net/qede/qede_ethdev.c\n+++ b/drivers/net/qede/qede_ethdev.c\n@@ -2700,6 +2700,7 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)\n \t\tadapter->vxlan.enable = false;\n \t\tadapter->geneve.enable = false;\n \t\tadapter->ipgre.enable = false;\n+\t\tqed_ops->sriov_configure(edev, pci_dev->max_vfs);\n \t}\n \n \tDP_INFO(edev, \"MAC address : %02x:%02x:%02x:%02x:%02x:%02x\\n\",\ndiff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h\nindex 76c5dae3b..4fb77b05c 100644\n--- a/drivers/net/qede/qede_ethdev.h\n+++ b/drivers/net/qede/qede_ethdev.h\n@@ -34,6 +34,7 @@\n #include \"base/ecore_l2.h\"\n #include \"base/ecore_vf.h\"\n \n+#include \"qede_sriov.h\"\n #include \"qede_logs.h\"\n #include \"qede_if.h\"\n #include \"qede_rxtx.h\"\ndiff --git a/drivers/net/qede/qede_if.h b/drivers/net/qede/qede_if.h\nindex c5ae3fb2e..1693a243f 100644\n--- a/drivers/net/qede/qede_if.h\n+++ b/drivers/net/qede/qede_if.h\n@@ -82,6 +82,7 @@ struct qed_eth_ops {\n \tconst struct qed_common_ops *common;\n \tint (*fill_dev_info)(struct ecore_dev *edev,\n \t\t\t struct qed_dev_eth_info *info);\n+\tvoid (*sriov_configure)(struct ecore_dev *edev, int num_vfs);\n };\n \n struct qed_link_params {\ndiff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c\nindex d919f9f11..c37e8ebe0 100644\n--- a/drivers/net/qede/qede_main.c\n+++ b/drivers/net/qede/qede_main.c\n@@ -822,6 +822,7 @@ const struct qed_common_ops qed_common_ops_pass = {\n const struct qed_eth_ops qed_eth_ops_pass = {\n \tINIT_STRUCT_FIELD(common, &qed_common_ops_pass),\n \tINIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info),\n+\tINIT_STRUCT_FIELD(sriov_configure, &qed_sriov_configure),\n };\n \n const struct qed_eth_ops *qed_get_eth_ops(void)\ndiff --git a/drivers/net/qede/qede_sriov.c b/drivers/net/qede/qede_sriov.c\nnew file mode 100644\nindex 000000000..ba4384e90\n--- /dev/null\n+++ b/drivers/net/qede/qede_sriov.c\n@@ -0,0 +1,85 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (c) 2020 Marvell.\n+ * All rights reserved.\n+ * www.marvell.com\n+ */\n+\n+#include \"qede_sriov.h\"\n+\n+static void qed_sriov_enable_qid_config(struct ecore_hwfn *hwfn,\n+\t\t\t\t\tu16 vfid,\n+\t\t\t\t\tstruct ecore_iov_vf_init_params *params)\n+{\n+\tu16 num_pf_l2_queues, base, i;\n+\n+\t/* Since we have an equal resource distribution per-VF, and we assume\n+\t * PF has acquired its first queues, we start setting sequentially from\n+\t * there.\n+\t */\n+\tnum_pf_l2_queues = (u16)FEAT_NUM(hwfn, ECORE_PF_L2_QUE);\n+\n+\tbase = num_pf_l2_queues + vfid * params->num_queues;\n+\tparams->rel_vf_id = vfid;\n+\n+\tfor (i = 0; i < params->num_queues; i++) {\n+\t\tparams->req_rx_queue[i] = base + i;\n+\t\tparams->req_tx_queue[i] = base + i;\n+\t}\n+\n+\t/* PF uses indices 0 for itself; Set vport/RSS afterwards */\n+\tparams->vport_id = vfid + 1;\n+\tparams->rss_eng_id = vfid + 1;\n+}\n+\n+static void qed_sriov_enable(struct ecore_dev *edev, int num)\n+{\n+\tstruct ecore_iov_vf_init_params params;\n+\tstruct ecore_hwfn *p_hwfn;\n+\tstruct ecore_ptt *p_ptt;\n+\tint i, j, rc;\n+\n+\tif ((u32)num >= RESC_NUM(&edev->hwfns[0], ECORE_VPORT)) {\n+\t\tDP_NOTICE(edev, false, \"Can start at most %d VFs\\n\",\n+\t\t\t RESC_NUM(&edev->hwfns[0], ECORE_VPORT) - 1);\n+\t\treturn;\n+\t}\n+\n+\tOSAL_MEMSET(¶ms, 0, sizeof(struct ecore_iov_vf_init_params));\n+\n+\tfor_each_hwfn(edev, j) {\n+\t\tint feat_num;\n+\n+\t\tp_hwfn = &edev->hwfns[j];\n+\t\tp_ptt = ecore_ptt_acquire(p_hwfn);\n+\t\tfeat_num = FEAT_NUM(p_hwfn, ECORE_VF_L2_QUE) / num;\n+\n+\t\tparams.num_queues = OSAL_MIN_T(int, feat_num, 16);\n+\n+\t\tfor (i = 0; i < num; i++) {\n+\t\t\tif (!ecore_iov_is_valid_vfid(p_hwfn, i, false, true))\n+\t\t\t\tcontinue;\n+\n+\t\t\tqed_sriov_enable_qid_config(p_hwfn, i, ¶ms);\n+\n+\t\t\trc = ecore_iov_init_hw_for_vf(p_hwfn, p_ptt, ¶ms);\n+\t\t\tif (rc) {\n+\t\t\t\tDP_ERR(edev, \"Failed to enable VF[%d]\\n\", i);\n+\t\t\t\tecore_ptt_release(p_hwfn, p_ptt);\n+\t\t\t\treturn;\n+\t\t\t}\n+\t\t}\n+\n+\t\tecore_ptt_release(p_hwfn, p_ptt);\n+\t}\n+}\n+\n+void qed_sriov_configure(struct ecore_dev *edev, int num_vfs_param)\n+{\n+\tif (!IS_ECORE_SRIOV(edev)) {\n+\t\tDP_VERBOSE(edev, ECORE_MSG_IOV, \"SR-IOV is not supported\\n\");\n+\t\treturn;\n+\t}\n+\n+\tif (num_vfs_param)\n+\t\tqed_sriov_enable(edev, num_vfs_param);\n+}\ndiff --git a/drivers/net/qede/qede_sriov.h b/drivers/net/qede/qede_sriov.h\nnew file mode 100644\nindex 000000000..6c85b1dd5\n--- /dev/null\n+++ b/drivers/net/qede/qede_sriov.h\n@@ -0,0 +1,9 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (c) 2020 Marvell.\n+ * All rights reserved.\n+ * www.marvell.com\n+ */\n+\n+#include \"qede_ethdev.h\"\n+\n+void qed_sriov_configure(struct ecore_dev *edev, int num_vfs_param);\n", "prefixes": [ "v4", "3/6" ] }