Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/74755/?format=api
{ "id": 74755, "url": "http://patches.dpdk.org/api/patches/74755/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200724110007.41303-4-rnagadheeraj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200724110007.41303-4-rnagadheeraj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200724110007.41303-4-rnagadheeraj@marvell.com", "date": "2020-07-24T11:00:07", "name": "[3/3] crypto/nitrox: support cipher only crypto operations", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "7cd6c2dc686103da6ffe061bad87464958c9a41a", "submitter": { "id": 1365, "url": "http://patches.dpdk.org/api/people/1365/?format=api", "name": "Nagadheeraj Rottela", "email": "rnagadheeraj@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200724110007.41303-4-rnagadheeraj@marvell.com/mbox/", "series": [ { "id": 11282, "url": "http://patches.dpdk.org/api/series/11282/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11282", "date": "2020-07-24T11:00:04", "name": "Add AES-GCM and cipher only offload support", "version": 1, "mbox": "http://patches.dpdk.org/series/11282/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/74755/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/74755/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6C95DA0518;\n\tFri, 24 Jul 2020 13:00:48 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 5A7DA1C05C;\n\tFri, 24 Jul 2020 13:00:27 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id CE3AA1C031\n for <dev@dpdk.org>; Fri, 24 Jul 2020 13:00:23 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 06OAtqiA008351; Fri, 24 Jul 2020 04:00:23 -0700", "from sc-exch02.marvell.com ([199.233.58.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 32bxep2bsr-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Fri, 24 Jul 2020 04:00:22 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH02.marvell.com\n (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Fri, 24 Jul 2020 04:00:22 -0700", "from hyd1669.caveonetworks.com (10.69.176.80) by\n DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id\n 15.0.1497.2 via Frontend Transport; Fri, 24 Jul 2020 04:00:20 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=sT48N2iDRFtCW8v1VQnUo5WP5b92JuWC8e9vuPOTYbg=;\n b=h8jlhRkv56PVPzH2p4PBbjbrcCjJ3PNWVucP3jpp0jAECgOPaTugUz10wwEqHkQNhHqW\n pfS9/3JOdZgOOjuZrh6OO0FrANF5V7HFiZRTF0IyDNwwbagnXLWSf+J3kow96qxz/EHF\n 2sSks/pCY59XPCLxXSjnRNpLmGhh6ksXioOTZgeOfKPFQYMJsJunPR0uB53i8hc9Ok07\n Aj9W5srmieFgIx9uNDa6f/dLpJe3wprpgKCdGj8sGGoD0SvDK93+jAtTCIW3AienHV3H\n 4fLvJd4K/z+ELWr0YzVmp0b4KP1kUdSPrvoxnhH+gOT1312igMgyOwYQD44Eckh21QOL RA==", "From": "Nagadheeraj Rottela <rnagadheeraj@marvell.com>", "To": "<akhil.goyal@nxp.com>", "CC": "<dev@dpdk.org>, <jsrikanth@marvell.com>, Nagadheeraj Rottela\n <rnagadheeraj@marvell.com>", "Date": "Fri, 24 Jul 2020 16:30:07 +0530", "Message-ID": "<20200724110007.41303-4-rnagadheeraj@marvell.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20200724110007.41303-1-rnagadheeraj@marvell.com>", "References": "<20200724110007.41303-1-rnagadheeraj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687\n definitions=2020-07-24_03:2020-07-24,\n 2020-07-24 signatures=0", "Subject": "[dpdk-dev] [PATCH 3/3] crypto/nitrox: support cipher only crypto\n\toperations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds cipher only crypto operation support.\n\nSigned-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>\n---\n doc/guides/cryptodevs/nitrox.rst | 2 -\n drivers/crypto/nitrox/nitrox_sym.c | 3 +\n drivers/crypto/nitrox/nitrox_sym_reqmgr.c | 189 ++++++++++++++++------\n 3 files changed, 143 insertions(+), 51 deletions(-)", "diff": "diff --git a/doc/guides/cryptodevs/nitrox.rst b/doc/guides/cryptodevs/nitrox.rst\nindex 91fca905a..095e545c6 100644\n--- a/doc/guides/cryptodevs/nitrox.rst\n+++ b/doc/guides/cryptodevs/nitrox.rst\n@@ -33,8 +33,6 @@ Supported AEAD algorithms:\n Limitations\n -----------\n \n-* AES_CBC Cipher Only combination is not supported.\n-* 3DES Cipher Only combination is not supported.\n * Session-less APIs are not supported.\n \n Installation\ndiff --git a/drivers/crypto/nitrox/nitrox_sym.c b/drivers/crypto/nitrox/nitrox_sym.c\nindex fe3ee6e23..2768bdd2e 100644\n--- a/drivers/crypto/nitrox/nitrox_sym.c\n+++ b/drivers/crypto/nitrox/nitrox_sym.c\n@@ -550,6 +550,9 @@ nitrox_sym_dev_sess_configure(struct rte_cryptodev *cdev,\n \tctx = mp_obj;\n \tctx->nitrox_chain = get_crypto_chain_order(xform);\n \tswitch (ctx->nitrox_chain) {\n+\tcase NITROX_CHAIN_CIPHER_ONLY:\n+\t\tcipher_xform = &xform->cipher;\n+\t\tbreak;\n \tcase NITROX_CHAIN_CIPHER_AUTH:\n \t\tcipher_xform = &xform->cipher;\n \t\tauth_xform = &xform->next->auth;\ndiff --git a/drivers/crypto/nitrox/nitrox_sym_reqmgr.c b/drivers/crypto/nitrox/nitrox_sym_reqmgr.c\nindex 93d59b048..b5bbd1fd2 100644\n--- a/drivers/crypto/nitrox/nitrox_sym_reqmgr.c\n+++ b/drivers/crypto/nitrox/nitrox_sym_reqmgr.c\n@@ -247,38 +247,6 @@ softreq_copy_iv(struct nitrox_softreq *sr, uint8_t salt_size)\n \tsr->iv.len = sr->ctx->iv.length - salt_size;\n }\n \n-static int\n-extract_cipher_auth_digest(struct nitrox_softreq *sr,\n-\t\t\t struct nitrox_sglist *digest)\n-{\n-\tstruct rte_crypto_op *op = sr->op;\n-\tstruct rte_mbuf *mdst = op->sym->m_dst ? op->sym->m_dst :\n-\t\t\t\t\top->sym->m_src;\n-\n-\tif (sr->ctx->req_op == NITROX_OP_DECRYPT &&\n-\t unlikely(!op->sym->auth.digest.data))\n-\t\treturn -EINVAL;\n-\n-\tdigest->len = sr->ctx->digest_length;\n-\tif (op->sym->auth.digest.data) {\n-\t\tdigest->iova = op->sym->auth.digest.phys_addr;\n-\t\tdigest->virt = op->sym->auth.digest.data;\n-\t\treturn 0;\n-\t}\n-\n-\tif (unlikely(rte_pktmbuf_data_len(mdst) < op->sym->auth.data.offset +\n-\t op->sym->auth.data.length + digest->len))\n-\t\treturn -EINVAL;\n-\n-\tdigest->iova = rte_pktmbuf_mtophys_offset(mdst,\n-\t\t\t\t\top->sym->auth.data.offset +\n-\t\t\t\t\top->sym->auth.data.length);\n-\tdigest->virt = rte_pktmbuf_mtod_offset(mdst, uint8_t *,\n-\t\t\t\t\top->sym->auth.data.offset +\n-\t\t\t\t\top->sym->auth.data.length);\n-\treturn 0;\n-}\n-\n static void\n fill_sglist(struct nitrox_sgtable *sgtbl, uint16_t len, rte_iova_t iova,\n \t void *virt)\n@@ -340,6 +308,143 @@ create_sglist_from_mbuf(struct nitrox_sgtable *sgtbl, struct rte_mbuf *mbuf,\n \treturn 0;\n }\n \n+static void\n+create_sgcomp(struct nitrox_sgtable *sgtbl)\n+{\n+\tint i, j, nr_sgcomp;\n+\tstruct nitrox_sgcomp *sgcomp = sgtbl->sgcomp;\n+\tstruct nitrox_sglist *sglist = sgtbl->sglist;\n+\n+\tnr_sgcomp = RTE_ALIGN_MUL_CEIL(sgtbl->map_bufs_cnt, 4) / 4;\n+\tsgtbl->nr_sgcomp = nr_sgcomp;\n+\tfor (i = 0; i < nr_sgcomp; i++, sgcomp++) {\n+\t\tfor (j = 0; j < 4; j++, sglist++) {\n+\t\t\tsgcomp->len[j] = rte_cpu_to_be_16(sglist->len);\n+\t\t\tsgcomp->iova[j] = rte_cpu_to_be_64(sglist->iova);\n+\t\t}\n+\t}\n+}\n+\n+static int\n+create_cipher_inbuf(struct nitrox_softreq *sr)\n+{\n+\tint err;\n+\tstruct rte_crypto_op *op = sr->op;\n+\n+\tfill_sglist(&sr->in, sr->iv.len, sr->iv.iova, sr->iv.virt);\n+\terr = create_sglist_from_mbuf(&sr->in, op->sym->m_src,\n+\t\t\t\t op->sym->cipher.data.offset,\n+\t\t\t\t op->sym->cipher.data.length);\n+\tif (unlikely(err))\n+\t\treturn err;\n+\n+\tcreate_sgcomp(&sr->in);\n+\tsr->dptr = sr->iova + offsetof(struct nitrox_softreq, in.sgcomp);\n+\n+\treturn 0;\n+}\n+\n+static int\n+create_cipher_outbuf(struct nitrox_softreq *sr)\n+{\n+\tstruct rte_crypto_op *op = sr->op;\n+\tint err, cnt = 0;\n+\tstruct rte_mbuf *m_dst = op->sym->m_dst ? op->sym->m_dst :\n+\t\top->sym->m_src;\n+\n+\tsr->resp.orh = PENDING_SIG;\n+\tsr->out.sglist[cnt].len = sizeof(sr->resp.orh);\n+\tsr->out.sglist[cnt].iova = sr->iova + offsetof(struct nitrox_softreq,\n+\t\t\t\t\t\t resp.orh);\n+\tsr->out.sglist[cnt].virt = &sr->resp.orh;\n+\tcnt++;\n+\n+\tsr->out.map_bufs_cnt = cnt;\n+\tfill_sglist(&sr->out, sr->iv.len, sr->iv.iova, sr->iv.virt);\n+\terr = create_sglist_from_mbuf(&sr->out, m_dst,\n+\t\t\t\t op->sym->cipher.data.offset,\n+\t\t\t\t op->sym->cipher.data.length);\n+\tif (unlikely(err))\n+\t\treturn err;\n+\n+\tcnt = sr->out.map_bufs_cnt;\n+\tsr->resp.completion = PENDING_SIG;\n+\tsr->out.sglist[cnt].len = sizeof(sr->resp.completion);\n+\tsr->out.sglist[cnt].iova = sr->iova + offsetof(struct nitrox_softreq,\n+\t\t\t\t\t\t resp.completion);\n+\tsr->out.sglist[cnt].virt = &sr->resp.completion;\n+\tcnt++;\n+\n+\tRTE_VERIFY(cnt <= MAX_SGBUF_CNT);\n+\tsr->out.map_bufs_cnt = cnt;\n+\n+\tcreate_sgcomp(&sr->out);\n+\tsr->rptr = sr->iova + offsetof(struct nitrox_softreq, out.sgcomp);\n+\n+\treturn 0;\n+}\n+\n+static void\n+create_cipher_gph(uint32_t cryptlen, uint16_t ivlen, struct gphdr *gph)\n+{\n+\tgph->param0 = rte_cpu_to_be_16(cryptlen);\n+\tgph->param1 = 0;\n+\tgph->param2 = rte_cpu_to_be_16(ivlen);\n+\tgph->param3 = 0;\n+}\n+\n+static int\n+process_cipher_data(struct nitrox_softreq *sr)\n+{\n+\tstruct rte_crypto_op *op = sr->op;\n+\tint err;\n+\n+\tsoftreq_copy_iv(sr, 0);\n+\terr = create_cipher_inbuf(sr);\n+\tif (unlikely(err))\n+\t\treturn err;\n+\n+\terr = create_cipher_outbuf(sr);\n+\tif (unlikely(err))\n+\t\treturn err;\n+\n+\tcreate_cipher_gph(op->sym->cipher.data.length, sr->iv.len, &sr->gph);\n+\n+\treturn 0;\n+}\n+\n+static int\n+extract_cipher_auth_digest(struct nitrox_softreq *sr,\n+\t\t\t struct nitrox_sglist *digest)\n+{\n+\tstruct rte_crypto_op *op = sr->op;\n+\tstruct rte_mbuf *mdst = op->sym->m_dst ? op->sym->m_dst :\n+\t\t\t\t\top->sym->m_src;\n+\n+\tif (sr->ctx->req_op == NITROX_OP_DECRYPT &&\n+\t unlikely(!op->sym->auth.digest.data))\n+\t\treturn -EINVAL;\n+\n+\tdigest->len = sr->ctx->digest_length;\n+\tif (op->sym->auth.digest.data) {\n+\t\tdigest->iova = op->sym->auth.digest.phys_addr;\n+\t\tdigest->virt = op->sym->auth.digest.data;\n+\t\treturn 0;\n+\t}\n+\n+\tif (unlikely(rte_pktmbuf_data_len(mdst) < op->sym->auth.data.offset +\n+\t op->sym->auth.data.length + digest->len))\n+\t\treturn -EINVAL;\n+\n+\tdigest->iova = rte_pktmbuf_mtophys_offset(mdst,\n+\t\t\t\t\top->sym->auth.data.offset +\n+\t\t\t\t\top->sym->auth.data.length);\n+\tdigest->virt = rte_pktmbuf_mtod_offset(mdst, uint8_t *,\n+\t\t\t\t\top->sym->auth.data.offset +\n+\t\t\t\t\top->sym->auth.data.length);\n+\treturn 0;\n+}\n+\n static int\n create_cipher_auth_sglist(struct nitrox_softreq *sr,\n \t\t\t struct nitrox_sgtable *sgtbl, struct rte_mbuf *mbuf)\n@@ -408,23 +513,6 @@ create_aead_sglist(struct nitrox_softreq *sr, struct nitrox_sgtable *sgtbl,\n \treturn err;\n }\n \n-static void\n-create_sgcomp(struct nitrox_sgtable *sgtbl)\n-{\n-\tint i, j, nr_sgcomp;\n-\tstruct nitrox_sgcomp *sgcomp = sgtbl->sgcomp;\n-\tstruct nitrox_sglist *sglist = sgtbl->sglist;\n-\n-\tnr_sgcomp = RTE_ALIGN_MUL_CEIL(sgtbl->map_bufs_cnt, 4) / 4;\n-\tsgtbl->nr_sgcomp = nr_sgcomp;\n-\tfor (i = 0; i < nr_sgcomp; i++, sgcomp++) {\n-\t\tfor (j = 0; j < 4; j++, sglist++) {\n-\t\t\tsgcomp->len[j] = rte_cpu_to_be_16(sglist->len);\n-\t\t\tsgcomp->iova[j] = rte_cpu_to_be_64(sglist->iova);\n-\t\t}\n-\t}\n-}\n-\n static int\n create_aead_inbuf(struct nitrox_softreq *sr, struct nitrox_sglist *digest)\n {\n@@ -661,6 +749,9 @@ process_softreq(struct nitrox_softreq *sr)\n \tint err = 0;\n \n \tswitch (ctx->nitrox_chain) {\n+\tcase NITROX_CHAIN_CIPHER_ONLY:\n+\t\terr = process_cipher_data(sr);\n+\t\tbreak;\n \tcase NITROX_CHAIN_CIPHER_AUTH:\n \tcase NITROX_CHAIN_AUTH_CIPHER:\n \t\terr = process_cipher_auth_data(sr);\n", "prefixes": [ "3/3" ] }