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GET /api/patches/7442/?format=api
{ "id": 7442, "url": "http://patches.dpdk.org/api/patches/7442/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1444067692-29645-3-git-send-email-adrien.mazarguil@6wind.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1444067692-29645-3-git-send-email-adrien.mazarguil@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1444067692-29645-3-git-send-email-adrien.mazarguil@6wind.com", "date": "2015-10-05T17:54:37", "name": "[dpdk-dev,02/17] mlx5: get rid of the WR structure in RX queue elements", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "475c886850a62d2b9e97b2121f34969b58f63721", "submitter": { "id": 165, "url": "http://patches.dpdk.org/api/people/165/?format=api", "name": "Adrien Mazarguil", "email": "adrien.mazarguil@6wind.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1444067692-29645-3-git-send-email-adrien.mazarguil@6wind.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/7442/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/7442/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id DA536924F;\n\tMon, 5 Oct 2015 19:55:16 +0200 (CEST)", "from mail-wi0-f169.google.com (mail-wi0-f169.google.com\n\t[209.85.212.169]) by dpdk.org (Postfix) with ESMTP id 1B389924A\n\tfor <dev@dpdk.org>; Mon, 5 Oct 2015 19:55:16 +0200 (CEST)", "by wicge5 with SMTP id ge5so132048129wic.0\n\tfor <dev@dpdk.org>; Mon, 05 Oct 2015 10:55:16 -0700 (PDT)", "from 6wind.com (guy78-3-82-239-227-177.fbx.proxad.net.\n\t[82.239.227.177]) by smtp.gmail.com with ESMTPSA id\n\t12sm28075675wjw.15.2015.10.05.10.55.14\n\t(version=TLSv1.2 cipher=RC4-SHA bits=128/128);\n\tMon, 05 Oct 2015 10:55:15 -0700 (PDT)" ], "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=RmPCnPnRIrv61lFLNHEZYN2HvuPC+G8dTVoLDPIxf1Y=;\n\tb=BqykdOo/58GlysHI0zpnV1mRrG/nNLs715uFMqGwFUH9bG6tn6Xi7dq6i1a0pTdhcw\n\tJOQ7oyLr4fTlgOQuJoEdtxiy/h71C1Q+DOMyNIi9dKauESpIOtIfCLOIFp/bQUnIschy\n\tMwBK3rmGHrCx65BqbFPQ2XYJG7SOafkeasMY2Cpp8Zx5aSI+se4+aYUncfcJ7xpkDMqB\n\tlU0vorLPlStZPzlpr4rgfMNSVM9fBGOkbayPOEMlcus11f+sCP1PYX8yO+9/OABKaSqG\n\tZpCTxmgbwEIvluiHRpncwHRndazRAxtfwSLl7y5TuW9pGgVWmcdRwbVV34CZeZGCkAMJ\n\tzQ0w==", "X-Gm-Message-State": "ALoCoQl2Ud2DhcMXLjR55Gs7nVxlg/I6eEUBSAcSF4iv3IMuNtCMkqzskUwYXknYJGj6lRVqEvRX", "X-Received": "by 10.194.184.73 with SMTP id es9mr37864694wjc.122.1444067715979;\n\tMon, 05 Oct 2015 10:55:15 -0700 (PDT)", "From": "Adrien Mazarguil <adrien.mazarguil@6wind.com>", "To": "dev@dpdk.org", "Date": "Mon, 5 Oct 2015 19:54:37 +0200", "Message-Id": "<1444067692-29645-3-git-send-email-adrien.mazarguil@6wind.com>", "X-Mailer": "git-send-email 2.1.0", "In-Reply-To": "<1444067692-29645-1-git-send-email-adrien.mazarguil@6wind.com>", "References": "<1444067692-29645-1-git-send-email-adrien.mazarguil@6wind.com>", "Subject": "[dpdk-dev] [PATCH 02/17] mlx5: get rid of the WR structure in RX\n\tqueue elements", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Removing this structure reduces the size of SG and non-SG RX queue elements\nsignificantly to improve performance.\n\nAn nice side effect is that the mbuf pointer is now fully stored in\nstruct rxq_elt instead of relying on the WR ID data offset hack.\n\nSigned-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>\nSigned-off-by: Olga Shern <olgas@mellanox.com>\nSigned-off-by: Or Ami <ora@mellanox.com>\nSigned-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>\n---\n drivers/net/mlx5/mlx5.h | 18 -----\n drivers/net/mlx5/mlx5_rxq.c | 162 ++++++++++++++++++++----------------------\n drivers/net/mlx5/mlx5_rxtx.c | 33 +++------\n drivers/net/mlx5/mlx5_rxtx.h | 4 +-\n drivers/net/mlx5/mlx5_utils.h | 2 -\n 5 files changed, 87 insertions(+), 132 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 459dc3d..a818703 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -118,24 +118,6 @@ struct priv {\n \trte_spinlock_t lock; /* Lock for control functions. */\n };\n \n-/* Work Request ID data type (64 bit). */\n-typedef union {\n-\tstruct {\n-\t\tuint32_t id;\n-\t\tuint16_t offset;\n-\t} data;\n-\tuint64_t raw;\n-} wr_id_t;\n-\n-/* Compile-time check. */\n-static inline void wr_id_t_check(void)\n-{\n-\twr_id_t check[1 + (2 * -!(sizeof(wr_id_t) == sizeof(uint64_t)))];\n-\n-\t(void)check;\n-\t(void)wr_id_t_check;\n-}\n-\n /**\n * Lock private structure to protect it from concurrent access in the\n * control path.\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 8cfad17..c938d2d 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -97,16 +97,10 @@ rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,\n \tfor (i = 0; (i != elts_n); ++i) {\n \t\tunsigned int j;\n \t\tstruct rxq_elt_sp *elt = &(*elts)[i];\n-\t\tstruct ibv_recv_wr *wr = &elt->wr;\n \t\tstruct ibv_sge (*sges)[RTE_DIM(elt->sges)] = &elt->sges;\n \n \t\t/* These two arrays must have the same size. */\n \t\tassert(RTE_DIM(elt->sges) == RTE_DIM(elt->bufs));\n-\t\t/* Configure WR. */\n-\t\twr->wr_id = i;\n-\t\twr->next = &(*elts)[(i + 1)].wr;\n-\t\twr->sg_list = &(*sges)[0];\n-\t\twr->num_sge = RTE_DIM(*sges);\n \t\t/* For each SGE (segment). */\n \t\tfor (j = 0; (j != RTE_DIM(elt->bufs)); ++j) {\n \t\t\tstruct ibv_sge *sge = &(*sges)[j];\n@@ -149,8 +143,6 @@ rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,\n \t\t\tassert(sge->length == rte_pktmbuf_tailroom(buf));\n \t\t}\n \t}\n-\t/* The last WR pointer must be NULL. */\n-\t(*elts)[(i - 1)].wr.next = NULL;\n \tDEBUG(\"%p: allocated and configured %u WRs (%zu segments)\",\n \t (void *)rxq, elts_n, (elts_n * RTE_DIM((*elts)[0].sges)));\n \trxq->elts_n = elts_n;\n@@ -242,7 +234,6 @@ rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)\n \t/* For each WR (packet). */\n \tfor (i = 0; (i != elts_n); ++i) {\n \t\tstruct rxq_elt *elt = &(*elts)[i];\n-\t\tstruct ibv_recv_wr *wr = &elt->wr;\n \t\tstruct ibv_sge *sge = &(*elts)[i].sge;\n \t\tstruct rte_mbuf *buf;\n \n@@ -258,16 +249,7 @@ rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)\n \t\t\tret = ENOMEM;\n \t\t\tgoto error;\n \t\t}\n-\t\t/* Configure WR. Work request ID contains its own index in\n-\t\t * the elts array and the offset between SGE buffer header and\n-\t\t * its data. */\n-\t\tWR_ID(wr->wr_id).id = i;\n-\t\tWR_ID(wr->wr_id).offset =\n-\t\t\t(((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -\n-\t\t\t (uintptr_t)buf);\n-\t\twr->next = &(*elts)[(i + 1)].wr;\n-\t\twr->sg_list = sge;\n-\t\twr->num_sge = 1;\n+\t\telt->buf = buf;\n \t\t/* Headroom is reserved by rte_pktmbuf_alloc(). */\n \t\tassert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);\n \t\t/* Buffer is supposed to be empty. */\n@@ -282,21 +264,7 @@ rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)\n \t\tsge->lkey = rxq->mr->lkey;\n \t\t/* Redundant check for tailroom. */\n \t\tassert(sge->length == rte_pktmbuf_tailroom(buf));\n-\t\t/* Make sure elts index and SGE mbuf pointer can be deduced\n-\t\t * from WR ID. */\n-\t\tif ((WR_ID(wr->wr_id).id != i) ||\n-\t\t ((void *)((uintptr_t)sge->addr -\n-\t\t\tWR_ID(wr->wr_id).offset) != buf)) {\n-\t\t\tERROR(\"%p: cannot store index and offset in WR ID\",\n-\t\t\t (void *)rxq);\n-\t\t\tsge->addr = 0;\n-\t\t\trte_pktmbuf_free(buf);\n-\t\t\tret = EOVERFLOW;\n-\t\t\tgoto error;\n-\t\t}\n \t}\n-\t/* The last WR pointer must be NULL. */\n-\t(*elts)[(i - 1)].wr.next = NULL;\n \tDEBUG(\"%p: allocated and configured %u single-segment WRs\",\n \t (void *)rxq, elts_n);\n \trxq->elts_n = elts_n;\n@@ -309,14 +277,10 @@ error:\n \t\tassert(pool == NULL);\n \t\tfor (i = 0; (i != RTE_DIM(*elts)); ++i) {\n \t\t\tstruct rxq_elt *elt = &(*elts)[i];\n-\t\t\tstruct rte_mbuf *buf;\n+\t\t\tstruct rte_mbuf *buf = elt->buf;\n \n-\t\t\tif (elt->sge.addr == 0)\n-\t\t\t\tcontinue;\n-\t\t\tassert(WR_ID(elt->wr.wr_id).id == i);\n-\t\t\tbuf = (void *)((uintptr_t)elt->sge.addr -\n-\t\t\t\tWR_ID(elt->wr.wr_id).offset);\n-\t\t\trte_pktmbuf_free_seg(buf);\n+\t\t\tif (buf != NULL)\n+\t\t\t\trte_pktmbuf_free_seg(buf);\n \t\t}\n \t\trte_free(elts);\n \t}\n@@ -345,14 +309,10 @@ rxq_free_elts(struct rxq *rxq)\n \t\treturn;\n \tfor (i = 0; (i != RTE_DIM(*elts)); ++i) {\n \t\tstruct rxq_elt *elt = &(*elts)[i];\n-\t\tstruct rte_mbuf *buf;\n+\t\tstruct rte_mbuf *buf = elt->buf;\n \n-\t\tif (elt->sge.addr == 0)\n-\t\t\tcontinue;\n-\t\tassert(WR_ID(elt->wr.wr_id).id == i);\n-\t\tbuf = (void *)((uintptr_t)elt->sge.addr -\n-\t\t\tWR_ID(elt->wr.wr_id).offset);\n-\t\trte_pktmbuf_free_seg(buf);\n+\t\tif (buf != NULL)\n+\t\t\trte_pktmbuf_free_seg(buf);\n \t}\n \trte_free(elts);\n }\n@@ -552,7 +512,6 @@ rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)\n \tstruct rte_mbuf **pool;\n \tunsigned int i, k;\n \tstruct ibv_exp_qp_attr mod;\n-\tstruct ibv_recv_wr *bad_wr;\n \tint err;\n \tint parent = (rxq == &priv->rxq_parent);\n \n@@ -673,11 +632,8 @@ rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)\n \n \t\tfor (i = 0; (i != RTE_DIM(*elts)); ++i) {\n \t\t\tstruct rxq_elt *elt = &(*elts)[i];\n-\t\t\tstruct rte_mbuf *buf = (void *)\n-\t\t\t\t((uintptr_t)elt->sge.addr -\n-\t\t\t\t WR_ID(elt->wr.wr_id).offset);\n+\t\t\tstruct rte_mbuf *buf = elt->buf;\n \n-\t\t\tassert(WR_ID(elt->wr.wr_id).id == i);\n \t\t\tpool[k++] = buf;\n \t\t}\n \t}\n@@ -701,17 +657,36 @@ rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)\n \trxq->elts_n = 0;\n \trte_free(rxq->elts.sp);\n \trxq->elts.sp = NULL;\n-\t/* Post WRs. */\n-\terr = ibv_post_recv(tmpl.qp,\n-\t\t\t (tmpl.sp ?\n-\t\t\t &(*tmpl.elts.sp)[0].wr :\n-\t\t\t &(*tmpl.elts.no_sp)[0].wr),\n-\t\t\t &bad_wr);\n+\t/* Post SGEs. */\n+\tassert(tmpl.if_qp != NULL);\n+\tif (tmpl.sp) {\n+\t\tstruct rxq_elt_sp (*elts)[tmpl.elts_n] = tmpl.elts.sp;\n+\n+\t\tfor (i = 0; (i != RTE_DIM(*elts)); ++i) {\n+\t\t\terr = tmpl.if_qp->recv_sg_list\n+\t\t\t\t(tmpl.qp,\n+\t\t\t\t (*elts)[i].sges,\n+\t\t\t\t RTE_DIM((*elts)[i].sges));\n+\t\t\tif (err)\n+\t\t\t\tbreak;\n+\t\t}\n+\t} else {\n+\t\tstruct rxq_elt (*elts)[tmpl.elts_n] = tmpl.elts.no_sp;\n+\n+\t\tfor (i = 0; (i != RTE_DIM(*elts)); ++i) {\n+\t\t\terr = tmpl.if_qp->recv_burst(\n+\t\t\t\ttmpl.qp,\n+\t\t\t\t&(*elts)[i].sge,\n+\t\t\t\t1);\n+\t\t\tif (err)\n+\t\t\t\tbreak;\n+\t\t}\n+\t}\n \tif (err) {\n-\t\tERROR(\"%p: ibv_post_recv() failed for WR %p: %s\",\n-\t\t (void *)dev,\n-\t\t (void *)bad_wr,\n-\t\t strerror(err));\n+\t\tERROR(\"%p: failed to post SGEs with error %d\",\n+\t\t (void *)dev, err);\n+\t\t/* Set err because it does not contain a valid errno value. */\n+\t\terr = EIO;\n \t\tgoto skip_rtr;\n \t}\n \tmod = (struct ibv_exp_qp_attr){\n@@ -764,10 +739,10 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,\n \t\tstruct ibv_exp_res_domain_init_attr rd;\n \t} attr;\n \tenum ibv_exp_query_intf_status status;\n-\tstruct ibv_recv_wr *bad_wr;\n \tstruct rte_mbuf *buf;\n \tint ret = 0;\n \tint parent = (rxq == &priv->rxq_parent);\n+\tunsigned int i;\n \n \t(void)conf; /* Thresholds configuration (ignored). */\n \t/*\n@@ -903,28 +878,7 @@ skip_mr:\n \t\t (void *)dev, strerror(ret));\n \t\tgoto error;\n \t}\n-\tret = ibv_post_recv(tmpl.qp,\n-\t\t\t (tmpl.sp ?\n-\t\t\t &(*tmpl.elts.sp)[0].wr :\n-\t\t\t &(*tmpl.elts.no_sp)[0].wr),\n-\t\t\t &bad_wr);\n-\tif (ret) {\n-\t\tERROR(\"%p: ibv_post_recv() failed for WR %p: %s\",\n-\t\t (void *)dev,\n-\t\t (void *)bad_wr,\n-\t\t strerror(ret));\n-\t\tgoto error;\n-\t}\n skip_alloc:\n-\tmod = (struct ibv_exp_qp_attr){\n-\t\t.qp_state = IBV_QPS_RTR\n-\t};\n-\tret = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);\n-\tif (ret) {\n-\t\tERROR(\"%p: QP state to IBV_QPS_RTR failed: %s\",\n-\t\t (void *)dev, strerror(ret));\n-\t\tgoto error;\n-\t}\n \t/* Save port ID. */\n \ttmpl.port_id = dev->data->port_id;\n \tDEBUG(\"%p: RTE port ID: %u\", (void *)rxq, tmpl.port_id);\n@@ -950,6 +904,46 @@ skip_alloc:\n \t\t (void *)dev, status);\n \t\tgoto error;\n \t}\n+\t/* Post SGEs. */\n+\tif (!parent && tmpl.sp) {\n+\t\tstruct rxq_elt_sp (*elts)[tmpl.elts_n] = tmpl.elts.sp;\n+\n+\t\tfor (i = 0; (i != RTE_DIM(*elts)); ++i) {\n+\t\t\tret = tmpl.if_qp->recv_sg_list\n+\t\t\t\t(tmpl.qp,\n+\t\t\t\t (*elts)[i].sges,\n+\t\t\t\t RTE_DIM((*elts)[i].sges));\n+\t\t\tif (ret)\n+\t\t\t\tbreak;\n+\t\t}\n+\t} else if (!parent) {\n+\t\tstruct rxq_elt (*elts)[tmpl.elts_n] = tmpl.elts.no_sp;\n+\n+\t\tfor (i = 0; (i != RTE_DIM(*elts)); ++i) {\n+\t\t\tret = tmpl.if_qp->recv_burst(\n+\t\t\t\ttmpl.qp,\n+\t\t\t\t&(*elts)[i].sge,\n+\t\t\t\t1);\n+\t\t\tif (ret)\n+\t\t\t\tbreak;\n+\t\t}\n+\t}\n+\tif (ret) {\n+\t\tERROR(\"%p: failed to post SGEs with error %d\",\n+\t\t (void *)dev, ret);\n+\t\t/* Set ret because it does not contain a valid errno value. */\n+\t\tret = EIO;\n+\t\tgoto error;\n+\t}\n+\tmod = (struct ibv_exp_qp_attr){\n+\t\t.qp_state = IBV_QPS_RTR\n+\t};\n+\tret = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);\n+\tif (ret) {\n+\t\tERROR(\"%p: QP state to IBV_QPS_RTR failed: %s\",\n+\t\t (void *)dev, strerror(ret));\n+\t\tgoto error;\n+\t}\n \t/* Clean up rxq in case we're reinitializing it. */\n \tDEBUG(\"%p: cleaning-up old rxq just in case\", (void *)rxq);\n \trxq_cleanup(rxq);\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c\nindex 8db4f3f..06712cb 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.c\n+++ b/drivers/net/mlx5/mlx5_rxtx.c\n@@ -610,8 +610,6 @@ mlx5_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\treturn 0;\n \tfor (i = 0; (i != pkts_n); ++i) {\n \t\tstruct rxq_elt_sp *elt = &(*elts)[elts_head];\n-\t\tstruct ibv_recv_wr *wr = &elt->wr;\n-\t\tuint64_t wr_id = wr->wr_id;\n \t\tunsigned int len;\n \t\tunsigned int pkt_buf_len;\n \t\tstruct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */\n@@ -621,12 +619,6 @@ mlx5_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\tuint32_t flags;\n \n \t\t/* Sanity checks. */\n-#ifdef NDEBUG\n-\t\t(void)wr_id;\n-#endif\n-\t\tassert(wr_id < rxq->elts_n);\n-\t\tassert(wr->sg_list == elt->sges);\n-\t\tassert(wr->num_sge == RTE_DIM(elt->sges));\n \t\tassert(elts_head < rxq->elts_n);\n \t\tassert(rxq->elts_head < rxq->elts_n);\n \t\tret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,\n@@ -675,6 +667,7 @@ mlx5_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\t\tstruct rte_mbuf *rep;\n \t\t\tunsigned int seg_tailroom;\n \n+\t\t\tassert(seg != NULL);\n \t\t\t/*\n \t\t\t * Fetch initial bytes of packet descriptor into a\n \t\t\t * cacheline while allocating rep.\n@@ -686,9 +679,8 @@ mlx5_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\t\t\t * Unable to allocate a replacement mbuf,\n \t\t\t\t * repost WR.\n \t\t\t\t */\n-\t\t\t\tDEBUG(\"rxq=%p, wr_id=%\" PRIu64 \":\"\n-\t\t\t\t \" can't allocate a new mbuf\",\n-\t\t\t\t (void *)rxq, wr_id);\n+\t\t\t\tDEBUG(\"rxq=%p: can't allocate a new mbuf\",\n+\t\t\t\t (void *)rxq);\n \t\t\t\tif (pkt_buf != NULL) {\n \t\t\t\t\t*pkt_buf_next = NULL;\n \t\t\t\t\trte_pktmbuf_free(pkt_buf);\n@@ -818,18 +810,13 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\treturn mlx5_rx_burst_sp(dpdk_rxq, pkts, pkts_n);\n \tfor (i = 0; (i != pkts_n); ++i) {\n \t\tstruct rxq_elt *elt = &(*elts)[elts_head];\n-\t\tstruct ibv_recv_wr *wr = &elt->wr;\n-\t\tuint64_t wr_id = wr->wr_id;\n \t\tunsigned int len;\n-\t\tstruct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -\n-\t\t\tWR_ID(wr_id).offset);\n+\t\tstruct rte_mbuf *seg = elt->buf;\n \t\tstruct rte_mbuf *rep;\n \t\tuint32_t flags;\n \n \t\t/* Sanity checks. */\n-\t\tassert(WR_ID(wr_id).id < rxq->elts_n);\n-\t\tassert(wr->sg_list == &elt->sge);\n-\t\tassert(wr->num_sge == 1);\n+\t\tassert(seg != NULL);\n \t\tassert(elts_head < rxq->elts_n);\n \t\tassert(rxq->elts_head < rxq->elts_n);\n \t\tret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,\n@@ -880,9 +867,8 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\t\t * Unable to allocate a replacement mbuf,\n \t\t\t * repost WR.\n \t\t\t */\n-\t\t\tDEBUG(\"rxq=%p, wr_id=%\" PRIu32 \":\"\n-\t\t\t \" can't allocate a new mbuf\",\n-\t\t\t (void *)rxq, WR_ID(wr_id).id);\n+\t\t\tDEBUG(\"rxq=%p: can't allocate a new mbuf\",\n+\t\t\t (void *)rxq);\n \t\t\t/* Increment out of memory counters. */\n \t\t\t++rxq->stats.rx_nombuf;\n \t\t\t++rxq->priv->dev->data->rx_mbuf_alloc_failed;\n@@ -892,10 +878,7 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\t/* Reconfigure sge to use rep instead of seg. */\n \t\telt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;\n \t\tassert(elt->sge.lkey == rxq->mr->lkey);\n-\t\tWR_ID(wr->wr_id).offset =\n-\t\t\t(((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -\n-\t\t\t (uintptr_t)rep);\n-\t\tassert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);\n+\t\telt->buf = rep;\n \n \t\t/* Add SGE to array for repost. */\n \t\tsges[i] = elt->sge;\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 0eb1e98..aec67f6 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -81,16 +81,14 @@ struct mlx5_txq_stats {\n \n /* RX element (scattered packets). */\n struct rxq_elt_sp {\n-\tstruct ibv_recv_wr wr; /* Work Request. */\n \tstruct ibv_sge sges[MLX5_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */\n \tstruct rte_mbuf *bufs[MLX5_PMD_SGE_WR_N]; /* SGEs buffers. */\n };\n \n /* RX element. */\n struct rxq_elt {\n-\tstruct ibv_recv_wr wr; /* Work Request. */\n \tstruct ibv_sge sge; /* Scatter/Gather Element. */\n-\t/* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */\n+\tstruct rte_mbuf *buf; /* SGE buffer. */\n };\n \n struct priv;\ndiff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.h\nindex 8ff075b..f1fad18 100644\n--- a/drivers/net/mlx5/mlx5_utils.h\n+++ b/drivers/net/mlx5/mlx5_utils.h\n@@ -161,6 +161,4 @@ pmd_drv_log_basename(const char *s)\n \t\\\n \tsnprintf(name, sizeof(name), __VA_ARGS__)\n \n-#define WR_ID(o) (((wr_id_t *)&(o))->data)\n-\n #endif /* RTE_PMD_MLX5_UTILS_H_ */\n", "prefixes": [ "dpdk-dev", "02/17" ] }