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GET /api/patches/74294/?format=api
{ "id": 74294, "url": "http://patches.dpdk.org/api/patches/74294/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200717171959.44998-5-chenmin.sun@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200717171959.44998-5-chenmin.sun@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200717171959.44998-5-chenmin.sun@intel.com", "date": "2020-07-17T17:19:59", "name": "[v5,4/4] net/i40e: FDIR update rate optimization", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "5860d72a4c71e933db9865d3cae160089fcc093e", "submitter": { "id": 1212, "url": "http://patches.dpdk.org/api/people/1212/?format=api", "name": "Chenmin Sun", "email": "chenmin.sun@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200717171959.44998-5-chenmin.sun@intel.com/mbox/", "series": [ { "id": 11120, "url": "http://patches.dpdk.org/api/series/11120/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11120", "date": "2020-07-17T17:19:55", "name": "i40e FDIR update rate optimization", "version": 5, "mbox": "http://patches.dpdk.org/series/11120/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/74294/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/74294/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8B45CA0528;\n\tFri, 17 Jul 2020 10:23:54 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B873C1BF9D;\n\tFri, 17 Jul 2020 10:23:25 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by dpdk.org (Postfix) with ESMTP id D3DD51BF81\n for <dev@dpdk.org>; Fri, 17 Jul 2020 10:23:18 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 17 Jul 2020 01:23:18 -0700", "from npg-dpdk-vpp-scm-1.sh.intel.com ([10.67.118.226])\n by orsmga005.jf.intel.com with ESMTP; 17 Jul 2020 01:23:16 -0700" ], "IronPort-SDR": [ "\n Wd1naVcBSH1T6HmU7b6V8q2mxKoG1XQJeVBTot+XTMJqEobLYpoDsPnunxYm0bj2E7sQOgCGhm\n 5pGQ/qpV7xiQ==", "\n Yvw0bRQ3RbjDGrCj+0IJE0v9V+HBJ90ZHth6rtyS9UHSrFyhYSb14DO6O0y6VWnd0GaH4WAznw\n grzY5cMoBpKg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9684\"; a=\"148714446\"", "E=Sophos;i=\"5.75,362,1589266800\"; d=\"scan'208\";a=\"148714446\"", "E=Sophos;i=\"5.75,362,1589266800\"; d=\"scan'208\";a=\"460777175\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "chenmin.sun@intel.com", "To": "qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com,\n haiyue.wang@intel.com", "Cc": "dev@dpdk.org,\n\tchenmin.sun@intel.com", "Date": "Sat, 18 Jul 2020 01:19:59 +0800", "Message-Id": "<20200717171959.44998-5-chenmin.sun@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200717171959.44998-1-chenmin.sun@intel.com>", "References": "<20200715195329.34699-1-chenmin.sun@intel.com>\n <20200717171959.44998-1-chenmin.sun@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 4/4] net/i40e: FDIR update rate optimization", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Chenmin Sun <chenmin.sun@intel.com>\n\nThis patch optimized the fdir update rate for i40e PF, by tracking\nwhether the fdir rule being inserted into the guaranteed space\nor shared space.\nFor the flows that are inserted to the guaranteed space, we assume\nthat the insertion will always succeed as the hardware only report\nthe \"no enough space left\" error. In this case, the software can\ndirectly return success and no need to retrieve the result from\nthe hardware. When destroying a flow, we also assume the operation\nwill succeed as the software has checked the flow is indeed in\nthe hardware.\nSee the fdir programming status descriptor format in the datasheet\nfor more details.\n\nSigned-off-by: Chenmin Sun <chenmin.sun@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.h | 12 ++-\n drivers/net/i40e/i40e_fdir.c | 138 ++++++++++++++++++++++++++-------\n drivers/net/i40e/i40e_rxtx.c | 6 +-\n drivers/net/i40e/i40e_rxtx.h | 3 +\n 4 files changed, 124 insertions(+), 35 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex f4f34dad3..d3bda0272 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -264,6 +264,8 @@ enum i40e_flxpld_layer_idx {\n #define I40E_DEFAULT_DCB_APP_NUM 1\n #define I40E_DEFAULT_DCB_APP_PRIO 3\n \n+#define I40E_FDIR_PRG_PKT_CNT 128\n+\n /*\n * Struct to store flow created.\n */\n@@ -709,8 +711,14 @@ struct i40e_fdir_info {\n \tuint16_t match_counter_index; /* Statistic counter index used for fdir*/\n \tstruct i40e_tx_queue *txq;\n \tstruct i40e_rx_queue *rxq;\n-\tvoid *prg_pkt; /* memory for fdir program packet */\n-\tuint64_t dma_addr; /* physic address of packet memory*/\n+\tvoid *prg_pkt[I40E_FDIR_PRG_PKT_CNT]; /* memory for fdir program packet */\n+\tuint64_t dma_addr[I40E_FDIR_PRG_PKT_CNT]; /* physic address of packet memory*/\n+\t/*\n+\t * txq available buffer counter, indicates how many available buffers\n+\t * for fdir programming, initialized as I40E_FDIR_PRG_PKT_CNT\n+\t */\n+\tint txq_available_buf_count;\n+\n \t/* input set bits for each pctype */\n \tuint64_t input_set[I40E_FILTER_PCTYPE_MAX];\n \t/*\ndiff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c\nindex fb778202f..ec35345d6 100644\n--- a/drivers/net/i40e/i40e_fdir.c\n+++ b/drivers/net/i40e/i40e_fdir.c\n@@ -100,7 +100,7 @@ static int\n i40e_flow_fdir_filter_programming(struct i40e_pf *pf,\n \t\t\t\t enum i40e_filter_pctype pctype,\n \t\t\t\t const struct i40e_fdir_filter_conf *filter,\n-\t\t\t\t bool add);\n+\t\t\t\t bool add, bool wait_status);\n \n static int\n i40e_fdir_rx_queue_init(struct i40e_rx_queue *rxq)\n@@ -164,6 +164,7 @@ i40e_fdir_setup(struct i40e_pf *pf)\n \tchar z_name[RTE_MEMZONE_NAMESIZE];\n \tconst struct rte_memzone *mz = NULL;\n \tstruct rte_eth_dev *eth_dev = pf->adapter->eth_dev;\n+\tuint16_t i;\n \n \tif ((pf->flags & I40E_FLAG_FDIR) == 0) {\n \t\tPMD_INIT_LOG(ERR, \"HW doesn't support FDIR\");\n@@ -235,15 +236,21 @@ i40e_fdir_setup(struct i40e_pf *pf)\n \t\t\teth_dev->device->driver->name,\n \t\t\tI40E_FDIR_MZ_NAME,\n \t\t\teth_dev->data->port_id);\n-\tmz = i40e_memzone_reserve(z_name, I40E_FDIR_PKT_LEN, SOCKET_ID_ANY);\n+\tmz = i40e_memzone_reserve(z_name, I40E_FDIR_PKT_LEN *\n+\t\t\tI40E_FDIR_PRG_PKT_CNT, SOCKET_ID_ANY);\n \tif (!mz) {\n \t\tPMD_DRV_LOG(ERR, \"Cannot init memzone for \"\n \t\t\t\t \"flow director program packet.\");\n \t\terr = I40E_ERR_NO_MEMORY;\n \t\tgoto fail_mem;\n \t}\n-\tpf->fdir.prg_pkt = mz->addr;\n-\tpf->fdir.dma_addr = mz->iova;\n+\n+\tfor (i = 0; i < I40E_FDIR_PRG_PKT_CNT; i++) {\n+\t\tpf->fdir.prg_pkt[i] = (uint8_t *)mz->addr +\n+\t\t\tI40E_FDIR_PKT_LEN * i;\n+\t\tpf->fdir.dma_addr[i] = mz->iova +\n+\t\t\tI40E_FDIR_PKT_LEN * i;\n+\t}\n \n \tpf->fdir.match_counter_index = I40E_COUNTER_INDEX_FDIR(hw->pf_id);\n \tpf->fdir.fdir_actual_cnt = 0;\n@@ -1531,6 +1538,17 @@ i40e_check_fdir_programming_status(struct i40e_rx_queue *rxq)\n \treturn ret;\n }\n \n+static inline void\n+i40e_fdir_programming_status_cleanup(struct i40e_rx_queue *rxq)\n+{\n+\tuint16_t retry_count = 0;\n+\n+\t/* capture the previous error report(if any) from rx ring */\n+\twhile ((i40e_check_fdir_programming_status(rxq) < 0) &&\n+\t\t\t(++retry_count < I40E_FDIR_NUM_RX_DESC))\n+\t\tPMD_DRV_LOG(INFO, \"error report captured.\");\n+}\n+\n static int\n i40e_fdir_filter_convert(const struct i40e_fdir_filter_conf *input,\n \t\t\t struct i40e_fdir_filter *filter)\n@@ -1687,7 +1705,7 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,\n {\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n-\tunsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;\n+\tunsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt[0];\n \tenum i40e_filter_pctype pctype;\n \tint ret = 0;\n \n@@ -1736,6 +1754,45 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,\n \treturn ret;\n }\n \n+static inline unsigned char *\n+i40e_find_available_buffer(struct rte_eth_dev *dev)\n+{\n+\tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct i40e_fdir_info *fdir_info = &pf->fdir;\n+\tstruct i40e_tx_queue *txq = pf->fdir.txq;\n+\n+\t/* no available buffer\n+\t * search for more available buffers from the current\n+\t * descriptor, until an unavailable one\n+\t */\n+\tif (fdir_info->txq_available_buf_count <= 0) {\n+\t\tuint16_t tmp_tail;\n+\t\tvolatile struct i40e_tx_desc *tmp_txdp;\n+\n+\t\ttmp_tail = txq->tx_tail;\n+\t\ttmp_txdp = &txq->tx_ring[tmp_tail + 1];\n+\n+\t\tdo {\n+\t\t\tif ((tmp_txdp->cmd_type_offset_bsz &\n+\t\t\t\t\trte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) ==\n+\t\t\t\t\trte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE))\n+\t\t\t\tfdir_info->txq_available_buf_count++;\n+\t\t\telse\n+\t\t\t\tbreak;\n+\n+\t\t\ttmp_tail += 2;\n+\t\t\tif (tmp_tail >= txq->nb_tx_desc)\n+\t\t\t\ttmp_tail = 0;\n+\t\t} while (tmp_tail != txq->tx_tail);\n+\t}\n+\n+\tif (fdir_info->txq_available_buf_count > 0)\n+\t\tfdir_info->txq_available_buf_count--;\n+\telse \n+\t\treturn NULL;\n+\treturn (unsigned char *)fdir_info->prg_pkt[txq->tx_tail >> 1];\n+}\n+\n /**\n * i40e_flow_add_del_fdir_filter - add or remove a flow director filter.\n * @pf: board private structure\n@@ -1749,11 +1806,12 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev,\n {\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n-\tunsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;\n+\tunsigned char *pkt = NULL;\n \tenum i40e_filter_pctype pctype;\n \tstruct i40e_fdir_info *fdir_info = &pf->fdir;\n \tstruct i40e_fdir_filter *node;\n \tstruct i40e_fdir_filter check_filter; /* Check if the filter exists */\n+\tbool wait_status = true;\n \tint ret = 0;\n \n \tif (pf->fdir.fdir_vsi == NULL) {\n@@ -1793,6 +1851,10 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev,\n \t\t\t\t \"Conflict with existing flow director rules!\");\n \t\t\treturn -EINVAL;\n \t\t}\n+\n+\t\tif (fdir_info->fdir_invalprio == 1 &&\n+\t\t\t\tfdir_info->fdir_guarantee_free_space > 0)\n+\t\t\twait_status = false;\n \t} else {\n \t\tnode = i40e_sw_fdir_filter_lookup(fdir_info,\n \t\t\t\t&check_filter.fdir.input);\n@@ -1808,8 +1870,16 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev,\n \t\t\t\t\t\"Error deleting fdir rule from hash table!\");\n \t\t\treturn -EINVAL;\n \t\t}\n+\n+\t\tif (fdir_info->fdir_invalprio == 1)\n+\t\t\twait_status = false;\n \t}\n \n+\t/* find a buffer to store the pkt */\n+\tpkt = i40e_find_available_buffer(dev);\n+\tif (pkt == NULL)\n+\t\tgoto error_op;\n+\n \tmemset(pkt, 0, I40E_FDIR_PKT_LEN);\n \tret = i40e_flow_fdir_construct_pkt(pf, &filter->input, pkt);\n \tif (ret < 0) {\n@@ -1823,7 +1893,8 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev,\n \t\t\thw, I40E_GLQF_FD_PCTYPES((int)pctype));\n \t}\n \n-\tret = i40e_flow_fdir_filter_programming(pf, pctype, filter, add);\n+\tret = i40e_flow_fdir_filter_programming(pf, pctype, filter, add,\n+\t\t\twait_status);\n \tif (ret < 0) {\n \t\tPMD_DRV_LOG(ERR, \"fdir programming fails for PCTYPE(%u).\",\n \t\t\t pctype);\n@@ -1953,7 +2024,7 @@ i40e_fdir_filter_programming(struct i40e_pf *pf,\n \n \tPMD_DRV_LOG(INFO, \"filling transmit descriptor.\");\n \ttxdp = &(txq->tx_ring[txq->tx_tail + 1]);\n-\ttxdp->buffer_addr = rte_cpu_to_le_64(pf->fdir.dma_addr);\n+\ttxdp->buffer_addr = rte_cpu_to_le_64(pf->fdir.dma_addr[0]);\n \ttd_cmd = I40E_TX_DESC_CMD_EOP |\n \t\t I40E_TX_DESC_CMD_RS |\n \t\t I40E_TX_DESC_CMD_DUMMY;\n@@ -2003,7 +2074,7 @@ static int\n i40e_flow_fdir_filter_programming(struct i40e_pf *pf,\n \t\t\t\t enum i40e_filter_pctype pctype,\n \t\t\t\t const struct i40e_fdir_filter_conf *filter,\n-\t\t\t\t bool add)\n+\t\t\t\t bool add, bool wait_status)\n {\n \tstruct i40e_tx_queue *txq = pf->fdir.txq;\n \tstruct i40e_rx_queue *rxq = pf->fdir.rxq;\n@@ -2011,8 +2082,9 @@ i40e_flow_fdir_filter_programming(struct i40e_pf *pf,\n \tvolatile struct i40e_tx_desc *txdp;\n \tvolatile struct i40e_filter_program_desc *fdirdp;\n \tuint32_t td_cmd;\n-\tuint16_t vsi_id, i;\n+\tuint16_t vsi_id;\n \tuint8_t dest;\n+\tuint32_t i;\n \n \tPMD_DRV_LOG(INFO, \"filling filter programming descriptor.\");\n \tfdirdp = (volatile struct i40e_filter_program_desc *)\n@@ -2087,7 +2159,8 @@ i40e_flow_fdir_filter_programming(struct i40e_pf *pf,\n \n \tPMD_DRV_LOG(INFO, \"filling transmit descriptor.\");\n \ttxdp = &txq->tx_ring[txq->tx_tail + 1];\n-\ttxdp->buffer_addr = rte_cpu_to_le_64(pf->fdir.dma_addr);\n+\ttxdp->buffer_addr = rte_cpu_to_le_64(pf->fdir.dma_addr[txq->tx_tail >> 1]);\n+\n \ttd_cmd = I40E_TX_DESC_CMD_EOP |\n \t\t I40E_TX_DESC_CMD_RS |\n \t\t I40E_TX_DESC_CMD_DUMMY;\n@@ -2100,25 +2173,32 @@ i40e_flow_fdir_filter_programming(struct i40e_pf *pf,\n \t\ttxq->tx_tail = 0;\n \t/* Update the tx tail register */\n \trte_wmb();\n+\n+\t/* fdir program rx queue cleanup */\n+\ti40e_fdir_programming_status_cleanup(rxq);\n+\n \tI40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);\n-\tfor (i = 0; i < I40E_FDIR_MAX_WAIT_US; i++) {\n-\t\tif ((txdp->cmd_type_offset_bsz &\n-\t\t\t\trte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) ==\n-\t\t\t\trte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE))\n-\t\t\tbreak;\n-\t\trte_delay_us(1);\n-\t}\n-\tif (i >= I40E_FDIR_MAX_WAIT_US) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t \"Failed to program FDIR filter: time out to get DD on tx queue.\");\n-\t\treturn -ETIMEDOUT;\n-\t}\n-\t/* totally delay 10 ms to check programming status*/\n-\trte_delay_us(I40E_FDIR_MAX_WAIT_US);\n-\tif (i40e_check_fdir_programming_status(rxq) < 0) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t \"Failed to program FDIR filter: programming status reported.\");\n-\t\treturn -ETIMEDOUT;\n+\n+\tif (wait_status) {\n+\t\tfor (i = 0; i < I40E_FDIR_MAX_WAIT_US; i++) {\n+\t\t\tif ((txdp->cmd_type_offset_bsz &\n+\t\t\t\t\trte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) ==\n+\t\t\t\t\trte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE))\n+\t\t\t\tbreak;\n+\t\t\trte_delay_us(1);\n+\t\t}\n+\t\tif (i >= I40E_FDIR_MAX_WAIT_US) {\n+\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"Failed to program FDIR filter: time out to get DD on tx queue.\");\n+\t\t\treturn -ETIMEDOUT;\n+\t\t}\n+\t\t/* totally delay 10 ms to check programming status*/\n+\t\trte_delay_us(I40E_FDIR_MAX_WAIT_US);\n+\t\tif (i40e_check_fdir_programming_status(rxq) < 0) {\n+\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"Failed to program FDIR filter: programming status reported.\");\n+\t\t\treturn -ETIMEDOUT;\n+\t\t}\n \t}\n \n \treturn 0;\ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex d21fbeaca..fe7f9200c 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -2940,16 +2940,13 @@ i40e_dev_free_queues(struct rte_eth_dev *dev)\n \t}\n }\n \n-#define I40E_FDIR_NUM_TX_DESC I40E_MIN_RING_DESC\n-#define I40E_FDIR_NUM_RX_DESC I40E_MIN_RING_DESC\n-\n enum i40e_status_code\n i40e_fdir_setup_tx_resources(struct i40e_pf *pf)\n {\n \tstruct i40e_tx_queue *txq;\n \tconst struct rte_memzone *tz = NULL;\n-\tuint32_t ring_size;\n \tstruct rte_eth_dev *dev;\n+\tuint32_t ring_size;\n \n \tif (!pf) {\n \t\tPMD_DRV_LOG(ERR, \"PF is not available\");\n@@ -2996,6 +2993,7 @@ i40e_fdir_setup_tx_resources(struct i40e_pf *pf)\n \t */\n \ttxq->q_set = TRUE;\n \tpf->fdir.txq = txq;\n+\tpf->fdir.txq_available_buf_count = I40E_FDIR_PRG_PKT_CNT;\n \n \treturn I40E_SUCCESS;\n }\ndiff --git a/drivers/net/i40e/i40e_rxtx.h b/drivers/net/i40e/i40e_rxtx.h\nindex 8f11f011a..57d7b4160 100644\n--- a/drivers/net/i40e/i40e_rxtx.h\n+++ b/drivers/net/i40e/i40e_rxtx.h\n@@ -24,6 +24,9 @@\n #define\tI40E_MIN_RING_DESC\t64\n #define\tI40E_MAX_RING_DESC\t4096\n \n+#define I40E_FDIR_NUM_TX_DESC (I40E_FDIR_PRG_PKT_CNT << 1)\n+#define I40E_FDIR_NUM_RX_DESC (I40E_FDIR_PRG_PKT_CNT << 1)\n+\n #define I40E_MIN_TSO_MSS 256\n #define I40E_MAX_TSO_MSS 9674\n \n", "prefixes": [ "v5", "4/4" ] }