Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/74055/?format=api
{ "id": 74055, "url": "http://patches.dpdk.org/api/patches/74055/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1594794114-16313-15-git-send-email-viacheslavo@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1594794114-16313-15-git-send-email-viacheslavo@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1594794114-16313-15-git-send-email-viacheslavo@mellanox.com", "date": "2020-07-15T06:21:51", "name": "[v2,14/17] net/mlx5: add read device clock support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "46d36b29621b41504ed09be0578dd546ae6bb36f", "submitter": { "id": 1102, "url": "http://patches.dpdk.org/api/people/1102/?format=api", "name": "Slava Ovsiienko", "email": "viacheslavo@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1594794114-16313-15-git-send-email-viacheslavo@mellanox.com/mbox/", "series": [ { "id": 11032, "url": "http://patches.dpdk.org/api/series/11032/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11032", "date": "2020-07-15T06:21:37", "name": "net/mlx5: introduce accurate packet Tx scheduling", "version": 2, "mbox": "http://patches.dpdk.org/series/11032/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/74055/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/74055/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4EC39A0540;\n\tWed, 15 Jul 2020 08:24:17 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 800971C1B4;\n\tWed, 15 Jul 2020 08:22:29 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id A29981C19A\n for <dev@dpdk.org>; Wed, 15 Jul 2020 08:22:22 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n viacheslavo@mellanox.com) with SMTP; 15 Jul 2020 09:22:18 +0300", "from pegasus12.mtr.labs.mlnx (pegasus12.mtr.labs.mlnx\n [10.210.17.40])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 06F6MIFg007070;\n Wed, 15 Jul 2020 09:22:18 +0300", "from pegasus12.mtr.labs.mlnx (localhost [127.0.0.1])\n by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 06F6MIPD016465;\n Wed, 15 Jul 2020 06:22:18 GMT", "(from viacheslavo@localhost)\n by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 06F6MIrW016464;\n Wed, 15 Jul 2020 06:22:18 GMT" ], "X-Authentication-Warning": "pegasus12.mtr.labs.mlnx: viacheslavo set sender to\n viacheslavo@mellanox.com using -f", "From": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>", "To": "dev@dpdk.org", "Cc": "matan@mellanox.com, rasland@mellanox.com, olivier.matz@6wind.com,\n thomas@monjalon.net, ferruh.yigit@intel.com", "Date": "Wed, 15 Jul 2020 06:21:51 +0000", "Message-Id": "<1594794114-16313-15-git-send-email-viacheslavo@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1594794114-16313-1-git-send-email-viacheslavo@mellanox.com>", "References": "<1591771085-24959-1-git-send-email-viacheslavo@mellanox.com>\n <1594794114-16313-1-git-send-email-viacheslavo@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v2 14/17] net/mlx5: add read device clock support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "If send schedule feature is engaged there is the Clock Queue\ncreated, that reports reliable the current device clock counter\nvalue. The device clock counter can be read directly from the\nClock Queue CQE.\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/net/mlx5/linux/mlx5_os.c | 4 ++-\n drivers/net/mlx5/mlx5.h | 1 +\n drivers/net/mlx5/mlx5_txpp.c | 55 ++++++++++++++++++++++++++++++++++++++++\n 3 files changed, 59 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex ea36309..e7241d8 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -2348,7 +2348,7 @@\n \t.xstats_get_names = mlx5_xstats_get_names,\n \t.fw_version_get = mlx5_fw_version_get,\n \t.dev_infos_get = mlx5_dev_infos_get,\n-\t.read_clock = mlx5_read_clock,\n+\t.read_clock = mlx5_txpp_read_clock,\n \t.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,\n \t.vlan_filter_set = mlx5_vlan_filter_set,\n \t.rx_queue_setup = mlx5_rx_queue_setup,\n@@ -2397,6 +2397,7 @@\n \t.xstats_get_names = mlx5_xstats_get_names,\n \t.fw_version_get = mlx5_fw_version_get,\n \t.dev_infos_get = mlx5_dev_infos_get,\n+\t.read_clock = mlx5_txpp_read_clock,\n \t.rx_descriptor_status = mlx5_rx_descriptor_status,\n \t.tx_descriptor_status = mlx5_tx_descriptor_status,\n \t.rxq_info_get = mlx5_rxq_info_get,\n@@ -2427,6 +2428,7 @@\n \t.xstats_get_names = mlx5_xstats_get_names,\n \t.fw_version_get = mlx5_fw_version_get,\n \t.dev_infos_get = mlx5_dev_infos_get,\n+\t.read_clock = mlx5_txpp_read_clock,\n \t.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,\n \t.vlan_filter_set = mlx5_vlan_filter_set,\n \t.rx_queue_setup = mlx5_rx_queue_setup,\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex a61394c..f1246b8 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -1010,5 +1010,6 @@ void mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,\n \n int mlx5_txpp_start(struct rte_eth_dev *dev);\n void mlx5_txpp_stop(struct rte_eth_dev *dev);\n+int mlx5_txpp_read_clock(struct rte_eth_dev *dev, uint64_t *timestamp);\n \n #endif /* RTE_PMD_MLX5_H_ */\ndiff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c\nindex 799b20a..d0916de 100644\n--- a/drivers/net/mlx5/mlx5_txpp.c\n+++ b/drivers/net/mlx5/mlx5_txpp.c\n@@ -1056,3 +1056,58 @@\n \tMLX5_ASSERT(!ret);\n \tRTE_SET_USED(ret);\n }\n+\n+/*\n+ * Read the current clock counter of an Ethernet device\n+ *\n+ * This returns the current raw clock value of an Ethernet device. It is\n+ * a raw amount of ticks, with no given time reference.\n+ * The value returned here is from the same clock than the one\n+ * filling timestamp field of Rx/Tx packets when using hardware timestamp\n+ * offload. Therefore it can be used to compute a precise conversion of\n+ * the device clock to the real time.\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device structure.\n+ * @param clock\n+ * Pointer to the uint64_t that holds the raw clock value.\n+ *\n+ * @return\n+ * - 0: Success.\n+ * - -ENOTSUP: The function is not supported in this mode. Requires\n+ * packet pacing module configured and started (tx_pp devarg)\n+ */\n+int\n+mlx5_txpp_read_clock(struct rte_eth_dev *dev, uint64_t *timestamp)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_dev_ctx_shared *sh = priv->sh;\n+\tint ret;\n+\n+\tif (sh->txpp.refcnt) {\n+\t\tstruct mlx5_txpp_wq *wq = &sh->txpp.clock_queue;\n+\t\tstruct mlx5_cqe *cqe = (struct mlx5_cqe *)(uintptr_t)wq->cqes;\n+\t\tunion {\n+\t\t\trte_int128_t u128;\n+\t\t\tstruct mlx5_cqe_ts cts;\n+\t\t} to;\n+\t\tuint64_t ts;\n+\n+\t\tmlx5_atomic_read_cqe((rte_int128_t *)&cqe->timestamp, &to.u128);\n+\t\tif (to.cts.op_own >> 4) {\n+\t\t\tDRV_LOG(DEBUG, \"Clock Queue error sync lost.\");\n+\t\t\trte_atomic32_inc(&sh->txpp.err_clock_queue);\n+\t\t\tsh->txpp.sync_lost = 1;\n+\t\t\treturn -EIO;\n+\t\t}\n+\t\tts = rte_be_to_cpu_64(to.cts.timestamp);\n+\t\tts = mlx5_txpp_convert_rx_ts(sh, ts);\n+\t\t*timestamp = ts;\n+\t\treturn 0;\n+\t}\n+\t/* Not supported in isolated mode - kernel does not see the CQEs. */\n+\tif (priv->isolated || rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -ENOTSUP;\n+\tret = mlx5_read_clock(dev, timestamp);\n+\treturn ret;\n+}\n", "prefixes": [ "v2", "14/17" ] }