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GET /api/patches/73212/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 73212,
    "url": "http://patches.dpdk.org/api/patches/73212/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200706082502.26935-15-somnath.kotur@broadcom.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200706082502.26935-15-somnath.kotur@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200706082502.26935-15-somnath.kotur@broadcom.com",
    "date": "2020-07-06T08:24:56",
    "name": "[14/20] net/bnxt: port configuration changes to support full offload",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "3455a307a1472e287448854277d14c1cfeb6ae6a",
    "submitter": {
        "id": 908,
        "url": "http://patches.dpdk.org/api/people/908/?format=api",
        "name": "Somnath Kotur",
        "email": "somnath.kotur@broadcom.com"
    },
    "delegate": {
        "id": 1766,
        "url": "http://patches.dpdk.org/api/users/1766/?format=api",
        "username": "ajitkhaparde",
        "first_name": "Ajit",
        "last_name": "Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200706082502.26935-15-somnath.kotur@broadcom.com/mbox/",
    "series": [
        {
            "id": 10805,
            "url": "http://patches.dpdk.org/api/series/10805/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10805",
            "date": "2020-07-06T08:24:42",
            "name": "bnxt patches",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/10805/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/73212/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/73212/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7AFB7A00C5;\n\tMon,  6 Jul 2020 10:33:08 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 94C931DAE3;\n\tMon,  6 Jul 2020 10:30:24 +0200 (CEST)",
            "from relay.smtp.broadcom.com (relay.smtp.broadcom.com\n [192.19.211.62]) by dpdk.org (Postfix) with ESMTP id 2BC4B1D594\n for <dev@dpdk.org>; Mon,  6 Jul 2020 10:30:07 +0200 (CEST)",
            "from dhcp-10-123-153-55.dhcp.broadcom.net\n (dhcp-10-123-153-55.dhcp.broadcom.net [10.123.153.55])\n by relay.smtp.broadcom.com (Postfix) with ESMTP id A8CE9298715;\n Mon,  6 Jul 2020 01:30:06 -0700 (PDT)"
        ],
        "DKIM-Filter": "OpenDKIM Filter v2.10.3 relay.smtp.broadcom.com A8CE9298715",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n s=dkimrelay; t=1594024206;\n bh=VnEfGt25LEZDXli2KuJgsfLuMW+n3fPYmHDCOnpJbQQ=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=meL9KD9hnZXCRHJdVcInes+M2ay/0VAENEg61EAc9bUL3s1C8W4XYalm/ziIu+wm+\n VksVAf4LGcQdTBijaFzEb8clbdwu2O+zPqfDtDyd8P6WG3kIRPcMc9CXhUGdOmbl6s\n VfbYlnS7YmuQ8TOU87wkgeC+A67MATDtQhYgbeSE=",
        "From": "Somnath Kotur <somnath.kotur@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "ferruh.yigit@intel.com",
        "Date": "Mon,  6 Jul 2020 13:54:56 +0530",
        "Message-Id": "<20200706082502.26935-15-somnath.kotur@broadcom.com>",
        "X-Mailer": "git-send-email 2.10.1.613.g2cc2e70",
        "In-Reply-To": "<20200706082502.26935-1-somnath.kotur@broadcom.com>",
        "References": "<20200706082502.26935-1-somnath.kotur@broadcom.com>",
        "Subject": "[dpdk-dev] [PATCH 14/20] net/bnxt: port configuration changes to\n\tsupport full offload",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\n\nAdded port configuration changes to support full offload\nrules when VF representor ports are used. The direction of\nthe flow is determined using the configured dirction and the\nconfigured match and action ports of the flow create.\n\nSigned-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\nReviewed-by: Michael Baucom <michael.baucom@broadcom.com>\nSigned-off-by: Somnath Kotur <somnath.kotur@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\n---\n drivers/net/bnxt/tf_ulp/bnxt_tf_common.h       |   8 +-\n drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c        |  34 +-\n drivers/net/bnxt/tf_ulp/ulp_mapper.h           |   2 +-\n drivers/net/bnxt/tf_ulp/ulp_matcher.c          |  10 +-\n drivers/net/bnxt/tf_ulp/ulp_port_db.c          |  25 ++\n drivers/net/bnxt/tf_ulp/ulp_port_db.h          |  14 +\n drivers/net/bnxt/tf_ulp/ulp_rte_parser.c       | 451 +++++++++++++++----------\n drivers/net/bnxt/tf_ulp/ulp_rte_parser.h       |  10 +-\n drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h |   6 +-\n drivers/net/bnxt/tf_ulp/ulp_template_struct.h  |   7 +-\n 10 files changed, 361 insertions(+), 206 deletions(-)",
    "diff": "diff --git a/drivers/net/bnxt/tf_ulp/bnxt_tf_common.h b/drivers/net/bnxt/tf_ulp/bnxt_tf_common.h\nindex ebb7140..f0633f0 100644\n--- a/drivers/net/bnxt/tf_ulp/bnxt_tf_common.h\n+++ b/drivers/net/bnxt/tf_ulp/bnxt_tf_common.h\n@@ -44,9 +44,10 @@ enum bnxt_ulp_eth_ip_type {\n };\n \n /* ulp direction Type */\n-enum ulp_direction_type {\n-\tULP_DIR_INGRESS,\n-\tULP_DIR_EGRESS,\n+enum bnxt_ulp_direction_type {\n+\tBNXT_ULP_DIR_INVALID,\n+\tBNXT_ULP_DIR_INGRESS,\n+\tBNXT_ULP_DIR_EGRESS,\n };\n \n /* enumeration of the interface types */\n@@ -57,6 +58,7 @@ enum bnxt_ulp_intf_type {\n \tBNXT_ULP_INTF_TYPE_VF,\n \tBNXT_ULP_INTF_TYPE_PF_REP,\n \tBNXT_ULP_INTF_TYPE_VF_REP,\n+\tBNXT_ULP_INTF_TYPE_PHY_PORT,\n \tBNXT_ULP_INTF_TYPE_LAST\n };\n \ndiff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\nindex 36a0141..89fffcf 100644\n--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\n+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\n@@ -60,6 +60,19 @@ bnxt_ulp_flow_validate_args(const struct rte_flow_attr *attr,\n \treturn BNXT_TF_RC_SUCCESS;\n }\n \n+static inline void\n+bnxt_ulp_set_dir_attributes(struct ulp_rte_parser_params *params,\n+\t\t\t    const struct rte_flow_attr *attr)\n+{\n+\t/* Set the flow attributes */\n+\tif (attr->egress)\n+\t\tparams->dir_attr |= BNXT_ULP_FLOW_ATTR_EGRESS;\n+\tif (attr->ingress)\n+\t\tparams->dir_attr |= BNXT_ULP_FLOW_ATTR_INGRESS;\n+\tif (attr->transfer)\n+\t\tparams->dir_attr |= BNXT_ULP_FLOW_ATTR_TRANSFER;\n+}\n+\n /* Function to create the rte flow. */\n static struct rte_flow *\n bnxt_ulp_flow_create(struct rte_eth_dev *dev,\n@@ -93,13 +106,12 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,\n \tmemset(&params, 0, sizeof(struct ulp_rte_parser_params));\n \tparams.ulp_ctx = ulp_ctx;\n \n-\tif (attr->egress)\n-\t\tparams.dir = ULP_DIR_EGRESS;\n+\t/* Set the flow attributes */\n+\tbnxt_ulp_set_dir_attributes(&params, attr);\n \n \t/* copy the device port id and direction for further processing */\n \tULP_COMP_FLD_IDX_WR(&params, BNXT_ULP_CF_IDX_INCOMING_IF,\n \t\t\t    dev->data->port_id);\n-\tULP_COMP_FLD_IDX_WR(&params, BNXT_ULP_CF_IDX_DIRECTION, params.dir);\n \tULP_COMP_FLD_IDX_WR(&params, BNXT_ULP_CF_IDX_SVIF_FLAG,\n \t\t\t    BNXT_ULP_INVALID_SVIF_VAL);\n \n@@ -113,6 +125,11 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,\n \tif (ret != BNXT_TF_RC_SUCCESS)\n \t\tgoto parse_error;\n \n+\t/* Perform the rte flow post process */\n+\tret = bnxt_ulp_rte_parser_post_process(&params);\n+\tif (ret != BNXT_TF_RC_SUCCESS)\n+\t\tgoto parse_error;\n+\n \tret = ulp_matcher_pattern_match(&params, &class_id);\n \tif (ret != BNXT_TF_RC_SUCCESS)\n \t\tgoto parse_error;\n@@ -131,7 +148,7 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,\n \tmapper_cparms.act_tid = act_tmpl;\n \tmapper_cparms.func_id = bnxt_get_fw_func_id(dev->data->port_id,\n \t\t\t\t\t\t    BNXT_ULP_INTF_TYPE_INVALID);\n-\tmapper_cparms.dir = params.dir;\n+\tmapper_cparms.dir_attr = params.dir_attr;\n \n \t/* Call the ulp mapper to create the flow in the hardware. */\n \tret = ulp_mapper_flow_create(ulp_ctx, &mapper_cparms, &fid);\n@@ -176,8 +193,8 @@ bnxt_ulp_flow_validate(struct rte_eth_dev *dev,\n \tmemset(&params, 0, sizeof(struct ulp_rte_parser_params));\n \tparams.ulp_ctx = ulp_ctx;\n \n-\tif (attr->egress)\n-\t\tparams.dir = ULP_DIR_EGRESS;\n+\t/* Set the flow attributes */\n+\tbnxt_ulp_set_dir_attributes(&params, attr);\n \n \t/* Parse the rte flow pattern */\n \tret = bnxt_ulp_rte_parser_hdr_parse(pattern, &params);\n@@ -189,6 +206,11 @@ bnxt_ulp_flow_validate(struct rte_eth_dev *dev,\n \tif (ret != BNXT_TF_RC_SUCCESS)\n \t\tgoto parse_error;\n \n+\t/* Perform the rte flow post process */\n+\tret = bnxt_ulp_rte_parser_post_process(&params);\n+\tif (ret != BNXT_TF_RC_SUCCESS)\n+\t\tgoto parse_error;\n+\n \tret = ulp_matcher_pattern_match(&params, &class_id);\n \n \tif (ret != BNXT_TF_RC_SUCCESS)\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.h b/drivers/net/bnxt/tf_ulp/ulp_mapper.h\nindex f6d5544..a19fb0d 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.h\n@@ -87,7 +87,7 @@ struct bnxt_ulp_mapper_create_parms {\n \tuint32_t\t\t\tclass_tid;\n \tuint32_t\t\t\tact_tid;\n \tuint16_t\t\t\tfunc_id;\n-\tenum ulp_direction_type\t\tdir;\n+\tuint32_t\t\t\tdir_attr;\n };\n \n /* Function to initialize any dynamic mapper data. */\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_matcher.c b/drivers/net/bnxt/tf_ulp/ulp_matcher.c\nindex f665700..9112647 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_matcher.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_matcher.c\n@@ -47,14 +47,8 @@ ulp_matcher_pattern_match(struct ulp_rte_parser_params *params,\n \tuint8_t vf_to_vf;\n \tuint16_t tmpl_id;\n \n-\t/* determine vf to vf flow */\n-\tif (params->dir == ULP_DIR_EGRESS &&\n-\t    ULP_BITMAP_ISSET(params->act_bitmap.bits,\n-\t\t\t     BNXT_ULP_ACTION_BIT_VNIC)) {\n-\t\tvf_to_vf = 1;\n-\t} else {\n-\t\tvf_to_vf = 0;\n-\t}\n+\t/* Get vf to vf flow */\n+\tvf_to_vf = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_VF_TO_VF);\n \n \t/* calculate the hash of the given flow */\n \tclass_hid = ulp_matcher_class_hash_calculate(params->hdr_bitmap.bits,\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_port_db.c b/drivers/net/bnxt/tf_ulp/ulp_port_db.c\nindex 122b5f4..0fc7c0a 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_port_db.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_port_db.c\n@@ -465,6 +465,31 @@ ulp_port_db_phy_port_vport_get(struct bnxt_ulp_context *ulp_ctxt,\n }\n \n /*\n+ * Api to get the svif for a given physical port.\n+ *\n+ * ulp_ctxt [in] Ptr to ulp context\n+ * phy_port [in] physical port index\n+ * svif [out] the svif of the given physical index\n+ *\n+ * Returns 0 on success or negative number on failure.\n+ */\n+int32_t\n+ulp_port_db_phy_port_svif_get(struct bnxt_ulp_context *ulp_ctxt,\n+\t\t\t      uint32_t phy_port,\n+\t\t\t      uint16_t *svif)\n+{\n+\tstruct bnxt_ulp_port_db *port_db;\n+\n+\tport_db = bnxt_ulp_cntxt_ptr2_port_db_get(ulp_ctxt);\n+\tif (!port_db || phy_port >= port_db->phy_port_cnt) {\n+\t\tBNXT_TF_DBG(ERR, \"Invalid Arguments\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\t*svif = port_db->phy_port_list[phy_port].port_svif;\n+\treturn 0;\n+}\n+\n+/*\n  * Api to get the port type for a given ulp ifindex.\n  *\n  * ulp_ctxt [in] Ptr to ulp context\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_port_db.h b/drivers/net/bnxt/tf_ulp/ulp_port_db.h\nindex 4afbb84..393d01b 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_port_db.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_port_db.h\n@@ -220,6 +220,20 @@ ulp_port_db_phy_port_vport_get(struct bnxt_ulp_context *ulp_ctxt,\n \t\t\t       uint16_t *out_port);\n \n /*\n+ * Api to get the svif for a given physical port.\n+ *\n+ * ulp_ctxt [in] Ptr to ulp context\n+ * phy_port [in] physical port index\n+ * svif [out] the svif of the given physical index\n+ *\n+ * Returns 0 on success or negative number on failure.\n+ */\n+int32_t\n+ulp_port_db_phy_port_svif_get(struct bnxt_ulp_context *ulp_ctxt,\n+\t\t\t      uint32_t phy_port,\n+\t\t\t      uint16_t *svif);\n+\n+/*\n  * Api to get the port type for a given ulp ifindex.\n  *\n  * ulp_ctxt [in] Ptr to ulp context\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\nindex 3c65442..e828325 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\n@@ -84,9 +84,6 @@ bnxt_ulp_rte_parser_hdr_parse(const struct rte_flow_item pattern[],\n \tstruct bnxt_ulp_rte_hdr_info *hdr_info;\n \n \tparams->field_idx = BNXT_ULP_PROTO_HDR_SVIF_NUM;\n-\tif (params->dir == ULP_DIR_EGRESS)\n-\t\tULP_BITMAP_SET(params->hdr_bitmap.bits,\n-\t\t\t       BNXT_ULP_FLOW_DIR_BITMASK_EGR);\n \n \t/* Set the computed flags for no vlan tags before parsing */\n \tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_NO_VTAG, 1);\n@@ -113,8 +110,7 @@ bnxt_ulp_rte_parser_hdr_parse(const struct rte_flow_item pattern[],\n \t\titem++;\n \t}\n \t/* update the implied SVIF */\n-\t(void)ulp_rte_parser_svif_process(params);\n-\treturn BNXT_TF_RC_SUCCESS;\n+\treturn ulp_rte_parser_implicit_match_port_process(params);\n }\n \n /*\n@@ -128,10 +124,6 @@ bnxt_ulp_rte_parser_act_parse(const struct rte_flow_action actions[],\n \tconst struct rte_flow_action *action_item = actions;\n \tstruct bnxt_ulp_rte_act_info *hdr_info;\n \n-\tif (params->dir == ULP_DIR_EGRESS)\n-\t\tULP_BITMAP_SET(params->act_bitmap.bits,\n-\t\t\t       BNXT_ULP_FLOW_DIR_BITMASK_EGR);\n-\n \t/* Parse all the items in the pattern */\n \twhile (action_item && action_item->type != RTE_FLOW_ACTION_TYPE_END) {\n \t\t/* get the header information from the flow_hdr_info table */\n@@ -156,24 +148,85 @@ bnxt_ulp_rte_parser_act_parse(const struct rte_flow_action actions[],\n \t\taction_item++;\n \t}\n \t/* update the implied port details */\n-\tulp_rte_parser_implied_act_port_process(params);\n+\tulp_rte_parser_implicit_act_port_process(params);\n \treturn BNXT_TF_RC_SUCCESS;\n }\n \n+/*\n+ * Function to handle the post processing of the parsing details\n+ */\n+int32_t\n+bnxt_ulp_rte_parser_post_process(struct ulp_rte_parser_params *params)\n+{\n+\tenum bnxt_ulp_direction_type dir;\n+\tenum bnxt_ulp_intf_type match_port_type, act_port_type;\n+\tuint32_t act_port_set;\n+\n+\t/* Get the computed details */\n+\tdir = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_DIRECTION);\n+\tmatch_port_type = ULP_COMP_FLD_IDX_RD(params,\n+\t\t\t\t\t      BNXT_ULP_CF_IDX_MATCH_PORT_TYPE);\n+\tact_port_type = ULP_COMP_FLD_IDX_RD(params,\n+\t\t\t\t\t    BNXT_ULP_CF_IDX_ACT_PORT_TYPE);\n+\tact_port_set = ULP_COMP_FLD_IDX_RD(params,\n+\t\t\t\t\t   BNXT_ULP_CF_IDX_ACT_PORT_IS_SET);\n+\n+\t/* set the flow direction in the proto and action header */\n+\tif (dir == BNXT_ULP_DIR_EGRESS) {\n+\t\tULP_BITMAP_SET(params->hdr_bitmap.bits,\n+\t\t\t       BNXT_ULP_FLOW_DIR_BITMASK_EGR);\n+\t\tULP_BITMAP_SET(params->act_bitmap.bits,\n+\t\t\t       BNXT_ULP_FLOW_DIR_BITMASK_EGR);\n+\t}\n+\n+\t/* calculate the VF to VF flag */\n+\tif (act_port_set && act_port_type == BNXT_ULP_INTF_TYPE_VF_REP &&\n+\t    match_port_type == BNXT_ULP_INTF_TYPE_VF_REP)\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_VF_TO_VF, 1);\n+\n+\t/* TBD: Handle the flow rejection scenarios */\n+\treturn 0;\n+}\n+\n+/*\n+ * Function to compute the flow direction based on the match port details\n+ */\n+static void\n+bnxt_ulp_rte_parser_direction_compute(struct ulp_rte_parser_params *params)\n+{\n+\tenum bnxt_ulp_intf_type match_port_type;\n+\n+\t/* Get the match port type */\n+\tmatch_port_type = ULP_COMP_FLD_IDX_RD(params,\n+\t\t\t\t\t      BNXT_ULP_CF_IDX_MATCH_PORT_TYPE);\n+\n+\t/* If ingress flow and matchport is vf rep then dir is egress*/\n+\tif ((params->dir_attr & BNXT_ULP_FLOW_ATTR_INGRESS) &&\n+\t    match_port_type == BNXT_ULP_INTF_TYPE_VF_REP) {\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_DIRECTION,\n+\t\t\t\t    BNXT_ULP_DIR_EGRESS);\n+\t} else {\n+\t\t/* Assign the input direction */\n+\t\tif (params->dir_attr & BNXT_ULP_FLOW_ATTR_INGRESS)\n+\t\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_DIRECTION,\n+\t\t\t\t\t    BNXT_ULP_DIR_INGRESS);\n+\t\telse\n+\t\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_DIRECTION,\n+\t\t\t\t\t    BNXT_ULP_DIR_EGRESS);\n+\t}\n+}\n+\n /* Function to handle the parsing of RTE Flow item PF Header. */\n static int32_t\n ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,\n-\t\t\tenum rte_flow_item_type proto,\n-\t\t\tuint16_t svif,\n+\t\t\tuint32_t ifindex,\n \t\t\tuint16_t mask)\n {\n-\tuint16_t port_id = svif;\n-\tuint32_t dir = 0;\n+\tuint16_t svif;\n+\tenum bnxt_ulp_direction_type dir;\n \tstruct ulp_rte_hdr_field *hdr_field;\n \tenum bnxt_ulp_svif_type svif_type;\n-\tenum bnxt_ulp_intf_type if_type;\n-\tuint32_t ifindex;\n-\tint32_t rc;\n+\tenum bnxt_ulp_intf_type port_type;\n \n \tif (ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_SVIF_FLAG) !=\n \t    BNXT_ULP_INVALID_SVIF_VAL) {\n@@ -182,31 +235,32 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,\n \t\treturn BNXT_TF_RC_ERROR;\n \t}\n \n-\tif (proto == RTE_FLOW_ITEM_TYPE_PORT_ID) {\n-\t\tdir = ULP_COMP_FLD_IDX_RD(params,\n-\t\t\t\t\t  BNXT_ULP_CF_IDX_DIRECTION);\n-\t\t/* perform the conversion from dpdk port to bnxt svif */\n-\t\trc = ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx, port_id,\n-\t\t\t\t\t\t       &ifindex);\n-\t\tif (rc) {\n-\t\t\tBNXT_TF_DBG(ERR,\n-\t\t\t\t    \"Invalid port id\\n\");\n-\t\t\treturn BNXT_TF_RC_ERROR;\n-\t\t}\n-\n-\t\tif (dir == ULP_DIR_INGRESS) {\n-\t\t\tsvif_type = BNXT_ULP_PHY_PORT_SVIF;\n-\t\t} else {\n-\t\t\tif_type = bnxt_get_interface_type(port_id);\n-\t\t\tif (if_type == BNXT_ULP_INTF_TYPE_VF_REP)\n-\t\t\t\tsvif_type = BNXT_ULP_VF_FUNC_SVIF;\n-\t\t\telse\n-\t\t\t\tsvif_type = BNXT_ULP_DRV_FUNC_SVIF;\n-\t\t}\n-\t\tulp_port_db_svif_get(params->ulp_ctx, ifindex, svif_type,\n-\t\t\t\t     &svif);\n-\t\tsvif = rte_cpu_to_be_16(svif);\n+\t/* Get port type details */\n+\tport_type = ulp_port_db_port_type_get(params->ulp_ctx, ifindex);\n+\tif (port_type == BNXT_ULP_INTF_TYPE_INVALID) {\n+\t\tBNXT_TF_DBG(ERR, \"Invalid port type\\n\");\n+\t\treturn BNXT_TF_RC_ERROR;\n \t}\n+\n+\t/* Update the match port type */\n+\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_MATCH_PORT_TYPE, port_type);\n+\n+\t/* compute the direction */\n+\tbnxt_ulp_rte_parser_direction_compute(params);\n+\n+\t/* Get the computed direction */\n+\tdir = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_DIRECTION);\n+\tif (dir == BNXT_ULP_DIR_INGRESS) {\n+\t\tsvif_type = BNXT_ULP_PHY_PORT_SVIF;\n+\t} else {\n+\t\tif (port_type == BNXT_ULP_INTF_TYPE_VF_REP)\n+\t\t\tsvif_type = BNXT_ULP_VF_FUNC_SVIF;\n+\t\telse\n+\t\t\tsvif_type = BNXT_ULP_DRV_FUNC_SVIF;\n+\t}\n+\tulp_port_db_svif_get(params->ulp_ctx, ifindex, svif_type,\n+\t\t\t     &svif);\n+\tsvif = rte_cpu_to_be_16(svif);\n \thdr_field = &params->hdr_field[BNXT_ULP_PROTO_HDR_FIELD_SVIF_IDX];\n \tmemcpy(hdr_field->spec, &svif, sizeof(svif));\n \tmemcpy(hdr_field->mask, &mask, sizeof(mask));\n@@ -218,10 +272,12 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,\n \n /* Function to handle the parsing of the RTE port id */\n int32_t\n-ulp_rte_parser_svif_process(struct ulp_rte_parser_params *params)\n+ulp_rte_parser_implicit_match_port_process(struct ulp_rte_parser_params *params)\n {\n \tuint16_t port_id = 0;\n \tuint16_t svif_mask = 0xFFFF;\n+\tuint32_t ifindex;\n+\tint32_t rc = BNXT_TF_RC_ERROR;\n \n \tif (ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_SVIF_FLAG) !=\n \t    BNXT_ULP_INVALID_SVIF_VAL)\n@@ -230,14 +286,21 @@ ulp_rte_parser_svif_process(struct ulp_rte_parser_params *params)\n \t/* SVIF not set. So get the port id */\n \tport_id = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_INCOMING_IF);\n \n+\tif (ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx,\n+\t\t\t\t\t      port_id,\n+\t\t\t\t\t      &ifindex)) {\n+\t\tBNXT_TF_DBG(ERR, \"ParseErr:Portid is not valid\\n\");\n+\t\treturn rc;\n+\t}\n+\n \t/* Update the SVIF details */\n-\treturn ulp_rte_parser_svif_set(params, RTE_FLOW_ITEM_TYPE_PORT_ID,\n-\t\t\t\t       port_id, svif_mask);\n+\trc = ulp_rte_parser_svif_set(params, ifindex, svif_mask);\n+\treturn rc;\n }\n \n /* Function to handle the implicit action port id */\n int32_t\n-ulp_rte_parser_implied_act_port_process(struct ulp_rte_parser_params *params)\n+ulp_rte_parser_implicit_act_port_process(struct ulp_rte_parser_params *params)\n {\n \tstruct rte_flow_action action_item = {0};\n \tstruct rte_flow_action_port_id port_id = {0};\n@@ -260,19 +323,26 @@ ulp_rte_parser_implied_act_port_process(struct ulp_rte_parser_params *params)\n \n /* Function to handle the parsing of RTE Flow item PF Header. */\n int32_t\n-ulp_rte_pf_hdr_handler(const struct rte_flow_item *item,\n+ulp_rte_pf_hdr_handler(const struct rte_flow_item *item __rte_unused,\n \t\t       struct ulp_rte_parser_params *params)\n {\n \tuint16_t port_id = 0;\n \tuint16_t svif_mask = 0xFFFF;\n+\tuint32_t ifindex;\n \n-\t/* Get the port id */\n+\t/* Get the implicit port id */\n \tport_id = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_INCOMING_IF);\n \n+\t/* perform the conversion from dpdk port to bnxt ifindex */\n+\tif (ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx,\n+\t\t\t\t\t      port_id,\n+\t\t\t\t\t      &ifindex)) {\n+\t\tBNXT_TF_DBG(ERR, \"ParseErr:Portid is not valid\\n\");\n+\t\treturn BNXT_TF_RC_ERROR;\n+\t}\n+\n \t/* Update the SVIF details */\n-\treturn ulp_rte_parser_svif_set(params,\n-\t\t\t\t       item->type,\n-\t\t\t\t       port_id, svif_mask);\n+\treturn  ulp_rte_parser_svif_set(params, ifindex, svif_mask);\n }\n \n /* Function to handle the parsing of RTE Flow item VF Header. */\n@@ -282,15 +352,30 @@ ulp_rte_vf_hdr_handler(const struct rte_flow_item *item,\n {\n \tconst struct rte_flow_item_vf *vf_spec = item->spec;\n \tconst struct rte_flow_item_vf *vf_mask = item->mask;\n-\tuint16_t svif = 0, mask = 0;\n+\tuint16_t mask = 0;\n+\tuint32_t ifindex;\n+\tint32_t rc = BNXT_TF_RC_PARSE_ERR;\n \n \t/* Get VF rte_flow_item for Port details */\n-\tif (vf_spec)\n-\t\tsvif = (uint16_t)vf_spec->id;\n-\tif (vf_mask)\n-\t\tmask = (uint16_t)vf_mask->id;\n+\tif (!vf_spec) {\n+\t\tBNXT_TF_DBG(ERR, \"ParseErr:VF id is not valid\\n\");\n+\t\treturn rc;\n+\t}\n+\tif (!vf_mask) {\n+\t\tBNXT_TF_DBG(ERR, \"ParseErr:VF mask is not valid\\n\");\n+\t\treturn rc;\n+\t}\n+\tmask = vf_mask->id;\n \n-\treturn ulp_rte_parser_svif_set(params, item->type, svif, mask);\n+\t/* perform the conversion from VF Func id to bnxt ifindex */\n+\tif (ulp_port_db_dev_func_id_to_ulp_index(params->ulp_ctx,\n+\t\t\t\t\t\t vf_spec->id,\n+\t\t\t\t\t\t &ifindex)) {\n+\t\tBNXT_TF_DBG(ERR, \"ParseErr:Portid is not valid\\n\");\n+\t\treturn rc;\n+\t}\n+\t/* Update the SVIF details */\n+\treturn ulp_rte_parser_svif_set(params, ifindex, mask);\n }\n \n /* Function to handle the parsing of RTE Flow item port id  Header. */\n@@ -300,24 +385,29 @@ ulp_rte_port_id_hdr_handler(const struct rte_flow_item *item,\n {\n \tconst struct rte_flow_item_port_id *port_spec = item->spec;\n \tconst struct rte_flow_item_port_id *port_mask = item->mask;\n-\tuint16_t svif = 0, mask = 0;\n+\tuint16_t mask = 0;\n+\tint32_t rc = BNXT_TF_RC_PARSE_ERR;\n+\tuint32_t ifindex;\n \n-\t/*\n-\t * Copy the rte_flow_item for Port into hdr_field using port id\n-\t * header fields.\n-\t */\n-\tif (port_spec) {\n-\t\tsvif = (uint16_t)port_spec->id;\n-\t\tif (svif >= RTE_MAX_ETHPORTS) {\n-\t\t\tBNXT_TF_DBG(ERR, \"ParseErr:Portid is not valid\\n\");\n-\t\t\treturn BNXT_TF_RC_PARSE_ERR;\n-\t\t}\n+\tif (!port_spec) {\n+\t\tBNXT_TF_DBG(ERR, \"ParseErr:Port id is not valid\\n\");\n+\t\treturn rc;\n \t}\n-\tif (port_mask)\n-\t\tmask = (uint16_t)port_mask->id;\n+\tif (!port_mask) {\n+\t\tBNXT_TF_DBG(ERR, \"ParseErr:Phy Port mask is not valid\\n\");\n+\t\treturn rc;\n+\t}\n+\tmask = port_mask->id;\n \n+\t/* perform the conversion from dpdk port to bnxt ifindex */\n+\tif (ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx,\n+\t\t\t\t\t      port_spec->id,\n+\t\t\t\t\t      &ifindex)) {\n+\t\tBNXT_TF_DBG(ERR, \"ParseErr:Portid is not valid\\n\");\n+\t\treturn rc;\n+\t}\n \t/* Update the SVIF details */\n-\treturn ulp_rte_parser_svif_set(params, item->type, svif, mask);\n+\treturn ulp_rte_parser_svif_set(params, ifindex, mask);\n }\n \n /* Function to handle the parsing of RTE Flow item phy port Header. */\n@@ -327,34 +417,55 @@ ulp_rte_phy_port_hdr_handler(const struct rte_flow_item *item,\n {\n \tconst struct rte_flow_item_phy_port *port_spec = item->spec;\n \tconst struct rte_flow_item_phy_port *port_mask = item->mask;\n-\tuint32_t svif = 0, mask = 0;\n-\tstruct bnxt_ulp_device_params *dparms;\n-\tuint32_t dev_id;\n+\tuint16_t mask = 0;\n+\tint32_t rc = BNXT_TF_RC_ERROR;\n+\tuint16_t svif;\n+\tenum bnxt_ulp_direction_type dir;\n+\tstruct ulp_rte_hdr_field *hdr_field;\n \n \t/* Copy the rte_flow_item for phy port into hdr_field */\n-\tif (port_spec)\n-\t\tsvif = port_spec->index;\n-\tif (port_mask)\n-\t\tmask = port_mask->index;\n-\n-\tif (bnxt_ulp_cntxt_dev_id_get(params->ulp_ctx, &dev_id)) {\n-\t\tBNXT_TF_DBG(DEBUG, \"Failed to get device id\\n\");\n-\t\treturn -EINVAL;\n+\tif (!port_spec) {\n+\t\tBNXT_TF_DBG(ERR, \"ParseErr:Phy Port id is not valid\\n\");\n+\t\treturn rc;\n+\t}\n+\tif (!port_mask) {\n+\t\tBNXT_TF_DBG(ERR, \"ParseErr:Phy Port mask is not valid\\n\");\n+\t\treturn rc;\n \t}\n+\tmask = port_mask->index;\n \n-\tdparms = bnxt_ulp_device_params_get(dev_id);\n-\tif (!dparms) {\n-\t\tBNXT_TF_DBG(DEBUG, \"Failed to get device parms\\n\");\n-\t\treturn -EINVAL;\n+\t/* Update the match port type */\n+\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_MATCH_PORT_TYPE,\n+\t\t\t    BNXT_ULP_INTF_TYPE_PHY_PORT);\n+\n+\t/* Compute the Hw direction */\n+\tbnxt_ulp_rte_parser_direction_compute(params);\n+\n+\t/* Direction validation */\n+\tdir = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_DIRECTION);\n+\tif (dir == BNXT_ULP_DIR_EGRESS) {\n+\t\tBNXT_TF_DBG(ERR,\n+\t\t\t    \"Parse Err:Phy ports are valid only for ingress\\n\");\n+\t\treturn BNXT_TF_RC_PARSE_ERR;\n \t}\n \n-\tif (svif > dparms->num_phy_ports) {\n-\t\tBNXT_TF_DBG(ERR, \"ParseErr:Phy Port is not valid\\n\");\n+\t/* Get the physical port details from port db */\n+\trc = ulp_port_db_phy_port_svif_get(params->ulp_ctx, port_spec->index,\n+\t\t\t\t\t   &svif);\n+\tif (rc) {\n+\t\tBNXT_TF_DBG(ERR, \"Failed to get port details\\n\");\n \t\treturn BNXT_TF_RC_PARSE_ERR;\n \t}\n \n \t/* Update the SVIF details */\n-\treturn ulp_rte_parser_svif_set(params, item->type, svif, mask);\n+\tsvif = rte_cpu_to_be_16(svif);\n+\thdr_field = &params->hdr_field[BNXT_ULP_PROTO_HDR_FIELD_SVIF_IDX];\n+\tmemcpy(hdr_field->spec, &svif, sizeof(svif));\n+\tmemcpy(hdr_field->mask, &mask, sizeof(mask));\n+\thdr_field->size = sizeof(svif);\n+\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_SVIF_FLAG,\n+\t\t\t    rte_be_to_cpu_16(svif));\n+\treturn BNXT_TF_RC_SUCCESS;\n }\n \n /* Function to handle the parsing of RTE Flow item Ethernet Header. */\n@@ -1252,7 +1363,7 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n \tmemcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ],\n \t       &vxlan_size, sizeof(uint32_t));\n \n-\t/*update the hdr_bitmap with vxlan */\n+\t/* update the hdr_bitmap with vxlan */\n \tULP_BITMAP_SET(act->bits, BNXT_ULP_ACTION_BIT_VXLAN_ENCAP);\n \treturn BNXT_TF_RC_SUCCESS;\n }\n@@ -1305,68 +1416,82 @@ ulp_rte_count_act_handler(const struct rte_flow_action *action_item,\n \treturn BNXT_TF_RC_SUCCESS;\n }\n \n-/* Function to handle the parsing of RTE Flow action PF. */\n-int32_t\n-ulp_rte_pf_act_handler(const struct rte_flow_action *action_item __rte_unused,\n-\t\t       struct ulp_rte_parser_params *params)\n+/* Function to handle the parsing of action ports. */\n+static int32_t\n+ulp_rte_parser_act_port_set(struct ulp_rte_parser_params *param,\n+\t\t\t    uint32_t ifindex)\n {\n-\tuint32_t port_id, pid;\n-\tuint32_t ifindex;\n+\tenum bnxt_ulp_direction_type dir;\n \tuint16_t pid_s;\n-\tstruct ulp_rte_act_prop *act = &params->act_prop;\n-\n-\t/* Get the port id of the current device */\n-\tport_id = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_INCOMING_IF);\n-\n-\t/* Get the port db ifindex */\n-\tif (ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx, port_id,\n-\t\t\t\t\t      &ifindex)) {\n-\t\tBNXT_TF_DBG(ERR, \"Invalid port id\\n\");\n-\t\treturn BNXT_TF_RC_ERROR;\n-\t}\n-\n-\t/* Check the port is PF port */\n-\tif (ulp_port_db_port_type_get(params->ulp_ctx,\n-\t\t\t\t      ifindex) != BNXT_ULP_INTF_TYPE_PF) {\n-\t\tBNXT_TF_DBG(ERR, \"Port is not a PF port\\n\");\n-\t\treturn BNXT_TF_RC_ERROR;\n-\t}\n+\tuint32_t pid;\n+\tstruct ulp_rte_act_prop *act = &param->act_prop;\n \n-\tif (params->dir == ULP_DIR_EGRESS) {\n+\t/* Get the direction */\n+\tdir = ULP_COMP_FLD_IDX_RD(param, BNXT_ULP_CF_IDX_DIRECTION);\n+\tif (dir == BNXT_ULP_DIR_EGRESS) {\n \t\t/* For egress direction, fill vport */\n-\t\tif (ulp_port_db_vport_get(params->ulp_ctx, ifindex, &pid_s))\n+\t\tif (ulp_port_db_vport_get(param->ulp_ctx, ifindex, &pid_s))\n \t\t\treturn BNXT_TF_RC_ERROR;\n+\n \t\tpid = pid_s;\n \t\tpid = rte_cpu_to_be_32(pid);\n \t\tmemcpy(&act->act_details[BNXT_ULP_ACT_PROP_IDX_VPORT],\n \t\t       &pid, BNXT_ULP_ACT_PROP_SZ_VPORT);\n \t} else {\n \t\t/* For ingress direction, fill vnic */\n-\t\tif (ulp_port_db_default_vnic_get(params->ulp_ctx, ifindex,\n+\t\tif (ulp_port_db_default_vnic_get(param->ulp_ctx, ifindex,\n \t\t\t\t\t\t BNXT_ULP_DRV_FUNC_VNIC,\n \t\t\t\t\t\t &pid_s))\n \t\t\treturn BNXT_TF_RC_ERROR;\n+\n \t\tpid = pid_s;\n \t\tpid = rte_cpu_to_be_32(pid);\n \t\tmemcpy(&act->act_details[BNXT_ULP_ACT_PROP_IDX_VNIC],\n \t\t       &pid, BNXT_ULP_ACT_PROP_SZ_VNIC);\n \t}\n \n-\t/*Update the action port set bit */\n-\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_ACT_PORT_IS_SET, 1);\n+\t/* Update the action port set bit */\n+\tULP_COMP_FLD_IDX_WR(param, BNXT_ULP_CF_IDX_ACT_PORT_IS_SET, 1);\n \treturn BNXT_TF_RC_SUCCESS;\n }\n \n+/* Function to handle the parsing of RTE Flow action PF. */\n+int32_t\n+ulp_rte_pf_act_handler(const struct rte_flow_action *action_item __rte_unused,\n+\t\t       struct ulp_rte_parser_params *params)\n+{\n+\tuint32_t port_id;\n+\tuint32_t ifindex;\n+\tenum bnxt_ulp_intf_type intf_type;\n+\n+\t/* Get the port id of the current device */\n+\tport_id = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_INCOMING_IF);\n+\n+\t/* Get the port db ifindex */\n+\tif (ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx, port_id,\n+\t\t\t\t\t      &ifindex)) {\n+\t\tBNXT_TF_DBG(ERR, \"Invalid port id\\n\");\n+\t\treturn BNXT_TF_RC_ERROR;\n+\t}\n+\n+\t/* Check the port is PF port */\n+\tintf_type = ulp_port_db_port_type_get(params->ulp_ctx, ifindex);\n+\tif (intf_type != BNXT_ULP_INTF_TYPE_PF) {\n+\t\tBNXT_TF_DBG(ERR, \"Port is not a PF port\\n\");\n+\t\treturn BNXT_TF_RC_ERROR;\n+\t}\n+\t/* Update the action properties */\n+\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_ACT_PORT_TYPE, intf_type);\n+\treturn ulp_rte_parser_act_port_set(params, ifindex);\n+}\n+\n /* Function to handle the parsing of RTE Flow action VF. */\n int32_t\n ulp_rte_vf_act_handler(const struct rte_flow_action *action_item,\n \t\t       struct ulp_rte_parser_params *params)\n {\n \tconst struct rte_flow_action_vf *vf_action;\n-\tuint32_t pid;\n \tuint32_t ifindex;\n-\tuint16_t pid_s;\n-\tstruct ulp_rte_act_prop *act = &params->act_prop;\n \tenum bnxt_ulp_intf_type intf_type;\n \n \tvf_action = action_item->conf;\n@@ -1393,29 +1518,9 @@ ulp_rte_vf_act_handler(const struct rte_flow_action *action_item,\n \t\treturn BNXT_TF_RC_ERROR;\n \t}\n \n-\tif (params->dir == ULP_DIR_EGRESS) {\n-\t\t/* For egress direction, fill vport */\n-\t\tif (ulp_port_db_vport_get(params->ulp_ctx, ifindex, &pid_s))\n-\t\t\treturn BNXT_TF_RC_ERROR;\n-\t\tpid = pid_s;\n-\t\tpid = rte_cpu_to_be_32(pid);\n-\t\tmemcpy(&act->act_details[BNXT_ULP_ACT_PROP_IDX_VPORT],\n-\t\t       &pid, BNXT_ULP_ACT_PROP_SZ_VPORT);\n-\t} else {\n-\t\t/* For ingress direction, fill vnic */\n-\t\tif (ulp_port_db_default_vnic_get(params->ulp_ctx, ifindex,\n-\t\t\t\t\t\t BNXT_ULP_DRV_FUNC_VNIC,\n-\t\t\t\t\t\t &pid_s))\n-\t\t\treturn BNXT_TF_RC_ERROR;\n-\t\tpid = pid_s;\n-\t\tpid = rte_cpu_to_be_32(pid);\n-\t\tmemcpy(&act->act_details[BNXT_ULP_ACT_PROP_IDX_VNIC],\n-\t\t       &pid, BNXT_ULP_ACT_PROP_SZ_VNIC);\n-\t}\n-\n-\t/*Update the action port set bit */\n-\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_ACT_PORT_IS_SET, 1);\n-\treturn BNXT_TF_RC_SUCCESS;\n+\t/* Update the action properties */\n+\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_ACT_PORT_TYPE, intf_type);\n+\treturn ulp_rte_parser_act_port_set(params, ifindex);\n }\n \n /* Function to handle the parsing of RTE Flow action port_id. */\n@@ -1423,14 +1528,10 @@ int32_t\n ulp_rte_port_id_act_handler(const struct rte_flow_action *act_item,\n \t\t\t    struct ulp_rte_parser_params *param)\n {\n-\tconst struct rte_flow_action_port_id *port_id;\n-\tstruct ulp_rte_act_prop *act;\n-\tuint32_t pid;\n-\tint32_t rc;\n+\tconst struct rte_flow_action_port_id *port_id = act_item->conf;\n \tuint32_t ifindex;\n-\tuint16_t pid_s;\n+\tenum bnxt_ulp_intf_type intf_type;\n \n-\tport_id = act_item->conf;\n \tif (!port_id) {\n \t\tBNXT_TF_DBG(ERR,\n \t\t\t    \"ParseErr: Invalid Argument\\n\");\n@@ -1443,42 +1544,22 @@ ulp_rte_port_id_act_handler(const struct rte_flow_action *act_item,\n \t}\n \n \t/* Get the port db ifindex */\n-\trc = ulp_port_db_dev_port_to_ulp_index(param->ulp_ctx,\n-\t\t\t\t\t       port_id->id,\n-\t\t\t\t\t       &ifindex);\n-\tif (rc) {\n+\tif (ulp_port_db_dev_port_to_ulp_index(param->ulp_ctx, port_id->id,\n+\t\t\t\t\t      &ifindex)) {\n \t\tBNXT_TF_DBG(ERR, \"Invalid port id\\n\");\n \t\treturn BNXT_TF_RC_ERROR;\n \t}\n \n-\tact = &param->act_prop;\n-\tif (param->dir == ULP_DIR_EGRESS) {\n-\t\trc = ulp_port_db_vport_get(param->ulp_ctx,\n-\t\t\t\t\t   ifindex, &pid_s);\n-\t\tif (rc)\n-\t\t\treturn BNXT_TF_RC_ERROR;\n-\n-\t\tpid = pid_s;\n-\t\tpid = rte_cpu_to_be_32(pid);\n-\t\tmemcpy(&act->act_details[BNXT_ULP_ACT_PROP_IDX_VPORT],\n-\t\t       &pid, BNXT_ULP_ACT_PROP_SZ_VPORT);\n-\t} else {\n-\t\trc = ulp_port_db_default_vnic_get(param->ulp_ctx,\n-\t\t\t\t\t\t  ifindex,\n-\t\t\t\t\t\t  BNXT_ULP_DRV_FUNC_VNIC,\n-\t\t\t\t\t\t  &pid_s);\n-\t\tif (rc)\n-\t\t\treturn BNXT_TF_RC_ERROR;\n-\n-\t\tpid = pid_s;\n-\t\tpid = rte_cpu_to_be_32(pid);\n-\t\tmemcpy(&act->act_details[BNXT_ULP_ACT_PROP_IDX_VNIC],\n-\t\t       &pid, BNXT_ULP_ACT_PROP_SZ_VNIC);\n+\t/* Get the intf type */\n+\tintf_type = ulp_port_db_port_type_get(param->ulp_ctx, ifindex);\n+\tif (!intf_type) {\n+\t\tBNXT_TF_DBG(ERR, \"Invalid port type\\n\");\n+\t\treturn BNXT_TF_RC_ERROR;\n \t}\n \n-\t/*Update the action port set bit */\n-\tULP_COMP_FLD_IDX_WR(param, BNXT_ULP_CF_IDX_ACT_PORT_IS_SET, 1);\n-\treturn BNXT_TF_RC_SUCCESS;\n+\t/* Set the action port */\n+\tULP_COMP_FLD_IDX_WR(param, BNXT_ULP_CF_IDX_ACT_PORT_TYPE, intf_type);\n+\treturn ulp_rte_parser_act_port_set(param, ifindex);\n }\n \n /* Function to handle the parsing of RTE Flow action phy_port. */\n@@ -1490,6 +1571,7 @@ ulp_rte_phy_port_act_handler(const struct rte_flow_action *action_item,\n \tuint32_t pid;\n \tint32_t rc;\n \tuint16_t pid_s;\n+\tenum bnxt_ulp_direction_type dir;\n \n \tphy_port = action_item->conf;\n \tif (!phy_port) {\n@@ -1503,7 +1585,8 @@ ulp_rte_phy_port_act_handler(const struct rte_flow_action *action_item,\n \t\t\t    \"Parse Err:Port Original not supported\\n\");\n \t\treturn BNXT_TF_RC_PARSE_ERR;\n \t}\n-\tif (prm->dir != ULP_DIR_EGRESS) {\n+\tdir = ULP_COMP_FLD_IDX_RD(prm, BNXT_ULP_CF_IDX_DIRECTION);\n+\tif (dir != BNXT_ULP_DIR_EGRESS) {\n \t\tBNXT_TF_DBG(ERR,\n \t\t\t    \"Parse Err:Phy ports are valid only for egress\\n\");\n \t\treturn BNXT_TF_RC_PARSE_ERR;\n@@ -1512,7 +1595,7 @@ ulp_rte_phy_port_act_handler(const struct rte_flow_action *action_item,\n \trc = ulp_port_db_phy_port_vport_get(prm->ulp_ctx, phy_port->index,\n \t\t\t\t\t    &pid_s);\n \tif (rc) {\n-\t\tBNXT_TF_DBG(DEBUG, \"Failed to get port details\\n\");\n+\t\tBNXT_TF_DBG(ERR, \"Failed to get port details\\n\");\n \t\treturn -EINVAL;\n \t}\n \n@@ -1521,8 +1604,10 @@ ulp_rte_phy_port_act_handler(const struct rte_flow_action *action_item,\n \tmemcpy(&prm->act_prop.act_details[BNXT_ULP_ACT_PROP_IDX_VPORT],\n \t       &pid, BNXT_ULP_ACT_PROP_SZ_VPORT);\n \n-\t/*Update the action port set bit */\n+\t/* Update the action port set bit */\n \tULP_COMP_FLD_IDX_WR(prm, BNXT_ULP_CF_IDX_ACT_PORT_IS_SET, 1);\n+\tULP_COMP_FLD_IDX_WR(prm, BNXT_ULP_CF_IDX_ACT_PORT_TYPE,\n+\t\t\t    BNXT_ULP_INTF_TYPE_PHY_PORT);\n \treturn BNXT_TF_RC_SUCCESS;\n }\n \ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h\nindex 49e9cbb..a440280 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h\n@@ -33,11 +33,11 @@\n \n /* Function to handle the parsing of the RTE port id. */\n int32_t\n-ulp_rte_parser_svif_process(struct ulp_rte_parser_params *params);\n+ulp_rte_parser_implicit_match_port_process(struct ulp_rte_parser_params *param);\n \n /* Function to handle the implicit action port id */\n int32_t\n-ulp_rte_parser_implied_act_port_process(struct ulp_rte_parser_params *params);\n+ulp_rte_parser_implicit_act_port_process(struct ulp_rte_parser_params *params);\n \n /*\n  * Function to handle the parsing of RTE Flows and placing\n@@ -55,6 +55,12 @@ int32_t\n bnxt_ulp_rte_parser_act_parse(const struct rte_flow_action actions[],\n \t\t\t      struct ulp_rte_parser_params *params);\n \n+/*\n+ * Function to handle the post processing of the parsing details\n+ */\n+int32_t\n+bnxt_ulp_rte_parser_post_process(struct ulp_rte_parser_params *params);\n+\n /* Function to handle the parsing of RTE Flow item PF Header. */\n int32_t\n ulp_rte_pf_hdr_handler(const struct rte_flow_item *item,\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h\nindex ada3a5e..14c77b3 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h\n@@ -129,8 +129,10 @@ enum bnxt_ulp_cf_idx {\n \tBNXT_ULP_CF_IDX_ACT_DEC_TTL = 33,\n \tBNXT_ULP_CF_IDX_ACT_T_DEC_TTL = 34,\n \tBNXT_ULP_CF_IDX_ACT_PORT_IS_SET = 35,\n-\tBNXT_ULP_CF_IDX_MATCH_PORT_TYPE = 36,\n-\tBNXT_ULP_CF_IDX_LAST = 37\n+\tBNXT_ULP_CF_IDX_ACT_PORT_TYPE = 36,\n+\tBNXT_ULP_CF_IDX_MATCH_PORT_TYPE = 37,\n+\tBNXT_ULP_CF_IDX_VF_TO_VF = 38,\n+\tBNXT_ULP_CF_IDX_LAST = 39\n };\n \n enum bnxt_ulp_cond_opcode {\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\nindex df999b1..ea4f253 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\n@@ -30,6 +30,11 @@\n #define BNXT_ULP_PROTO_HDR_MAX\t\t128\n #define BNXT_ULP_PROTO_HDR_FIELD_SVIF_IDX\t0\n \n+/* Direction attributes */\n+#define BNXT_ULP_FLOW_ATTR_TRANSFER\t0x1\n+#define BNXT_ULP_FLOW_ATTR_INGRESS\t0x2\n+#define BNXT_ULP_FLOW_ATTR_EGRESS\t0x4\n+\n struct ulp_rte_hdr_bitmap {\n \tuint64_t\tbits;\n };\n@@ -65,7 +70,7 @@ struct ulp_rte_parser_params {\n \tuint32_t\t\t\tvlan_idx;\n \tstruct ulp_rte_act_bitmap\tact_bitmap;\n \tstruct ulp_rte_act_prop\t\tact_prop;\n-\tuint32_t\t\t\tdir;\n+\tuint32_t\t\t\tdir_attr;\n \tstruct bnxt_ulp_context\t\t*ulp_ctx;\n };\n \n",
    "prefixes": [
        "14/20"
    ]
}