Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/71657/?format=api
http://patches.dpdk.org/api/patches/71657/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200617063047.1555518-9-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200617063047.1555518-9-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200617063047.1555518-9-jerinj@marvell.com", "date": "2020-06-17T06:30:42", "name": "[08/13] drivers/crypto: use log register macro", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "933bfb8a7a451a12d5b5b0ec571631c44e30805a", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200617063047.1555518-9-jerinj@marvell.com/mbox/", "series": [ { "id": 10476, "url": "http://patches.dpdk.org/api/series/10476/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10476", "date": "2020-06-17T06:30:34", "name": "rte_log registration usage improvement", "version": 1, "mbox": "http://patches.dpdk.org/series/10476/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/71657/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/71657/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B98CDA04A5;\n\tWed, 17 Jun 2020 08:31:42 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 7BDCA14583;\n\tWed, 17 Jun 2020 08:31:17 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 568F1FFA\n for <dev@dpdk.org>; Wed, 17 Jun 2020 08:31:16 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 05H6PrIP010519; Tue, 16 Jun 2020 23:31:15 -0700", "from sc-exch02.marvell.com ([199.233.58.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 31q658jmyy-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 16 Jun 2020 23:31:15 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH02.marvell.com\n (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 16 Jun 2020 23:31:13 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 16 Jun 2020 23:31:13 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n by maili.marvell.com (Postfix) with ESMTP id 9BEA43F703F;\n Tue, 16 Jun 2020 23:31:08 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=RMENcVOKMZGCAEQZS+xUbZKwngLkDNJ8Gtqf2h2a8Gg=;\n b=uPXRMQpbTHKbzGpwkhch+YW9ApT/4sozda/WRRR/XFHcK18MSA7yfPLkx66egzzsaNY9\n mRA1uJA71Phc9B1OUSugtyY1cY4o/zbatbDBkHQQwRk8nvSsR+1Hg7f1fpN628hekUdl\n NPgq8T4kATKWKI4HgZ/BCsSa1d3ZZmDF35JScwf/A0RMpwbE5zgOYLf1ezi2PApeRabk\n Ecr/F6t/7W6RvvXr4crky3xKZvyjMCJ2J9diuqOs+GibgUPCb84tE3VkwBOpiD9BtdbS\n Xw/QA9WLWNcB/tnl39k69Zk6LevsA/YOny0XzlhN+ngS8h2HkokM22wggryaBlSWnfDj NA==", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>, Declan Doherty <declan.doherty@intel.com>, Pablo de Lara\n <pablo.de.lara.guarch@intel.com>, Gagandeep Singh <g.singh@nxp.com>,\n \"Hemant Agrawal\" <hemant.agrawal@nxp.com>,\n Akhil Goyal <akhil.goyal@nxp.com>,\n \"Michael Shamis\" <michaelsh@marvell.com>, Liron Himi <lironh@marvell.com>,\n \"Nagadheeraj Rottela\" <rnagadheeraj@marvell.com>, Srikanth Jampala\n <jsrikanth@marvell.com>, Anoob Joseph <anoobj@marvell.com>, Ankur Dwivedi\n <adwivedi@marvell.com>, \"Fan Zhang\" <roy.fan.zhang@intel.com>, Jay Zhou\n <jianjay.zhou@huawei.com>", "CC": "<thomas@monjalon.net>, <olivier.matz@6wind.com>,\n <david.marchand@redhat.com>, Jerin Jacob <jerinj@marvell.com>", "Date": "Wed, 17 Jun 2020 12:00:42 +0530", "Message-ID": "<20200617063047.1555518-9-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20200617063047.1555518-1-jerinj@marvell.com>", "References": "<20200617063047.1555518-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687\n definitions=2020-06-16_13:2020-06-16,\n 2020-06-16 signatures=0", "Subject": "[dpdk-dev] [PATCH 08/13] drivers/crypto: use log register macro", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Jerin Jacob <jerinj@marvell.com>\n\nUse log register macro to avoid the code duplication\nin the log registration process.\n\nSigned-off-by: Jerin Jacob <jerinj@marvell.com>\n---\n drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 8 +---\n drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c | 8 +---\n drivers/crypto/caam_jr/caam_jr.c | 8 +---\n drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 11 +-----\n drivers/crypto/dpaa_sec/dpaa_sec.c | 10 +----\n drivers/crypto/kasumi/rte_kasumi_pmd.c | 6 +--\n drivers/crypto/mvsam/rte_mrvl_pmd.c | 7 +---\n drivers/crypto/nitrox/nitrox_logs.c | 9 +----\n drivers/crypto/null/null_crypto_pmd.c | 7 +---\n drivers/crypto/octeontx/otx_cryptodev.c | 10 +----\n drivers/crypto/octeontx2/otx2_cryptodev.c | 12 +-----\n drivers/crypto/openssl/rte_openssl_pmd.c | 7 +---\n .../scheduler/rte_cryptodev_scheduler.c | 8 +---\n drivers/crypto/snow3g/rte_snow3g_pmd.c | 7 +---\n drivers/crypto/virtio/virtio_cryptodev.c | 39 ++++---------------\n drivers/crypto/zuc/rte_zuc_pmd.c | 7 +---\n 16 files changed, 23 insertions(+), 141 deletions(-)", "diff": "diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c\nindex d213d05b9..1d2a0ce00 100644\n--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c\n+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c\n@@ -13,8 +13,6 @@\n \n #include \"aesni_gcm_pmd_private.h\"\n \n-int aesni_gcm_logtype_driver;\n-\n static uint8_t cryptodev_driver_id;\n \n /* setup session handlers */\n@@ -889,8 +887,4 @@ RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_AESNI_GCM_PMD,\n \t\"socket_id=<int>\");\n RTE_PMD_REGISTER_CRYPTO_DRIVER(aesni_gcm_crypto_drv, aesni_gcm_pmd_drv.driver,\n \t\tcryptodev_driver_id);\n-\n-RTE_INIT(aesni_gcm_init_log)\n-{\n-\taesni_gcm_logtype_driver = rte_log_register(\"pmd.crypto.aesni_gcm\");\n-}\n+RTE_LOG_REGISTER(aesni_gcm_logtype_driver, pmd.crypto.aesni_gcm, NOTICE);\ndiff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c\nindex 2d688f4d3..9d0d9f4d7 100644\n--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c\n+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c\n@@ -15,8 +15,6 @@\n \n #include \"aesni_mb_pmd_private.h\"\n \n-int aesni_mb_logtype_driver;\n-\n #define AES_CCM_DIGEST_MIN_LEN 4\n #define AES_CCM_DIGEST_MAX_LEN 16\n #define HMAC_MAX_BLOCK_SIZE 128\n@@ -1744,8 +1742,4 @@ RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_AESNI_MB_PMD,\n RTE_PMD_REGISTER_CRYPTO_DRIVER(aesni_mb_crypto_drv,\n \t\tcryptodev_aesni_mb_pmd_drv.driver,\n \t\tcryptodev_driver_id);\n-\n-RTE_INIT(aesni_mb_init_log)\n-{\n-\taesni_mb_logtype_driver = rte_log_register(\"pmd.crypto.aesni_mb\");\n-}\n+RTE_LOG_REGISTER(aesni_mb_logtype_driver, pmd.crypto.aesni_mb, NOTICE);\ndiff --git a/drivers/crypto/caam_jr/caam_jr.c b/drivers/crypto/caam_jr/caam_jr.c\nindex caf238677..49a35d614 100644\n--- a/drivers/crypto/caam_jr/caam_jr.c\n+++ b/drivers/crypto/caam_jr/caam_jr.c\n@@ -35,7 +35,6 @@\n #endif\n #define CRYPTODEV_NAME_CAAM_JR_PMD\tcrypto_caam_jr\n static uint8_t cryptodev_driver_id;\n-int caam_jr_logtype;\n \n /* Lists the states possible for the SEC user space driver. */\n enum sec_driver_state_e {\n@@ -2477,9 +2476,4 @@ RTE_INIT(caam_jr_init)\n \tsec_job_rings_init();\n }\n \n-RTE_INIT(caam_jr_init_log)\n-{\n-\tcaam_jr_logtype = rte_log_register(\"pmd.crypto.caam\");\n-\tif (caam_jr_logtype >= 0)\n-\t\trte_log_set_level(caam_jr_logtype, RTE_LOG_NOTICE);\n-}\n+RTE_LOG_REGISTER(caam_jr_logtype, pmd.crypto.caam, NOTICE);\ndiff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\nindex 63e7d930a..12f833136 100644\n--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\n+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\n@@ -58,8 +58,6 @@\n \n static uint8_t cryptodev_driver_id;\n \n-int dpaa2_logtype_sec;\n-\n #ifdef RTE_LIBRTE_SECURITY\n static inline int\n build_proto_compound_sg_fd(dpaa2_sec_session *sess,\n@@ -3918,11 +3916,4 @@ static struct cryptodev_driver dpaa2_sec_crypto_drv;\n RTE_PMD_REGISTER_DPAA2(CRYPTODEV_NAME_DPAA2_SEC_PMD, rte_dpaa2_sec_driver);\n RTE_PMD_REGISTER_CRYPTO_DRIVER(dpaa2_sec_crypto_drv,\n \t\trte_dpaa2_sec_driver.driver, cryptodev_driver_id);\n-\n-RTE_INIT(dpaa2_sec_init_log)\n-{\n-\t/* Bus level logs */\n-\tdpaa2_logtype_sec = rte_log_register(\"pmd.crypto.dpaa2\");\n-\tif (dpaa2_logtype_sec >= 0)\n-\t\trte_log_set_level(dpaa2_logtype_sec, RTE_LOG_NOTICE);\n-}\n+RTE_LOG_REGISTER(dpaa2_logtype_sec, pmd.crypto.dpaa2, NOTICE);\ndiff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c\nindex 66ee0ba0c..d9fa8bb36 100644\n--- a/drivers/crypto/dpaa_sec/dpaa_sec.c\n+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c\n@@ -43,8 +43,6 @@\n #include <dpaa_sec_log.h>\n #include <dpaax_iova_table.h>\n \n-int dpaa_logtype_sec;\n-\n static uint8_t cryptodev_driver_id;\n \n static __thread struct rte_crypto_op **dpaa_sec_ops;\n@@ -3520,10 +3518,4 @@ static struct cryptodev_driver dpaa_sec_crypto_drv;\n RTE_PMD_REGISTER_DPAA(CRYPTODEV_NAME_DPAA_SEC_PMD, rte_dpaa_sec_driver);\n RTE_PMD_REGISTER_CRYPTO_DRIVER(dpaa_sec_crypto_drv, rte_dpaa_sec_driver.driver,\n \t\tcryptodev_driver_id);\n-\n-RTE_INIT(dpaa_sec_init_log)\n-{\n-\tdpaa_logtype_sec = rte_log_register(\"pmd.crypto.dpaa\");\n-\tif (dpaa_logtype_sec >= 0)\n-\t\trte_log_set_level(dpaa_logtype_sec, RTE_LOG_NOTICE);\n-}\n+RTE_LOG_REGISTER(dpaa_logtype_sec, pmd.crypto.dpaa, NOTICE);\ndiff --git a/drivers/crypto/kasumi/rte_kasumi_pmd.c b/drivers/crypto/kasumi/rte_kasumi_pmd.c\nindex 73077e3d9..c3f0dfc2f 100644\n--- a/drivers/crypto/kasumi/rte_kasumi_pmd.c\n+++ b/drivers/crypto/kasumi/rte_kasumi_pmd.c\n@@ -17,7 +17,6 @@\n #define KASUMI_MAX_BURST 4\n #define BYTE_LEN 8\n \n-int kasumi_logtype_driver;\n static uint8_t cryptodev_driver_id;\n \n /** Get xform chain order. */\n@@ -639,7 +638,4 @@ RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_KASUMI_PMD,\n RTE_PMD_REGISTER_CRYPTO_DRIVER(kasumi_crypto_drv,\n \t\tcryptodev_kasumi_pmd_drv.driver, cryptodev_driver_id);\n \n-RTE_INIT(kasumi_init_log)\n-{\n-\tkasumi_logtype_driver = rte_log_register(\"pmd.crypto.kasumi\");\n-}\n+RTE_LOG_REGISTER(kasumi_logtype_driver, pmd.crypto.kasumi, NOTICE);\ndiff --git a/drivers/crypto/mvsam/rte_mrvl_pmd.c b/drivers/crypto/mvsam/rte_mrvl_pmd.c\nindex 63782ce97..aaa40dced 100644\n--- a/drivers/crypto/mvsam/rte_mrvl_pmd.c\n+++ b/drivers/crypto/mvsam/rte_mrvl_pmd.c\n@@ -19,7 +19,6 @@\n #define MRVL_PMD_MAX_NB_SESS_ARG\t\t(\"max_nb_sessions\")\n #define MRVL_PMD_DEFAULT_MAX_NB_SESSIONS\t2048\n \n-int mrvl_logtype_driver;\n static uint8_t cryptodev_driver_id;\n \n struct mrvl_pmd_init_params {\n@@ -1020,8 +1019,4 @@ RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_MRVL_PMD,\n \t\"socket_id=<int>\");\n RTE_PMD_REGISTER_CRYPTO_DRIVER(mrvl_crypto_drv, cryptodev_mrvl_pmd_drv.driver,\n \t\tcryptodev_driver_id);\n-\n-RTE_INIT(crypto_mrvl_init_log)\n-{\n-\tmrvl_logtype_driver = rte_log_register(\"pmd.crypto.mvsam\");\n-}\n+RTE_LOG_REGISTER(mrvl_logtype_driver, pmd.crypto.mvsam, NOTICE);\ndiff --git a/drivers/crypto/nitrox/nitrox_logs.c b/drivers/crypto/nitrox/nitrox_logs.c\nindex 007056cb4..26395159a 100644\n--- a/drivers/crypto/nitrox/nitrox_logs.c\n+++ b/drivers/crypto/nitrox/nitrox_logs.c\n@@ -4,11 +4,4 @@\n \n #include <rte_log.h>\n \n-int nitrox_logtype;\n-\n-RTE_INIT(nitrox_init_log)\n-{\n-\tnitrox_logtype = rte_log_register(\"pmd.crypto.nitrox\");\n-\tif (nitrox_logtype >= 0)\n-\t\trte_log_set_level(nitrox_logtype, RTE_LOG_NOTICE);\n-}\n+RTE_LOG_REGISTER(nitrox_logtype, pmd.crypto.nitrox, NOTICE);\ndiff --git a/drivers/crypto/null/null_crypto_pmd.c b/drivers/crypto/null/null_crypto_pmd.c\nindex 7b0b9d42b..e04042e75 100644\n--- a/drivers/crypto/null/null_crypto_pmd.c\n+++ b/drivers/crypto/null/null_crypto_pmd.c\n@@ -10,7 +10,6 @@\n #include \"null_crypto_pmd_private.h\"\n \n static uint8_t cryptodev_driver_id;\n-int null_logtype_driver;\n \n /** verify and set session parameters */\n int\n@@ -249,8 +248,4 @@ RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_NULL_PMD,\n \t\"socket_id=<int>\");\n RTE_PMD_REGISTER_CRYPTO_DRIVER(null_crypto_drv, cryptodev_null_pmd_drv.driver,\n \t\tcryptodev_driver_id);\n-\n-RTE_INIT(null_init_log)\n-{\n-\tnull_logtype_driver = rte_log_register(\"pmd.crypto.null\");\n-}\n+RTE_LOG_REGISTER(null_logtype_driver, pmd.crypto.null, INFO);\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev.c b/drivers/crypto/octeontx/otx_cryptodev.c\nindex ddece1311..5ce1cf82f 100644\n--- a/drivers/crypto/octeontx/otx_cryptodev.c\n+++ b/drivers/crypto/octeontx/otx_cryptodev.c\n@@ -15,7 +15,6 @@\n #include \"cpt_pmd_logs.h\"\n \n uint8_t otx_cryptodev_driver_id;\n-int otx_cpt_logtype;\n \n static struct rte_pci_id pci_id_cpt_table[] = {\n \t{\n@@ -112,11 +111,4 @@ RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_OCTEONTX_PMD, pci_id_cpt_table);\n RTE_PMD_REGISTER_KMOD_DEP(CRYPTODEV_NAME_OCTEONTX_PMD, \"vfio-pci\");\n RTE_PMD_REGISTER_CRYPTO_DRIVER(otx_cryptodev_drv, otx_cryptodev_pmd.driver,\n \t\totx_cryptodev_driver_id);\n-\n-RTE_INIT(otx_cpt_init_log)\n-{\n-\t/* Bus level logs */\n-\totx_cpt_logtype = rte_log_register(\"pmd.crypto.octeontx\");\n-\tif (otx_cpt_logtype >= 0)\n-\t\trte_log_set_level(otx_cpt_logtype, RTE_LOG_NOTICE);\n-}\n+RTE_LOG_REGISTER(otx_cpt_logtype, pmd.crypto.octeontx, NOTICE);\ndiff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c\nindex 6ffbc2eb7..50cbb13d8 100644\n--- a/drivers/crypto/octeontx2/otx2_cryptodev.c\n+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c\n@@ -22,8 +22,6 @@\n #include \"cpt_common.h\"\n #include \"cpt_pmd_logs.h\"\n \n-int otx2_cpt_logtype;\n-\n uint8_t otx2_cryptodev_driver_id;\n \n static struct rte_pci_id pci_id_cpt_table[] = {\n@@ -146,17 +144,9 @@ static struct rte_pci_driver otx2_cryptodev_pmd = {\n \n static struct cryptodev_driver otx2_cryptodev_drv;\n \n-RTE_INIT(otx2_cpt_init_log);\n RTE_PMD_REGISTER_PCI(CRYPTODEV_NAME_OCTEONTX2_PMD, otx2_cryptodev_pmd);\n RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_OCTEONTX2_PMD, pci_id_cpt_table);\n RTE_PMD_REGISTER_KMOD_DEP(CRYPTODEV_NAME_OCTEONTX2_PMD, \"vfio-pci\");\n RTE_PMD_REGISTER_CRYPTO_DRIVER(otx2_cryptodev_drv, otx2_cryptodev_pmd.driver,\n \t\totx2_cryptodev_driver_id);\n-\n-RTE_INIT(otx2_cpt_init_log)\n-{\n-\t/* Bus level logs */\n-\totx2_cpt_logtype = rte_log_register(\"pmd.crypto.octeontx2\");\n-\tif (otx2_cpt_logtype >= 0)\n-\t\trte_log_set_level(otx2_cpt_logtype, RTE_LOG_NOTICE);\n-}\n+RTE_LOG_REGISTER(otx2_cpt_logtype, pmd.crypto.octeontx2, NOTICE);\ndiff --git a/drivers/crypto/openssl/rte_openssl_pmd.c b/drivers/crypto/openssl/rte_openssl_pmd.c\nindex bb9fb877a..7d3959f55 100644\n--- a/drivers/crypto/openssl/rte_openssl_pmd.c\n+++ b/drivers/crypto/openssl/rte_openssl_pmd.c\n@@ -18,7 +18,6 @@\n \n #define DES_BLOCK_SIZE 8\n \n-int openssl_logtype_driver;\n static uint8_t cryptodev_driver_id;\n \n #if (OPENSSL_VERSION_NUMBER < 0x10100000L)\n@@ -2279,8 +2278,4 @@ RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_OPENSSL_PMD,\n \t\"socket_id=<int>\");\n RTE_PMD_REGISTER_CRYPTO_DRIVER(openssl_crypto_drv,\n \t\tcryptodev_openssl_pmd_drv.driver, cryptodev_driver_id);\n-\n-RTE_INIT(openssl_init_log)\n-{\n-\topenssl_logtype_driver = rte_log_register(\"pmd.crypto.openssl\");\n-}\n+RTE_LOG_REGISTER(openssl_logtype_driver, pmd.crypto.openssl, INFO);\ndiff --git a/drivers/crypto/scheduler/rte_cryptodev_scheduler.c b/drivers/crypto/scheduler/rte_cryptodev_scheduler.c\nindex 1fef88f11..730504dab 100644\n--- a/drivers/crypto/scheduler/rte_cryptodev_scheduler.c\n+++ b/drivers/crypto/scheduler/rte_cryptodev_scheduler.c\n@@ -10,8 +10,6 @@\n #include \"rte_cryptodev_scheduler.h\"\n #include \"scheduler_pmd_private.h\"\n \n-int scheduler_logtype_driver;\n-\n /** update the scheduler pmd's capability with attaching device's\n * capability.\n * For each device to be attached, the scheduler's capability should be\n@@ -578,7 +576,5 @@ rte_cryptodev_scheduler_option_get(uint8_t scheduler_id,\n \treturn (*sched_ctx->ops.option_get)(dev, option_type, option);\n }\n \n-RTE_INIT(scheduler_init_log)\n-{\n-\tscheduler_logtype_driver = rte_log_register(\"pmd.crypto.scheduler\");\n-}\n+\n+RTE_LOG_REGISTER(scheduler_logtype_driver, pmd.crypto.scheduler, INFO);\ndiff --git a/drivers/crypto/snow3g/rte_snow3g_pmd.c b/drivers/crypto/snow3g/rte_snow3g_pmd.c\nindex c939064d5..558e01e70 100644\n--- a/drivers/crypto/snow3g/rte_snow3g_pmd.c\n+++ b/drivers/crypto/snow3g/rte_snow3g_pmd.c\n@@ -16,7 +16,6 @@\n #define SNOW3G_MAX_BURST 8\n #define BYTE_LEN 8\n \n-int snow3g_logtype_driver;\n static uint8_t cryptodev_driver_id;\n \n /** Get xform chain order. */\n@@ -653,8 +652,4 @@ RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_SNOW3G_PMD,\n \t\"socket_id=<int>\");\n RTE_PMD_REGISTER_CRYPTO_DRIVER(snow3g_crypto_drv,\n \t\tcryptodev_snow3g_pmd_drv.driver, cryptodev_driver_id);\n-\n-RTE_INIT(snow3g_init_log)\n-{\n-\tsnow3g_logtype_driver = rte_log_register(\"pmd.crypto.snow3g\");\n-}\n+RTE_LOG_REGISTER(snow3g_logtype_driver, pmd.crypto.snow3g, INFO);\ndiff --git a/drivers/crypto/virtio/virtio_cryptodev.c b/drivers/crypto/virtio/virtio_cryptodev.c\nindex cdf43b0e0..31a5f1072 100644\n--- a/drivers/crypto/virtio/virtio_cryptodev.c\n+++ b/drivers/crypto/virtio/virtio_cryptodev.c\n@@ -17,12 +17,6 @@\n #include \"virtio_crypto_algs.h\"\n #include \"virtio_crypto_capabilities.h\"\n \n-int virtio_crypto_logtype_init;\n-int virtio_crypto_logtype_session;\n-int virtio_crypto_logtype_rx;\n-int virtio_crypto_logtype_tx;\n-int virtio_crypto_logtype_driver;\n-\n static int virtio_crypto_dev_configure(struct rte_cryptodev *dev,\n \t\tstruct rte_cryptodev_config *config);\n static int virtio_crypto_dev_start(struct rte_cryptodev *dev);\n@@ -1489,29 +1483,10 @@ RTE_PMD_REGISTER_PCI(CRYPTODEV_NAME_VIRTIO_PMD, rte_virtio_crypto_driver);\n RTE_PMD_REGISTER_CRYPTO_DRIVER(virtio_crypto_drv,\n \trte_virtio_crypto_driver.driver,\n \tcryptodev_virtio_driver_id);\n-\n-RTE_INIT(virtio_crypto_init_log)\n-{\n-\tvirtio_crypto_logtype_init = rte_log_register(\"pmd.crypto.virtio.init\");\n-\tif (virtio_crypto_logtype_init >= 0)\n-\t\trte_log_set_level(virtio_crypto_logtype_init, RTE_LOG_NOTICE);\n-\n-\tvirtio_crypto_logtype_session =\n-\t\trte_log_register(\"pmd.crypto.virtio.session\");\n-\tif (virtio_crypto_logtype_session >= 0)\n-\t\trte_log_set_level(virtio_crypto_logtype_session,\n-\t\t\t\tRTE_LOG_NOTICE);\n-\n-\tvirtio_crypto_logtype_rx = rte_log_register(\"pmd.crypto.virtio.rx\");\n-\tif (virtio_crypto_logtype_rx >= 0)\n-\t\trte_log_set_level(virtio_crypto_logtype_rx, RTE_LOG_NOTICE);\n-\n-\tvirtio_crypto_logtype_tx = rte_log_register(\"pmd.crypto.virtio.tx\");\n-\tif (virtio_crypto_logtype_tx >= 0)\n-\t\trte_log_set_level(virtio_crypto_logtype_tx, RTE_LOG_NOTICE);\n-\n-\tvirtio_crypto_logtype_driver =\n-\t\trte_log_register(\"pmd.crypto.virtio.driver\");\n-\tif (virtio_crypto_logtype_driver >= 0)\n-\t\trte_log_set_level(virtio_crypto_logtype_driver, RTE_LOG_NOTICE);\n-}\n+RTE_LOG_REGISTER(virtio_crypto_logtype_init, pmd.crypto.virtio.init, NOTICE);\n+RTE_LOG_REGISTER(virtio_crypto_logtype_session, pmd.crypto.virtio.session,\n+\t\t NOTICE);\n+RTE_LOG_REGISTER(virtio_crypto_logtype_rx, pmd.crypto.virtio.rx, NOTICE);\n+RTE_LOG_REGISTER(virtio_crypto_logtype_tx, pmd.crypto.virtio.tx, NOTICE);\n+RTE_LOG_REGISTER(virtio_crypto_logtype_driver, pmd.crypto.virtio.driver,\n+\t\t NOTICE);\ndiff --git a/drivers/crypto/zuc/rte_zuc_pmd.c b/drivers/crypto/zuc/rte_zuc_pmd.c\nindex df8d6f6bb..20cb5a160 100644\n--- a/drivers/crypto/zuc/rte_zuc_pmd.c\n+++ b/drivers/crypto/zuc/rte_zuc_pmd.c\n@@ -14,7 +14,6 @@\n #define ZUC_MAX_BURST 16\n #define BYTE_LEN 8\n \n-int zuc_logtype_driver;\n static uint8_t cryptodev_driver_id;\n \n /** Get xform chain order. */\n@@ -580,8 +579,4 @@ RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_ZUC_PMD,\n \t\"socket_id=<int>\");\n RTE_PMD_REGISTER_CRYPTO_DRIVER(zuc_crypto_drv, cryptodev_zuc_pmd_drv.driver,\n \t\tcryptodev_driver_id);\n-\n-RTE_INIT(zuc_init_log)\n-{\n-\tzuc_logtype_driver = rte_log_register(\"pmd.crypto.zuc\");\n-}\n+RTE_LOG_REGISTER(zuc_logtype_driver, pmd.crypto.zuc, INFO);\n", "prefixes": [ "08/13" ] }{ "id": 71657, "url": "