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GET /api/patches/71632/?format=api
{ "id": 71632, "url": "http://patches.dpdk.org/api/patches/71632/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200616094446.7152-2-ophirmu@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200616094446.7152-2-ophirmu@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200616094446.7152-2-ophirmu@mellanox.com", "date": "2020-06-16T09:44:43", "name": "[v1,1/4] common/mlx5: remove MR struct dependency on ibv", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "a9ec7a1bd66a37ac3ccebfdf3c2c061b175a31b1", "submitter": { "id": 793, "url": "http://patches.dpdk.org/api/people/793/?format=api", "name": "Ophir Munk", "email": "ophirmu@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200616094446.7152-2-ophirmu@mellanox.com/mbox/", "series": [ { "id": 10467, "url": "http://patches.dpdk.org/api/series/10467/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10467", "date": "2020-06-16T09:44:42", "name": "mlx5 MR refactor", "version": 1, "mbox": "http://patches.dpdk.org/series/10467/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/71632/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/71632/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B5972A04A3;\n\tTue, 16 Jun 2020 11:45:04 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C74251BEE6;\n\tTue, 16 Jun 2020 11:44:57 +0200 (CEST)", "from EUR05-DB8-obe.outbound.protection.outlook.com\n (mail-db8eur05on2089.outbound.protection.outlook.com [40.107.20.89])\n by dpdk.org (Postfix) with ESMTP id D64221BEDD\n for <dev@dpdk.org>; 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dkim=none (message not signed)\n header.d=none;dpdk.org; dmarc=none action=none header.from=mellanox.com;", "From": "Ophir Munk <ophirmu@mellanox.com>", "To": "dev@dpdk.org, Matan Azrad <matan@mellanox.com>,\n Raslan Darawsheh <rasland@mellanox.com>", "Cc": "Ophir Munk <ophirmu@mellanox.com>", "Date": "Tue, 16 Jun 2020 09:44:43 +0000", "Message-Id": "<20200616094446.7152-2-ophirmu@mellanox.com>", "X-Mailer": [ "git-send-email 2.8.4", "git-send-email 2.8.4" ], "In-Reply-To": "<20200616094446.7152-1-ophirmu@mellanox.com>", "References": "<20200616094446.7152-1-ophirmu@mellanox.com>", "Content-Type": "text/plain", "X-ClientProxiedBy": "ZRAP278CA0006.CHEP278.PROD.OUTLOOK.COM\n (2603:10a6:910:10::16) To AM0PR05MB4209.eurprd05.prod.outlook.com\n (2603:10a6:208:61::22)", "MIME-Version": "1.0", "X-MS-Exchange-MessageSentRepresentingType": "1", "X-Originating-IP": "[37.142.13.130]", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-HT": "Tenant", "X-MS-Office365-Filtering-Correlation-Id": "e3b48b40-37f5-4292-d075-08d811d9eba5", "X-MS-TrafficTypeDiagnostic": "AM0PR05MB5859:", "X-LD-Processed": "a652971c-7d2e-4d9b-a6a4-d149256f461b,ExtFwd", "X-MS-Exchange-Transport-Forked": "True", "X-Microsoft-Antispam-PRVS": "\n <AM0PR05MB5859E03DBDB143B1EE1B0D47D19D0@AM0PR05MB5859.eurprd05.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:46;", "X-Forefront-PRVS": "04362AC73B", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 2DKn3/dF96NfOurWs07e5AsEBSzAmlrZwTK90ShUKYqZ5b1jnpDW5A5FyXJde5y++T2BMtJJxojxAB4wf9J+M96a6f2Jje29UdWi0Ei6mjfWMpXbc+6icpic5X1/pA9juM+Que7NoKXjEv5xZDrfNsYRoxAZKANCbLLU42LpXMM1eS/cMBOjPsu0yKP6ZEoHame+hfmM582rGqByhbyexA2XTiKtopCsTFaO5iAr92xAeBiMby38aObKGEU+pZOxr9oAAM6PBxkka6avt0LVbPTZXgkdniU00zIYoBWAm7elrloJ+tZps6E/5nxYHfUd4lAsgWocrLb9P0sYzllr9w==", "X-Forefront-Antispam-Report": "CIP:255.255.255.255; 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The new struct contains the required MR field: lkey,\naddr, len and is independent of ibv.\n\nSigned-off-by: Ophir Munk <ophirmu@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/common/mlx5/mlx5_common_mr.c | 60 ++++++++++++++++++++----------------\n drivers/common/mlx5/mlx5_common_mr.h | 11 +++++--\n 2 files changed, 43 insertions(+), 28 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c\nindex e894523..c68be54 100644\n--- a/drivers/common/mlx5/mlx5_common_mr.c\n+++ b/drivers/common/mlx5/mlx5_common_mr.c\n@@ -266,18 +266,16 @@ mr_find_next_chunk(struct mlx5_mr *mr, struct mr_cache_entry *entry,\n \n \t/* MR for external memory doesn't have memseg list. */\n \tif (mr->msl == NULL) {\n-\t\tstruct ibv_mr *ibv_mr = mr->ibv_mr;\n-\n \t\tMLX5_ASSERT(mr->ms_bmp_n == 1);\n \t\tMLX5_ASSERT(mr->ms_n == 1);\n \t\tMLX5_ASSERT(base_idx == 0);\n \t\t/*\n \t\t * Can't search it from memseg list but get it directly from\n-\t\t * verbs MR as there's only one chunk.\n+\t\t * pmd_mr as there's only one chunk.\n \t\t */\n-\t\tentry->start = (uintptr_t)ibv_mr->addr;\n-\t\tentry->end = (uintptr_t)ibv_mr->addr + mr->ibv_mr->length;\n-\t\tentry->lkey = rte_cpu_to_be_32(mr->ibv_mr->lkey);\n+\t\tentry->start = (uintptr_t)mr->pmd_mr.addr;\n+\t\tentry->end = (uintptr_t)mr->pmd_mr.addr + mr->pmd_mr.len;\n+\t\tentry->lkey = rte_cpu_to_be_32(mr->pmd_mr.lkey);\n \t\t/* Returning 1 ends iteration. */\n \t\treturn 1;\n \t}\n@@ -302,7 +300,7 @@ mr_find_next_chunk(struct mlx5_mr *mr, struct mr_cache_entry *entry,\n \t\t/* Found one chunk. */\n \t\tentry->start = start;\n \t\tentry->end = end;\n-\t\tentry->lkey = rte_cpu_to_be_32(mr->ibv_mr->lkey);\n+\t\tentry->lkey = rte_cpu_to_be_32(mr->pmd_mr.lkey);\n \t}\n \treturn idx;\n }\n@@ -442,8 +440,8 @@ mr_free(struct mlx5_mr *mr)\n \tif (mr == NULL)\n \t\treturn;\n \tDRV_LOG(DEBUG, \"freeing MR(%p):\", (void *)mr);\n-\tif (mr->ibv_mr != NULL)\n-\t\tclaim_zero(mlx5_glue->dereg_mr(mr->ibv_mr));\n+\tif (mr->pmd_mr.obj != NULL)\n+\t\tclaim_zero(mlx5_glue->dereg_mr(mr->pmd_mr.obj));\n \tif (mr->ms_bmp != NULL)\n \t\trte_bitmap_free(mr->ms_bmp);\n \trte_free(mr);\n@@ -600,6 +598,7 @@ mlx5_mr_create_primary(void *pd,\n \tuint32_t ms_n;\n \tuint32_t n;\n \tsize_t len;\n+\tstruct ibv_mr *ibv_mr;\n \n \tDRV_LOG(DEBUG, \"Creating a MR using address (%p)\", (void *)addr);\n \t/*\n@@ -768,24 +767,28 @@ mlx5_mr_create_primary(void *pd,\n \t * mlx5_alloc_buf_extern() which eventually calls rte_malloc_socket()\n \t * through mlx5_alloc_verbs_buf().\n \t */\n-\tmr->ibv_mr = mlx5_glue->reg_mr(pd, (void *)data.start, len,\n-\t\t\t\t IBV_ACCESS_LOCAL_WRITE |\n-\t\t\t\t (haswell_broadwell_cpu ? 0 :\n-\t\t\t\t IBV_ACCESS_RELAXED_ORDERING));\n-\tif (mr->ibv_mr == NULL) {\n-\t\tDEBUG(\"Fail to create a verbs MR for address (%p)\",\n+\tibv_mr = mlx5_glue->reg_mr(pd, (void *)data.start, len,\n+\t\t\t\t IBV_ACCESS_LOCAL_WRITE |\n+\t\t\t\t (haswell_broadwell_cpu ? 0 :\n+\t\t\t\t IBV_ACCESS_RELAXED_ORDERING));\n+\tif (ibv_mr == NULL) {\n+\t\tDEBUG(\"Fail to create an MR for address (%p)\",\n \t\t (void *)addr);\n \t\trte_errno = EINVAL;\n \t\tgoto err_mrlock;\n \t}\n-\tMLX5_ASSERT((uintptr_t)mr->ibv_mr->addr == data.start);\n-\tMLX5_ASSERT(mr->ibv_mr->length == len);\n+\tmr->pmd_mr.lkey = ibv_mr->lkey;\n+\tmr->pmd_mr.addr = ibv_mr->addr;\n+\tmr->pmd_mr.len = ibv_mr->length;\n+\tmr->pmd_mr.obj = ibv_mr;\n+\tMLX5_ASSERT((uintptr_t)mr->pmd_mr.addr == data.start);\n+\tMLX5_ASSERT(mr->pmd_mr.len);\n \tLIST_INSERT_HEAD(&share_cache->mr_list, mr, mr);\n \tDEBUG(\"MR CREATED (%p) for %p:\\n\"\n \t \" [0x%\" PRIxPTR \", 0x%\" PRIxPTR \"),\"\n \t \" lkey=0x%x base_idx=%u ms_n=%u, ms_bmp_n=%u\",\n \t (void *)mr, (void *)addr, data.start, data.end,\n-\t rte_cpu_to_be_32(mr->ibv_mr->lkey),\n+\t rte_cpu_to_be_32(mr->pmd_mr.lkey),\n \t mr->ms_base_idx, mr->ms_n, mr->ms_bmp_n);\n \t/* Insert to the global cache table. */\n \tmlx5_mr_insert_cache(share_cache, mr);\n@@ -1036,6 +1039,7 @@ mlx5_mr_flush_local_cache(struct mlx5_mr_ctrl *mr_ctrl)\n struct mlx5_mr *\n mlx5_create_mr_ext(void *pd, uintptr_t addr, size_t len, int socket_id)\n {\n+\tstruct ibv_mr *ibv_mr;\n \tstruct mlx5_mr *mr = NULL;\n \n \tmr = rte_zmalloc_socket(NULL,\n@@ -1044,17 +1048,21 @@ mlx5_create_mr_ext(void *pd, uintptr_t addr, size_t len, int socket_id)\n \t\t\t\tRTE_CACHE_LINE_SIZE, socket_id);\n \tif (mr == NULL)\n \t\treturn NULL;\n-\tmr->ibv_mr = mlx5_glue->reg_mr(pd, (void *)addr, len,\n-\t\t\t\t IBV_ACCESS_LOCAL_WRITE |\n-\t\t\t\t (haswell_broadwell_cpu ? 0 :\n-\t\t\t\t IBV_ACCESS_RELAXED_ORDERING));\n-\tif (mr->ibv_mr == NULL) {\n+\tibv_mr = mlx5_glue->reg_mr(pd, (void *)addr, len,\n+\t\t\t\t IBV_ACCESS_LOCAL_WRITE |\n+\t\t\t\t (haswell_broadwell_cpu ? 0 :\n+\t\t\t\t IBV_ACCESS_RELAXED_ORDERING));\n+\tif (ibv_mr == NULL) {\n \t\tDRV_LOG(WARNING,\n-\t\t\t\"Fail to create a verbs MR for address (%p)\",\n+\t\t\t\"Fail to create MR for address (%p)\",\n \t\t\t(void *)addr);\n \t\trte_free(mr);\n \t\treturn NULL;\n \t}\n+\tmr->pmd_mr.lkey = ibv_mr->lkey;\n+\tmr->pmd_mr.addr = ibv_mr->addr;\n+\tmr->pmd_mr.len = ibv_mr->length;\n+\tmr->pmd_mr.obj = ibv_mr;\n \tmr->msl = NULL; /* Mark it is external memory. */\n \tmr->ms_bmp = NULL;\n \tmr->ms_n = 1;\n@@ -1064,7 +1072,7 @@ mlx5_create_mr_ext(void *pd, uintptr_t addr, size_t len, int socket_id)\n \t\t\" [0x%\" PRIxPTR \", 0x%\" PRIxPTR \"),\"\n \t\t\" lkey=0x%x base_idx=%u ms_n=%u, ms_bmp_n=%u\",\n \t\t(void *)mr, (void *)addr,\n-\t\taddr, addr + len, rte_cpu_to_be_32(mr->ibv_mr->lkey),\n+\t\taddr, addr + len, rte_cpu_to_be_32(mr->pmd_mr.lkey),\n \t\tmr->ms_base_idx, mr->ms_n, mr->ms_bmp_n);\n \treturn mr;\n }\n@@ -1089,7 +1097,7 @@ mlx5_mr_dump_cache(struct mlx5_mr_share_cache *share_cache __rte_unused)\n \t\tunsigned int n;\n \n \t\tDEBUG(\"MR[%u], LKey = 0x%x, ms_n = %u, ms_bmp_n = %u\",\n-\t\t mr_n++, rte_cpu_to_be_32(mr->ibv_mr->lkey),\n+\t\t mr_n++, rte_cpu_to_be_32(mr->pmd_mr.lkey),\n \t\t mr->ms_n, mr->ms_bmp_n);\n \t\tif (mr->ms_n == 0)\n \t\t\tcontinue;\ndiff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h\nindex 7add4da..6f2dcec 100644\n--- a/drivers/common/mlx5/mlx5_common_mr.h\n+++ b/drivers/common/mlx5/mlx5_common_mr.h\n@@ -31,10 +31,17 @@\n #define MLX5_MR_CACHE_N 8\n #define MLX5_MR_BTREE_CACHE_N 256\n \n+/* mlx5 PMD MR struct. */\n+struct mlx5_pmd_mr {\n+\tuint32_t\t lkey;\n+\tvoid\t\t *addr;\n+\tsize_t\t\t len;\n+\tvoid\t\t *obj; /* verbs mr object or devx umem object. */\n+};\n /* Memory Region object. */\n struct mlx5_mr {\n \tLIST_ENTRY(mlx5_mr) mr; /**< Pointer to the prev/next entry. */\n-\tstruct ibv_mr *ibv_mr; /* Verbs Memory Region. */\n+\tstruct mlx5_pmd_mr pmd_mr; /* PMD memory region. */\n \tconst struct rte_memseg_list *msl;\n \tint ms_base_idx; /* Start index of msl->memseg_arr[]. */\n \tint ms_n; /* Number of memsegs in use. */\n@@ -46,7 +53,7 @@ struct mlx5_mr {\n struct mr_cache_entry {\n \tuintptr_t start; /* Start address of MR. */\n \tuintptr_t end; /* End address of MR. */\n-\tuint32_t lkey; /* rte_cpu_to_be_32(ibv_mr->lkey). */\n+\tuint32_t lkey; /* rte_cpu_to_be_32(lkey). */\n } __rte_packed;\n \n /* MR Cache table for Binary search. */\n", "prefixes": [ "v1", "1/4" ] }