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{
    "id": 71405,
    "url": "http://patches.dpdk.org/api/patches/71405/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200612132934.16488-14-somnath.kotur@broadcom.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200612132934.16488-14-somnath.kotur@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200612132934.16488-14-somnath.kotur@broadcom.com",
    "date": "2020-06-12T13:28:57",
    "name": "[13/50] net/bnxt: update multi device design support",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "91263a510bf63ff79044f8faa2ee5bee27d858be",
    "submitter": {
        "id": 908,
        "url": "http://patches.dpdk.org/api/people/908/?format=api",
        "name": "Somnath Kotur",
        "email": "somnath.kotur@broadcom.com"
    },
    "delegate": {
        "id": 1766,
        "url": "http://patches.dpdk.org/api/users/1766/?format=api",
        "username": "ajitkhaparde",
        "first_name": "Ajit",
        "last_name": "Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200612132934.16488-14-somnath.kotur@broadcom.com/mbox/",
    "series": [
        {
            "id": 10436,
            "url": "http://patches.dpdk.org/api/series/10436/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10436",
            "date": "2020-06-12T13:28:44",
            "name": "add features for host-based flow management",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/10436/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/71405/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/71405/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CA3FCA00BE;\n\tFri, 12 Jun 2020 15:40:40 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9B6811BFC3;\n\tFri, 12 Jun 2020 15:34:25 +0200 (CEST)",
            "from relay.smtp.broadcom.com (relay.smtp.broadcom.com\n [192.19.232.149]) by dpdk.org (Postfix) with ESMTP id 8B4B31BFA0\n for <dev@dpdk.org>; Fri, 12 Jun 2020 15:34:22 +0200 (CEST)",
            "from dhcp-10-123-153-55.dhcp.broadcom.net\n (dhcp-10-123-153-55.dhcp.broadcom.net [10.123.153.55])\n by relay.smtp.broadcom.com (Postfix) with ESMTP id 4C00D1BD7A4;\n Fri, 12 Jun 2020 06:34:21 -0700 (PDT)"
        ],
        "DKIM-Filter": "OpenDKIM Filter v2.10.3 relay.smtp.broadcom.com 4C00D1BD7A4",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n s=dkimrelay; t=1591968862;\n bh=vHv7eYjZ4RG3SPtRCB49cxGjfc746AGVXnT0LP1WwFw=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=F2mbRMiJ3LzQL5y1Y042gGSyjnCaNEbo0ql/zx/XXzHn8U/4BUUmnPvngW/EaBN4K\n /RewCYfqlXMLXbjklyGOu3WOl0RWafkP0v65cp0fHmxFs2cW69UnhmZv0qj+I9Pr2K\n W1Q2rxpsgmde9OUX61+QDPdp/fCXf2lgROTlYBqM=",
        "From": "Somnath Kotur <somnath.kotur@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "ferruh.yigit@intel.com",
        "Date": "Fri, 12 Jun 2020 18:58:57 +0530",
        "Message-Id": "<20200612132934.16488-14-somnath.kotur@broadcom.com>",
        "X-Mailer": "git-send-email 2.10.1.613.g2cc2e70",
        "In-Reply-To": "<20200612132934.16488-1-somnath.kotur@broadcom.com>",
        "References": "<20200612132934.16488-1-somnath.kotur@broadcom.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=UTF-8",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH 13/50] net/bnxt: update multi device design\n\tsupport",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Michael Wildt <michael.wildt@broadcom.com>\n\n- Implement the modules RM, Device (WH+), Identifier.\n- Update Session module.\n- Implement new HWRMs for RM direct messaging.\n- Add new parameter check macro's and clean up the header includes for\n  i.e. tfp such that bnxt.h is not directly included in the new modules.\n- Add cfa_resource_types, required for RM design.\n\nSigned-off-by: Michael Wildt <michael.wildt@broadcom.com>\nReviewed-by: Randy Schacher <stuart.schacher@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\n---\n drivers/net/bnxt/meson.build                  |   2 +\n drivers/net/bnxt/tf_core/Makefile             |   1 +\n drivers/net/bnxt/tf_core/cfa_resource_types.h | 291 ++++++++---------\n drivers/net/bnxt/tf_core/tf_common.h          |  24 ++\n drivers/net/bnxt/tf_core/tf_core.c            | 286 ++++++++++++++++-\n drivers/net/bnxt/tf_core/tf_core.h            |  12 +-\n drivers/net/bnxt/tf_core/tf_device.c          | 150 ++++++++-\n drivers/net/bnxt/tf_core/tf_device.h          |  79 ++++-\n drivers/net/bnxt/tf_core/tf_device_p4.c       |  78 ++++-\n drivers/net/bnxt/tf_core/tf_device_p4.h       |  79 +++--\n drivers/net/bnxt/tf_core/tf_identifier.c      | 142 ++++++++-\n drivers/net/bnxt/tf_core/tf_identifier.h      |  25 +-\n drivers/net/bnxt/tf_core/tf_msg.c             | 268 ++++++++++++++--\n drivers/net/bnxt/tf_core/tf_msg.h             |  59 ++++\n drivers/net/bnxt/tf_core/tf_rm_new.c          | 434 ++++++++++++++++++++++++--\n drivers/net/bnxt/tf_core/tf_rm_new.h          |  72 +++--\n drivers/net/bnxt/tf_core/tf_session.c         | 280 ++++++++++++++++-\n drivers/net/bnxt/tf_core/tf_session.h         | 118 ++++++-\n drivers/net/bnxt/tf_core/tf_tbl.h             |   4 +\n drivers/net/bnxt/tf_core/tf_tbl_type.c        |  30 +-\n drivers/net/bnxt/tf_core/tf_tbl_type.h        |  95 +++---\n drivers/net/bnxt/tf_core/tf_tcam.h            |  14 +-\n 22 files changed, 2144 insertions(+), 399 deletions(-)",
    "diff": "diff --git a/drivers/net/bnxt/meson.build b/drivers/net/bnxt/meson.build\nindex a50cb26..1f7df9d 100644\n--- a/drivers/net/bnxt/meson.build\n+++ b/drivers/net/bnxt/meson.build\n@@ -32,6 +32,8 @@ sources = files('bnxt_cpr.c',\n \t'tf_core/tf_rm.c',\n \t'tf_core/tf_tbl.c',\n \t'tf_core/tfp.c',\n+\t'tf_core/tf_session.c',\n+\t'tf_core/tf_device.c',\n \t'tf_core/tf_device_p4.c',\n \t'tf_core/tf_identifier.c',\n \t'tf_core/tf_shadow_tbl.c',\ndiff --git a/drivers/net/bnxt/tf_core/Makefile b/drivers/net/bnxt/tf_core/Makefile\nindex 71df75b..7191c7f 100644\n--- a/drivers/net/bnxt/tf_core/Makefile\n+++ b/drivers/net/bnxt/tf_core/Makefile\n@@ -14,6 +14,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tfp.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_msg.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_em.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_tbl.c\n+SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_session.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_device.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_device_p4.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_identifier.c\ndiff --git a/drivers/net/bnxt/tf_core/cfa_resource_types.h b/drivers/net/bnxt/tf_core/cfa_resource_types.h\nindex c0c1e75..11e8892 100644\n--- a/drivers/net/bnxt/tf_core/cfa_resource_types.h\n+++ b/drivers/net/bnxt/tf_core/cfa_resource_types.h\n@@ -12,6 +12,11 @@\n \n #ifndef _CFA_RESOURCE_TYPES_H_\n #define _CFA_RESOURCE_TYPES_H_\n+/*\n+ * This is the constant used to define invalid CFA\n+ * resource types across all devices.\n+ */\n+#define CFA_RESOURCE_TYPE_INVALID 65535\n \n /* L2 Context TCAM */\n #define CFA_RESOURCE_TYPE_P59_L2_CTXT_TCAM    0x0UL\n@@ -58,209 +63,205 @@\n #define CFA_RESOURCE_TYPE_P59_LAST           CFA_RESOURCE_TYPE_P59_VEB_TCAM\n \n \n-/* SRAM Multicast Group */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_MCG             0x0UL\n-/* SRAM Encap 8 byte record */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_ENCAP_8B        0x1UL\n-/* SRAM Encap 16 byte record */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_ENCAP_16B       0x2UL\n-/* SRAM Encap 64 byte record */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_ENCAP_64B       0x3UL\n-/* SRAM Source Property MAC */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_SP_MAC          0x4UL\n-/* SRAM Source Property MAC and IPv4 */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_SP_MAC_IPV4     0x5UL\n-/* SRAM Source Property MAC and IPv6 */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_SP_MAC_IPV6     0x6UL\n-/* SRAM Network Address Translation Source Port */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_NAT_SPORT       0x7UL\n-/* SRAM Network Address Translation Destination Port */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_NAT_DPORT       0x8UL\n-/* SRAM Network Address Translation Source IPv4 address */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_NAT_S_IPV4      0x9UL\n-/* SRAM Network Address Translation Destination IPv4 address */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_NAT_D_IPV4      0xaUL\n-/* SRAM Network Address Translation Source IPv4 address */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_NAT_S_IPV6      0xbUL\n-/* SRAM Network Address Translation Destination IPv4 address */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_NAT_D_IPV6      0xcUL\n+/* Multicast Group */\n+#define CFA_RESOURCE_TYPE_P58_MCG             0x0UL\n+/* Encap 8 byte record */\n+#define CFA_RESOURCE_TYPE_P58_ENCAP_8B        0x1UL\n+/* Encap 16 byte record */\n+#define CFA_RESOURCE_TYPE_P58_ENCAP_16B       0x2UL\n+/* Encap 64 byte record */\n+#define CFA_RESOURCE_TYPE_P58_ENCAP_64B       0x3UL\n+/* Source Property MAC */\n+#define CFA_RESOURCE_TYPE_P58_SP_MAC          0x4UL\n+/* Source Property MAC and IPv4 */\n+#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV4     0x5UL\n+/* Source Property MAC and IPv6 */\n+#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV6     0x6UL\n+/* Network Address Translation Source Port */\n+#define CFA_RESOURCE_TYPE_P58_NAT_SPORT       0x7UL\n+/* Network Address Translation Destination Port */\n+#define CFA_RESOURCE_TYPE_P58_NAT_DPORT       0x8UL\n+/* Network Address Translation Source IPv4 address */\n+#define CFA_RESOURCE_TYPE_P58_NAT_S_IPV4      0x9UL\n+/* Network Address Translation Destination IPv4 address */\n+#define CFA_RESOURCE_TYPE_P58_NAT_D_IPV4      0xaUL\n+/* Network Address Translation Source IPv4 address */\n+#define CFA_RESOURCE_TYPE_P58_NAT_S_IPV6      0xbUL\n+/* Network Address Translation Destination IPv4 address */\n+#define CFA_RESOURCE_TYPE_P58_NAT_D_IPV6      0xcUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_METER           0xdUL\n+#define CFA_RESOURCE_TYPE_P58_METER           0xdUL\n /* Flow State */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_FLOW_STATE      0xeUL\n+#define CFA_RESOURCE_TYPE_P58_FLOW_STATE      0xeUL\n /* Full Action Records */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_FULL_ACTION     0xfUL\n+#define CFA_RESOURCE_TYPE_P58_FULL_ACTION     0xfUL\n /* Action Record Format 0 */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_FORMAT_0_ACTION 0x10UL\n+#define CFA_RESOURCE_TYPE_P58_FORMAT_0_ACTION 0x10UL\n /* Action Record Format 2 */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_FORMAT_2_ACTION 0x11UL\n+#define CFA_RESOURCE_TYPE_P58_FORMAT_2_ACTION 0x11UL\n /* Action Record Format 3 */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_FORMAT_3_ACTION 0x12UL\n+#define CFA_RESOURCE_TYPE_P58_FORMAT_3_ACTION 0x12UL\n /* Action Record Format 4 */\n-#define CFA_RESOURCE_TYPE_P58_SRAM_FORMAT_4_ACTION 0x13UL\n+#define CFA_RESOURCE_TYPE_P58_FORMAT_4_ACTION 0x13UL\n /* L2 Context TCAM */\n-#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM         0x14UL\n+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM    0x14UL\n /* Profile Func */\n-#define CFA_RESOURCE_TYPE_P58_PROF_FUNC            0x15UL\n+#define CFA_RESOURCE_TYPE_P58_PROF_FUNC       0x15UL\n /* Profile TCAM */\n-#define CFA_RESOURCE_TYPE_P58_PROF_TCAM            0x16UL\n+#define CFA_RESOURCE_TYPE_P58_PROF_TCAM       0x16UL\n /* Exact Match Profile Id */\n-#define CFA_RESOURCE_TYPE_P58_EM_PROF_ID           0x17UL\n+#define CFA_RESOURCE_TYPE_P58_EM_PROF_ID      0x17UL\n /* Wildcard Profile Id */\n-#define CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID      0x18UL\n+#define CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID 0x18UL\n+/* Exact Match Record */\n+#define CFA_RESOURCE_TYPE_P58_EM_REC          0x19UL\n /* Wildcard TCAM */\n-#define CFA_RESOURCE_TYPE_P58_WC_TCAM              0x19UL\n+#define CFA_RESOURCE_TYPE_P58_WC_TCAM         0x1aUL\n /* Meter profile */\n-#define CFA_RESOURCE_TYPE_P58_METER_PROF           0x1aUL\n+#define CFA_RESOURCE_TYPE_P58_METER_PROF      0x1bUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P58_METER                0x1bUL\n-/* Meter */\n-#define CFA_RESOURCE_TYPE_P58_MIRROR               0x1cUL\n+#define CFA_RESOURCE_TYPE_P58_MIRROR          0x1cUL\n /* Source Property TCAM */\n-#define CFA_RESOURCE_TYPE_P58_SP_TCAM              0x1dUL\n+#define CFA_RESOURCE_TYPE_P58_SP_TCAM         0x1dUL\n /* Exact Match Flexible Key Builder */\n-#define CFA_RESOURCE_TYPE_P58_EM_FKB               0x1eUL\n+#define CFA_RESOURCE_TYPE_P58_EM_FKB          0x1eUL\n /* Wildcard Flexible Key Builder */\n-#define CFA_RESOURCE_TYPE_P58_WC_FKB               0x1fUL\n+#define CFA_RESOURCE_TYPE_P58_WC_FKB          0x1fUL\n /* VEB TCAM */\n-#define CFA_RESOURCE_TYPE_P58_VEB_TCAM             0x20UL\n-#define CFA_RESOURCE_TYPE_P58_LAST                CFA_RESOURCE_TYPE_P58_VEB_TCAM\n+#define CFA_RESOURCE_TYPE_P58_VEB_TCAM        0x20UL\n+#define CFA_RESOURCE_TYPE_P58_LAST           CFA_RESOURCE_TYPE_P58_VEB_TCAM\n \n \n-/* SRAM Multicast Group */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_MCG             0x0UL\n-/* SRAM Encap 8 byte record */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_ENCAP_8B        0x1UL\n-/* SRAM Encap 16 byte record */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_ENCAP_16B       0x2UL\n-/* SRAM Encap 64 byte record */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_ENCAP_64B       0x3UL\n-/* SRAM Source Property MAC */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_SP_MAC          0x4UL\n-/* SRAM Source Property MAC and IPv4 */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_SP_MAC_IPV4     0x5UL\n-/* SRAM Source Property MAC and IPv6 */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_SP_MAC_IPV6     0x6UL\n-/* SRAM 64B Counters */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_COUNTER_64B     0x7UL\n-/* SRAM Network Address Translation Source Port */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_NAT_SPORT       0x8UL\n-/* SRAM Network Address Translation Destination Port */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_NAT_DPORT       0x9UL\n-/* SRAM Network Address Translation Source IPv4 address */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_NAT_S_IPV4      0xaUL\n-/* SRAM Network Address Translation Destination IPv4 address */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_NAT_D_IPV4      0xbUL\n-/* SRAM Network Address Translation Source IPv6 address */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_NAT_S_IPV6      0xcUL\n-/* SRAM Network Address Translation Destination IPv6 address */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_NAT_D_IPV6      0xdUL\n+/* Multicast Group */\n+#define CFA_RESOURCE_TYPE_P45_MCG             0x0UL\n+/* Encap 8 byte record */\n+#define CFA_RESOURCE_TYPE_P45_ENCAP_8B        0x1UL\n+/* Encap 16 byte record */\n+#define CFA_RESOURCE_TYPE_P45_ENCAP_16B       0x2UL\n+/* Encap 64 byte record */\n+#define CFA_RESOURCE_TYPE_P45_ENCAP_64B       0x3UL\n+/* Source Property MAC */\n+#define CFA_RESOURCE_TYPE_P45_SP_MAC          0x4UL\n+/* Source Property MAC and IPv4 */\n+#define CFA_RESOURCE_TYPE_P45_SP_MAC_IPV4     0x5UL\n+/* Source Property MAC and IPv6 */\n+#define CFA_RESOURCE_TYPE_P45_SP_MAC_IPV6     0x6UL\n+/* 64B Counters */\n+#define CFA_RESOURCE_TYPE_P45_COUNTER_64B     0x7UL\n+/* Network Address Translation Source Port */\n+#define CFA_RESOURCE_TYPE_P45_NAT_SPORT       0x8UL\n+/* Network Address Translation Destination Port */\n+#define CFA_RESOURCE_TYPE_P45_NAT_DPORT       0x9UL\n+/* Network Address Translation Source IPv4 address */\n+#define CFA_RESOURCE_TYPE_P45_NAT_S_IPV4      0xaUL\n+/* Network Address Translation Destination IPv4 address */\n+#define CFA_RESOURCE_TYPE_P45_NAT_D_IPV4      0xbUL\n+/* Network Address Translation Source IPv6 address */\n+#define CFA_RESOURCE_TYPE_P45_NAT_S_IPV6      0xcUL\n+/* Network Address Translation Destination IPv6 address */\n+#define CFA_RESOURCE_TYPE_P45_NAT_D_IPV6      0xdUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_METER           0xeUL\n+#define CFA_RESOURCE_TYPE_P45_METER           0xeUL\n /* Flow State */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_FLOW_STATE      0xfUL\n+#define CFA_RESOURCE_TYPE_P45_FLOW_STATE      0xfUL\n /* Full Action Records */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_FULL_ACTION     0x10UL\n+#define CFA_RESOURCE_TYPE_P45_FULL_ACTION     0x10UL\n /* Action Record Format 0 */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_FORMAT_0_ACTION 0x11UL\n+#define CFA_RESOURCE_TYPE_P45_FORMAT_0_ACTION 0x11UL\n /* Action Record Format 2 */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_FORMAT_2_ACTION 0x12UL\n+#define CFA_RESOURCE_TYPE_P45_FORMAT_2_ACTION 0x12UL\n /* Action Record Format 3 */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_FORMAT_3_ACTION 0x13UL\n+#define CFA_RESOURCE_TYPE_P45_FORMAT_3_ACTION 0x13UL\n /* Action Record Format 4 */\n-#define CFA_RESOURCE_TYPE_P45_SRAM_FORMAT_4_ACTION 0x14UL\n+#define CFA_RESOURCE_TYPE_P45_FORMAT_4_ACTION 0x14UL\n /* L2 Context TCAM */\n-#define CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM         0x15UL\n+#define CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM    0x15UL\n /* Profile Func */\n-#define CFA_RESOURCE_TYPE_P45_PROF_FUNC            0x16UL\n+#define CFA_RESOURCE_TYPE_P45_PROF_FUNC       0x16UL\n /* Profile TCAM */\n-#define CFA_RESOURCE_TYPE_P45_PROF_TCAM            0x17UL\n+#define CFA_RESOURCE_TYPE_P45_PROF_TCAM       0x17UL\n /* Exact Match Profile Id */\n-#define CFA_RESOURCE_TYPE_P45_EM_PROF_ID           0x18UL\n+#define CFA_RESOURCE_TYPE_P45_EM_PROF_ID      0x18UL\n /* Exact Match Record */\n-#define CFA_RESOURCE_TYPE_P45_EM_REC               0x19UL\n+#define CFA_RESOURCE_TYPE_P45_EM_REC          0x19UL\n /* Wildcard Profile Id */\n-#define CFA_RESOURCE_TYPE_P45_WC_TCAM_PROF_ID      0x1aUL\n+#define CFA_RESOURCE_TYPE_P45_WC_TCAM_PROF_ID 0x1aUL\n /* Wildcard TCAM */\n-#define CFA_RESOURCE_TYPE_P45_WC_TCAM              0x1bUL\n+#define CFA_RESOURCE_TYPE_P45_WC_TCAM         0x1bUL\n /* Meter profile */\n-#define CFA_RESOURCE_TYPE_P45_METER_PROF           0x1cUL\n-/* Meter */\n-#define CFA_RESOURCE_TYPE_P45_METER                0x1dUL\n+#define CFA_RESOURCE_TYPE_P45_METER_PROF      0x1cUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P45_MIRROR               0x1eUL\n+#define CFA_RESOURCE_TYPE_P45_MIRROR          0x1dUL\n /* Source Property TCAM */\n-#define CFA_RESOURCE_TYPE_P45_SP_TCAM              0x1fUL\n+#define CFA_RESOURCE_TYPE_P45_SP_TCAM         0x1eUL\n /* VEB TCAM */\n-#define CFA_RESOURCE_TYPE_P45_VEB_TCAM             0x20UL\n-#define CFA_RESOURCE_TYPE_P45_LAST                CFA_RESOURCE_TYPE_P45_VEB_TCAM\n+#define CFA_RESOURCE_TYPE_P45_VEB_TCAM        0x1fUL\n+#define CFA_RESOURCE_TYPE_P45_LAST           CFA_RESOURCE_TYPE_P45_VEB_TCAM\n \n \n-/* SRAM Multicast Group */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_MCG             0x0UL\n-/* SRAM Encap 8 byte record */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_ENCAP_8B        0x1UL\n-/* SRAM Encap 16 byte record */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_ENCAP_16B       0x2UL\n-/* SRAM Encap 64 byte record */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_ENCAP_64B       0x3UL\n-/* SRAM Source Property MAC */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_SP_MAC          0x4UL\n-/* SRAM Source Property MAC and IPv4 */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_SP_MAC_IPV4     0x5UL\n-/* SRAM Source Property MAC and IPv6 */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_SP_MAC_IPV6     0x6UL\n-/* SRAM 64B Counters */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_COUNTER_64B     0x7UL\n-/* SRAM Network Address Translation Source Port */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_NAT_SPORT       0x8UL\n-/* SRAM Network Address Translation Destination Port */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_NAT_DPORT       0x9UL\n-/* SRAM Network Address Translation Source IPv4 address */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_NAT_S_IPV4      0xaUL\n-/* SRAM Network Address Translation Destination IPv4 address */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_NAT_D_IPV4      0xbUL\n-/* SRAM Network Address Translation Source IPv6 address */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_NAT_S_IPV6      0xcUL\n-/* SRAM Network Address Translation Destination IPv6 address */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_NAT_D_IPV6      0xdUL\n+/* Multicast Group */\n+#define CFA_RESOURCE_TYPE_P4_MCG             0x0UL\n+/* Encap 8 byte record */\n+#define CFA_RESOURCE_TYPE_P4_ENCAP_8B        0x1UL\n+/* Encap 16 byte record */\n+#define CFA_RESOURCE_TYPE_P4_ENCAP_16B       0x2UL\n+/* Encap 64 byte record */\n+#define CFA_RESOURCE_TYPE_P4_ENCAP_64B       0x3UL\n+/* Source Property MAC */\n+#define CFA_RESOURCE_TYPE_P4_SP_MAC          0x4UL\n+/* Source Property MAC and IPv4 */\n+#define CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4     0x5UL\n+/* Source Property MAC and IPv6 */\n+#define CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6     0x6UL\n+/* 64B Counters */\n+#define CFA_RESOURCE_TYPE_P4_COUNTER_64B     0x7UL\n+/* Network Address Translation Source Port */\n+#define CFA_RESOURCE_TYPE_P4_NAT_SPORT       0x8UL\n+/* Network Address Translation Destination Port */\n+#define CFA_RESOURCE_TYPE_P4_NAT_DPORT       0x9UL\n+/* Network Address Translation Source IPv4 address */\n+#define CFA_RESOURCE_TYPE_P4_NAT_S_IPV4      0xaUL\n+/* Network Address Translation Destination IPv4 address */\n+#define CFA_RESOURCE_TYPE_P4_NAT_D_IPV4      0xbUL\n+/* Network Address Translation Source IPv6 address */\n+#define CFA_RESOURCE_TYPE_P4_NAT_S_IPV6      0xcUL\n+/* Network Address Translation Destination IPv6 address */\n+#define CFA_RESOURCE_TYPE_P4_NAT_D_IPV6      0xdUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_METER           0xeUL\n+#define CFA_RESOURCE_TYPE_P4_METER           0xeUL\n /* Flow State */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_FLOW_STATE      0xfUL\n+#define CFA_RESOURCE_TYPE_P4_FLOW_STATE      0xfUL\n /* Full Action Records */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_FULL_ACTION     0x10UL\n+#define CFA_RESOURCE_TYPE_P4_FULL_ACTION     0x10UL\n /* Action Record Format 0 */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_FORMAT_0_ACTION 0x11UL\n+#define CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION 0x11UL\n /* Action Record Format 2 */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_FORMAT_2_ACTION 0x12UL\n+#define CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION 0x12UL\n /* Action Record Format 3 */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_FORMAT_3_ACTION 0x13UL\n+#define CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION 0x13UL\n /* Action Record Format 4 */\n-#define CFA_RESOURCE_TYPE_P4_SRAM_FORMAT_4_ACTION 0x14UL\n+#define CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION 0x14UL\n /* L2 Context TCAM */\n-#define CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM         0x15UL\n+#define CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM    0x15UL\n /* Profile Func */\n-#define CFA_RESOURCE_TYPE_P4_PROF_FUNC            0x16UL\n+#define CFA_RESOURCE_TYPE_P4_PROF_FUNC       0x16UL\n /* Profile TCAM */\n-#define CFA_RESOURCE_TYPE_P4_PROF_TCAM            0x17UL\n+#define CFA_RESOURCE_TYPE_P4_PROF_TCAM       0x17UL\n /* Exact Match Profile Id */\n-#define CFA_RESOURCE_TYPE_P4_EM_PROF_ID           0x18UL\n+#define CFA_RESOURCE_TYPE_P4_EM_PROF_ID      0x18UL\n /* Exact Match Record */\n-#define CFA_RESOURCE_TYPE_P4_EM_REC               0x19UL\n+#define CFA_RESOURCE_TYPE_P4_EM_REC          0x19UL\n /* Wildcard Profile Id */\n-#define CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID      0x1aUL\n+#define CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID 0x1aUL\n /* Wildcard TCAM */\n-#define CFA_RESOURCE_TYPE_P4_WC_TCAM              0x1bUL\n+#define CFA_RESOURCE_TYPE_P4_WC_TCAM         0x1bUL\n /* Meter profile */\n-#define CFA_RESOURCE_TYPE_P4_METER_PROF           0x1cUL\n-/* Meter */\n-#define CFA_RESOURCE_TYPE_P4_METER                0x1dUL\n+#define CFA_RESOURCE_TYPE_P4_METER_PROF      0x1cUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P4_MIRROR               0x1eUL\n+#define CFA_RESOURCE_TYPE_P4_MIRROR          0x1dUL\n /* Source Property TCAM */\n-#define CFA_RESOURCE_TYPE_P4_SP_TCAM              0x1fUL\n-#define CFA_RESOURCE_TYPE_P4_LAST                CFA_RESOURCE_TYPE_P4_SP_TCAM\n+#define CFA_RESOURCE_TYPE_P4_SP_TCAM         0x1eUL\n+#define CFA_RESOURCE_TYPE_P4_LAST           CFA_RESOURCE_TYPE_P4_SP_TCAM\n \n \n #endif /* _CFA_RESOURCE_TYPES_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_common.h b/drivers/net/bnxt/tf_core/tf_common.h\nindex 2aa4b86..ec3bca8 100644\n--- a/drivers/net/bnxt/tf_core/tf_common.h\n+++ b/drivers/net/bnxt/tf_core/tf_common.h\n@@ -51,4 +51,28 @@\n \t\t} \\\n \t} while (0)\n \n+\n+#define TF_CHECK_PARMS1(parms) do {\t\t\t\t\t\\\n+\t\tif ((parms) == NULL) {\t\t\t\t\t\\\n+\t\t\tTFP_DRV_LOG(ERR, \"Invalid Argument(s)\\n\");\t\\\n+\t\t\treturn -EINVAL;\t\t\t\t\t\\\n+\t\t}\t\t\t\t\t\t\t\\\n+\t} while (0)\n+\n+#define TF_CHECK_PARMS2(parms1, parms2) do {\t\t\t\t\\\n+\t\tif ((parms1) == NULL || (parms2) == NULL) {\t\t\\\n+\t\t\tTFP_DRV_LOG(ERR, \"Invalid Argument(s)\\n\");\t\\\n+\t\t\treturn -EINVAL;\t\t\t\t\t\\\n+\t\t}\t\t\t\t\t\t\t\\\n+\t} while (0)\n+\n+#define TF_CHECK_PARMS3(parms1, parms2, parms3) do {\t\t\t\\\n+\t\tif ((parms1) == NULL ||\t\t\t\t\t\\\n+\t\t    (parms2) == NULL ||\t\t\t\t\t\\\n+\t\t    (parms3) == NULL) {\t\t\t\t\t\\\n+\t\t\tTFP_DRV_LOG(ERR, \"Invalid Argument(s)\\n\");\t\\\n+\t\t\treturn -EINVAL;\t\t\t\t\t\\\n+\t\t}\t\t\t\t\t\t\t\\\n+\t} while (0)\n+\n #endif /* _TF_COMMON_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c\nindex 0098690..28a6bbd 100644\n--- a/drivers/net/bnxt/tf_core/tf_core.c\n+++ b/drivers/net/bnxt/tf_core/tf_core.c\n@@ -85,7 +85,7 @@ tf_create_em_pool(struct tf_session *session,\n \n \t/* Create empty stack\n \t */\n-\trc = stack_init(num_entries, parms.mem_va, pool);\n+\trc = stack_init(num_entries, (uint32_t *)parms.mem_va, pool);\n \n \tif (rc != 0) {\n \t\tTFP_DRV_LOG(ERR, \"EM pool stack init failure %s\\n\",\n@@ -231,7 +231,6 @@ tf_open_session(struct tf                    *tfp,\n \t\t   TF_SESSION_NAME_MAX);\n \n \t/* Initialize Session */\n-\tsession->device_type = parms->device_type;\n \tsession->dev = NULL;\n \ttf_rm_init(tfp);\n \n@@ -276,7 +275,9 @@ tf_open_session(struct tf                    *tfp,\n \n \t/* Initialize EM pool */\n \tfor (dir = 0; dir < TF_DIR_MAX; dir++) {\n-\t\trc = tf_create_em_pool(session, dir, TF_SESSION_EM_POOL_SIZE);\n+\t\trc = tf_create_em_pool(session,\n+\t\t\t\t       (enum tf_dir)dir,\n+\t\t\t\t       TF_SESSION_EM_POOL_SIZE);\n \t\tif (rc) {\n \t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t    \"EM Pool initialization failed\\n\");\n@@ -314,6 +315,64 @@ tf_open_session(struct tf                    *tfp,\n }\n \n int\n+tf_open_session_new(struct tf *tfp,\n+\t\t    struct tf_open_session_parms *parms)\n+{\n+\tint rc;\n+\tunsigned int domain, bus, slot, device;\n+\tstruct tf_session_open_session_parms oparms;\n+\n+\tTF_CHECK_PARMS(tfp, parms);\n+\n+\t/* Filter out any non-supported device types on the Core\n+\t * side. It is assumed that the Firmware will be supported if\n+\t * firmware open session succeeds.\n+\t */\n+\tif (parms->device_type != TF_DEVICE_TYPE_WH) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Unsupported device type %d\\n\",\n+\t\t\t    parms->device_type);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\t/* Verify control channel and build the beginning of session_id */\n+\trc = sscanf(parms->ctrl_chan_name,\n+\t\t    \"%x:%x:%x.%d\",\n+\t\t    &domain,\n+\t\t    &bus,\n+\t\t    &slot,\n+\t\t    &device);\n+\tif (rc != 4) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to scan device ctrl_chan_name\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tparms->session_id.internal.domain = domain;\n+\tparms->session_id.internal.bus = bus;\n+\tparms->session_id.internal.device = device;\n+\toparms.open_cfg = parms;\n+\n+\trc = tf_session_open_session(tfp, &oparms);\n+\t/* Logging handled by tf_session_open_session */\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tTFP_DRV_LOG(INFO,\n+\t\t    \"Session created, session_id:%d\\n\",\n+\t\t    parms->session_id.id);\n+\n+\tTFP_DRV_LOG(INFO,\n+\t\t    \"domain:%d, bus:%d, device:%d, fw_session_id:%d\\n\",\n+\t\t    parms->session_id.internal.domain,\n+\t\t    parms->session_id.internal.bus,\n+\t\t    parms->session_id.internal.device,\n+\t\t    parms->session_id.internal.fw_session_id);\n+\n+\treturn 0;\n+}\n+\n+int\n tf_attach_session(struct tf *tfp __rte_unused,\n \t\t  struct tf_attach_session_parms *parms __rte_unused)\n {\n@@ -342,6 +401,69 @@ tf_attach_session(struct tf *tfp __rte_unused,\n }\n \n int\n+tf_attach_session_new(struct tf *tfp,\n+\t\t      struct tf_attach_session_parms *parms)\n+{\n+\tint rc;\n+\tunsigned int domain, bus, slot, device;\n+\tstruct tf_session_attach_session_parms aparms;\n+\n+\tTF_CHECK_PARMS2(tfp, parms);\n+\n+\t/* Verify control channel */\n+\trc = sscanf(parms->ctrl_chan_name,\n+\t\t    \"%x:%x:%x.%d\",\n+\t\t    &domain,\n+\t\t    &bus,\n+\t\t    &slot,\n+\t\t    &device);\n+\tif (rc != 4) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to scan device ctrl_chan_name\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Verify 'attach' channel */\n+\trc = sscanf(parms->attach_chan_name,\n+\t\t    \"%x:%x:%x.%d\",\n+\t\t    &domain,\n+\t\t    &bus,\n+\t\t    &slot,\n+\t\t    &device);\n+\tif (rc != 4) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to scan device attach_chan_name\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Prepare return value of session_id, using ctrl_chan_name\n+\t * device values as it becomes the session id.\n+\t */\n+\tparms->session_id.internal.domain = domain;\n+\tparms->session_id.internal.bus = bus;\n+\tparms->session_id.internal.device = device;\n+\taparms.attach_cfg = parms;\n+\trc = tf_session_attach_session(tfp,\n+\t\t\t\t       &aparms);\n+\t/* Logging handled by dev_bind */\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tTFP_DRV_LOG(INFO,\n+\t\t    \"Attached to session, session_id:%d\\n\",\n+\t\t    parms->session_id.id);\n+\n+\tTFP_DRV_LOG(INFO,\n+\t\t    \"domain:%d, bus:%d, device:%d, fw_session_id:%d\\n\",\n+\t\t    parms->session_id.internal.domain,\n+\t\t    parms->session_id.internal.bus,\n+\t\t    parms->session_id.internal.device,\n+\t\t    parms->session_id.internal.fw_session_id);\n+\n+\treturn rc;\n+}\n+\n+int\n tf_close_session(struct tf *tfp)\n {\n \tint rc;\n@@ -380,7 +502,7 @@ tf_close_session(struct tf *tfp)\n \tif (tfs->ref_count == 0) {\n \t\t/* Free EM pool */\n \t\tfor (dir = 0; dir < TF_DIR_MAX; dir++)\n-\t\t\ttf_free_em_pool(tfs, dir);\n+\t\t\ttf_free_em_pool(tfs, (enum tf_dir)dir);\n \n \t\ttfp_free(tfp->session->core_data);\n \t\ttfp_free(tfp->session);\n@@ -401,6 +523,39 @@ tf_close_session(struct tf *tfp)\n \treturn rc_close;\n }\n \n+int\n+tf_close_session_new(struct tf *tfp)\n+{\n+\tint rc;\n+\tstruct tf_session_close_session_parms cparms = { 0 };\n+\tunion tf_session_id session_id = { 0 };\n+\tuint8_t ref_count;\n+\n+\tTF_CHECK_PARMS1(tfp);\n+\n+\tcparms.ref_count = &ref_count;\n+\tcparms.session_id = &session_id;\n+\trc = tf_session_close_session(tfp,\n+\t\t\t\t      &cparms);\n+\t/* Logging handled by tf_session_close_session */\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tTFP_DRV_LOG(INFO,\n+\t\t    \"Closed session, session_id:%d, ref_count:%d\\n\",\n+\t\t    cparms.session_id->id,\n+\t\t    *cparms.ref_count);\n+\n+\tTFP_DRV_LOG(INFO,\n+\t\t    \"domain:%d, bus:%d, device:%d, fw_session_id:%d\\n\",\n+\t\t    cparms.session_id->internal.domain,\n+\t\t    cparms.session_id->internal.bus,\n+\t\t    cparms.session_id->internal.device,\n+\t\t    cparms.session_id->internal.fw_session_id);\n+\n+\treturn rc;\n+}\n+\n /** insert EM hash entry API\n  *\n  *    returns:\n@@ -539,10 +694,67 @@ int tf_alloc_identifier(struct tf *tfp,\n \treturn 0;\n }\n \n-/** free identifier resource\n- *\n- * Returns success or failure code.\n- */\n+int\n+tf_alloc_identifier_new(struct tf *tfp,\n+\t\t\tstruct tf_alloc_identifier_parms *parms)\n+{\n+\tint rc;\n+\tstruct tf_session *tfs;\n+\tstruct tf_dev_info *dev;\n+\tstruct tf_ident_alloc_parms aparms;\n+\tuint16_t id;\n+\n+\tTF_CHECK_PARMS2(tfp, parms);\n+\n+\t/* Can't do static initialization due to UT enum check */\n+\tmemset(&aparms, 0, sizeof(struct tf_ident_alloc_parms));\n+\n+\t/* Retrieve the session information */\n+\trc = tf_session_get_session(tfp, &tfs);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Failed to lookup session, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\t/* Retrieve the device information */\n+\trc = tf_session_get_device(tfs, &dev);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Failed to lookup device, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\tif (dev->ops->tf_dev_alloc_ident == NULL) {\n+\t\trc = -EOPNOTSUPP;\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Operation not supported, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\taparms.dir = parms->dir;\n+\taparms.ident_type = parms->ident_type;\n+\taparms.id = &id;\n+\trc = dev->ops->tf_dev_alloc_ident(tfp, &aparms);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Identifier allocation failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\tparms->id = id;\n+\n+\treturn 0;\n+}\n+\n int tf_free_identifier(struct tf *tfp,\n \t\t       struct tf_free_identifier_parms *parms)\n {\n@@ -619,6 +831,64 @@ int tf_free_identifier(struct tf *tfp,\n }\n \n int\n+tf_free_identifier_new(struct tf *tfp,\n+\t\t       struct tf_free_identifier_parms *parms)\n+{\n+\tint rc;\n+\tstruct tf_session *tfs;\n+\tstruct tf_dev_info *dev;\n+\tstruct tf_ident_free_parms fparms;\n+\n+\tTF_CHECK_PARMS2(tfp, parms);\n+\n+\t/* Can't do static initialization due to UT enum check */\n+\tmemset(&fparms, 0, sizeof(struct tf_ident_free_parms));\n+\n+\t/* Retrieve the session information */\n+\trc = tf_session_get_session(tfp, &tfs);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Failed to lookup session, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\t/* Retrieve the device information */\n+\trc = tf_session_get_device(tfs, &dev);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Failed to lookup device, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\tif (dev->ops->tf_dev_free_ident == NULL) {\n+\t\trc = -EOPNOTSUPP;\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Operation not supported, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\tfparms.dir = parms->dir;\n+\tfparms.ident_type = parms->ident_type;\n+\tfparms.id = parms->id;\n+\trc = dev->ops->tf_dev_free_ident(tfp, &fparms);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Identifier allocation failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int\n tf_alloc_tcam_entry(struct tf *tfp,\n \t\t    struct tf_alloc_tcam_entry_parms *parms)\n {\ndiff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h\nindex 96a1a79..74ed24e 100644\n--- a/drivers/net/bnxt/tf_core/tf_core.h\n+++ b/drivers/net/bnxt/tf_core/tf_core.h\n@@ -380,7 +380,7 @@ struct tf_session_resources {\n \t * The number of identifier resources requested for the session.\n \t * The index used is tf_identifier_type.\n \t */\n-\tuint16_t identifer_cnt[TF_DIR_MAX][TF_IDENT_TYPE_MAX];\n+\tuint16_t identifier_cnt[TF_IDENT_TYPE_MAX][TF_DIR_MAX];\n \t/** [in] Requested Index Table resource counts\n \t *\n \t * The number of index table resources requested for the session.\n@@ -480,6 +480,9 @@ struct tf_open_session_parms {\n int tf_open_session(struct tf *tfp,\n \t\t    struct tf_open_session_parms *parms);\n \n+int tf_open_session_new(struct tf *tfp,\n+\t\t\tstruct tf_open_session_parms *parms);\n+\n struct tf_attach_session_parms {\n \t/** [in] ctrl_chan_name\n \t *\n@@ -542,6 +545,8 @@ struct tf_attach_session_parms {\n  */\n int tf_attach_session(struct tf *tfp,\n \t\t      struct tf_attach_session_parms *parms);\n+int tf_attach_session_new(struct tf *tfp,\n+\t\t\t  struct tf_attach_session_parms *parms);\n \n /**\n  * Closes an existing session. Cleans up all hardware and firmware\n@@ -551,6 +556,7 @@ int tf_attach_session(struct tf *tfp,\n  * Returns success or failure code.\n  */\n int tf_close_session(struct tf *tfp);\n+int tf_close_session_new(struct tf *tfp);\n \n /**\n  * @page  ident Identity Management\n@@ -602,6 +608,8 @@ struct tf_free_identifier_parms {\n  */\n int tf_alloc_identifier(struct tf *tfp,\n \t\t\tstruct tf_alloc_identifier_parms *parms);\n+int tf_alloc_identifier_new(struct tf *tfp,\n+\t\t\t    struct tf_alloc_identifier_parms *parms);\n \n /** free identifier resource\n  *\n@@ -613,6 +621,8 @@ int tf_alloc_identifier(struct tf *tfp,\n  */\n int tf_free_identifier(struct tf *tfp,\n \t\t       struct tf_free_identifier_parms *parms);\n+int tf_free_identifier_new(struct tf *tfp,\n+\t\t\t   struct tf_free_identifier_parms *parms);\n \n /**\n  * @page dram_table DRAM Table Scope Interface\ndiff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c\nindex 3b36831..4c46cad 100644\n--- a/drivers/net/bnxt/tf_core/tf_device.c\n+++ b/drivers/net/bnxt/tf_core/tf_device.c\n@@ -6,45 +6,169 @@\n #include \"tf_device.h\"\n #include \"tf_device_p4.h\"\n #include \"tfp.h\"\n-#include \"bnxt.h\"\n \n struct tf;\n \n+/* Forward declarations */\n+static int dev_unbind_p4(struct tf *tfp);\n+\n /**\n- * Device specific bind function\n+ * Device specific bind function, WH+\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [in] shadow_copy\n+ *   Flag controlling shadow copy DB creation\n+ *\n+ * [in] resources\n+ *   Pointer to resource allocation information\n+ *\n+ * [out] dev_handle\n+ *   Device handle\n+ *\n+ * Returns\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on parameter or internal failure.\n  */\n static int\n-dev_bind_p4(struct tf *tfp __rte_unused,\n-\t    struct tf_session_resources *resources __rte_unused,\n-\t    struct tf_dev_info *dev_info)\n+dev_bind_p4(struct tf *tfp,\n+\t    bool shadow_copy,\n+\t    struct tf_session_resources *resources,\n+\t    struct tf_dev_info *dev_handle)\n {\n+\tint rc;\n+\tint frc;\n+\tstruct tf_ident_cfg_parms ident_cfg;\n+\tstruct tf_tbl_cfg_parms tbl_cfg;\n+\tstruct tf_tcam_cfg_parms tcam_cfg;\n+\n \t/* Initialize the modules */\n \n-\tdev_info->ops = &tf_dev_ops_p4;\n+\tident_cfg.num_elements = TF_IDENT_TYPE_MAX;\n+\tident_cfg.cfg = tf_ident_p4;\n+\tident_cfg.shadow_copy = shadow_copy;\n+\tident_cfg.resources = resources;\n+\trc = tf_ident_bind(tfp, &ident_cfg);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Identifier initialization failure\\n\");\n+\t\tgoto fail;\n+\t}\n+\n+\ttbl_cfg.num_elements = TF_TBL_TYPE_MAX;\n+\ttbl_cfg.cfg = tf_tbl_p4;\n+\ttbl_cfg.shadow_copy = shadow_copy;\n+\ttbl_cfg.resources = resources;\n+\trc = tf_tbl_bind(tfp, &tbl_cfg);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Table initialization failure\\n\");\n+\t\tgoto fail;\n+\t}\n+\n+\ttcam_cfg.num_elements = TF_TCAM_TBL_TYPE_MAX;\n+\ttcam_cfg.cfg = tf_tcam_p4;\n+\ttcam_cfg.shadow_copy = shadow_copy;\n+\ttcam_cfg.resources = resources;\n+\trc = tf_tcam_bind(tfp, &tcam_cfg);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"TCAM initialization failure\\n\");\n+\t\tgoto fail;\n+\t}\n+\n+\tdev_handle->type = TF_DEVICE_TYPE_WH;\n+\tdev_handle->ops = &tf_dev_ops_p4;\n+\n \treturn 0;\n+\n+ fail:\n+\t/* Cleanup of already created modules */\n+\tfrc = dev_unbind_p4(tfp);\n+\tif (frc)\n+\t\treturn frc;\n+\n+\treturn rc;\n+}\n+\n+/**\n+ * Device specific unbind function, WH+\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * Returns\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on failure.\n+ */\n+static int\n+dev_unbind_p4(struct tf *tfp)\n+{\n+\tint rc = 0;\n+\tbool fail = false;\n+\n+\t/* Unbind all the support modules. As this is only done on\n+\t * close we only report errors as everything has to be cleaned\n+\t * up regardless.\n+\t */\n+\trc = tf_ident_unbind(tfp);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Device unbind failed, Identifier\\n\");\n+\t\tfail = true;\n+\t}\n+\n+\trc = tf_tbl_unbind(tfp);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Device unbind failed, Table Type\\n\");\n+\t\tfail = true;\n+\t}\n+\n+\trc = tf_tcam_unbind(tfp);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Device unbind failed, TCAM\\n\");\n+\t\tfail = true;\n+\t}\n+\n+\tif (fail)\n+\t\treturn -1;\n+\n+\treturn rc;\n }\n \n int\n dev_bind(struct tf *tfp __rte_unused,\n \t enum tf_device_type type,\n+\t bool shadow_copy,\n \t struct tf_session_resources *resources,\n-\t struct tf_dev_info *dev_info)\n+\t struct tf_dev_info *dev_handle)\n {\n \tswitch (type) {\n \tcase TF_DEVICE_TYPE_WH:\n \t\treturn dev_bind_p4(tfp,\n+\t\t\t\t   shadow_copy,\n \t\t\t\t   resources,\n-\t\t\t\t   dev_info);\n+\t\t\t\t   dev_handle);\n \tdefault:\n \t\tTFP_DRV_LOG(ERR,\n-\t\t\t    \"Device type not supported\\n\");\n-\t\treturn -ENOTSUP;\n+\t\t\t    \"No such device\\n\");\n+\t\treturn -ENODEV;\n \t}\n }\n \n int\n-dev_unbind(struct tf *tfp __rte_unused,\n-\t   struct tf_dev_info *dev_handle __rte_unused)\n+dev_unbind(struct tf *tfp,\n+\t   struct tf_dev_info *dev_handle)\n {\n-\treturn 0;\n+\tswitch (dev_handle->type) {\n+\tcase TF_DEVICE_TYPE_WH:\n+\t\treturn dev_unbind_p4(tfp);\n+\tdefault:\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"No such device\\n\");\n+\t\treturn -ENODEV;\n+\t}\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h\nindex 8b63ff1..6aeb6fe 100644\n--- a/drivers/net/bnxt/tf_core/tf_device.h\n+++ b/drivers/net/bnxt/tf_core/tf_device.h\n@@ -27,6 +27,7 @@ struct tf_session;\n  * TF device information\n  */\n struct tf_dev_info {\n+\tenum tf_device_type type;\n \tconst struct tf_dev_ops *ops;\n };\n \n@@ -56,10 +57,12 @@ struct tf_dev_info {\n  *\n  * Returns\n  *   - (0) if successful.\n- *   - (-EINVAL) on failure.\n+ *   - (-EINVAL) parameter failure.\n+ *   - (-ENODEV) no such device supported.\n  */\n int dev_bind(struct tf *tfp,\n \t     enum tf_device_type type,\n+\t     bool shadow_copy,\n \t     struct tf_session_resources *resources,\n \t     struct tf_dev_info *dev_handle);\n \n@@ -71,6 +74,11 @@ int dev_bind(struct tf *tfp,\n  *\n  * [in] dev_handle\n  *   Device handle\n+ *\n+ * Returns\n+ *   - (0) if successful.\n+ *   - (-EINVAL) parameter failure.\n+ *   - (-ENODEV) no such device supported.\n  */\n int dev_unbind(struct tf *tfp,\n \t       struct tf_dev_info *dev_handle);\n@@ -85,6 +93,44 @@ int dev_unbind(struct tf *tfp,\n  */\n struct tf_dev_ops {\n \t/**\n+\t * Retrives the MAX number of resource types that the device\n+\t * supports.\n+\t *\n+\t * [in] tfp\n+\t *   Pointer to TF handle\n+\t *\n+\t * [out] max_types\n+\t *   Pointer to MAX number of types the device supports\n+\t *\n+\t * Returns\n+\t *   - (0) if successful.\n+\t *   - (-EINVAL) on failure.\n+\t */\n+\tint (*tf_dev_get_max_types)(struct tf *tfp,\n+\t\t\t\t    uint16_t *max_types);\n+\n+\t/**\n+\t * Retrieves the WC TCAM slice information that the device\n+\t * supports.\n+\t *\n+\t * [in] tfp\n+\t *   Pointer to TF handle\n+\t *\n+\t * [out] slice_size\n+\t *   Pointer to slice size the device supports\n+\t *\n+\t * [out] num_slices_per_row\n+\t *   Pointer to number of slices per row the device supports\n+\t *\n+\t * Returns\n+\t *   - (0) if successful.\n+\t *   - (-EINVAL) on failure.\n+\t */\n+\tint (*tf_dev_get_wc_tcam_slices)(struct tf *tfp,\n+\t\t\t\t\t uint16_t *slice_size,\n+\t\t\t\t\t uint16_t *num_slices_per_row);\n+\n+\t/**\n \t * Allocation of an identifier element.\n \t *\n \t * This API allocates the specified identifier element from a\n@@ -134,14 +180,14 @@ struct tf_dev_ops {\n \t *   Pointer to TF handle\n \t *\n \t * [in] parms\n-\t *   Pointer to table type allocation parameters\n+\t *   Pointer to table allocation parameters\n \t *\n \t * Returns\n \t *   - (0) if successful.\n \t *   - (-EINVAL) on failure.\n \t */\n-\tint (*tf_dev_alloc_tbl_type)(struct tf *tfp,\n-\t\t\t\t     struct tf_tbl_type_alloc_parms *parms);\n+\tint (*tf_dev_alloc_tbl)(struct tf *tfp,\n+\t\t\t\tstruct tf_tbl_alloc_parms *parms);\n \n \t/**\n \t * Free of a table type element.\n@@ -153,14 +199,14 @@ struct tf_dev_ops {\n \t *   Pointer to TF handle\n \t *\n \t * [in] parms\n-\t *   Pointer to table type free parameters\n+\t *   Pointer to table free parameters\n \t *\n \t * Returns\n \t *   - (0) if successful.\n \t *   - (-EINVAL) on failure.\n \t */\n-\tint (*tf_dev_free_tbl_type)(struct tf *tfp,\n-\t\t\t\t    struct tf_tbl_type_free_parms *parms);\n+\tint (*tf_dev_free_tbl)(struct tf *tfp,\n+\t\t\t       struct tf_tbl_free_parms *parms);\n \n \t/**\n \t * Searches for the specified table type element in a shadow DB.\n@@ -175,15 +221,14 @@ struct tf_dev_ops {\n \t *   Pointer to TF handle\n \t *\n \t * [in] parms\n-\t *   Pointer to table type allocation and search parameters\n+\t *   Pointer to table allocation and search parameters\n \t *\n \t * Returns\n \t *   - (0) if successful.\n \t *   - (-EINVAL) on failure.\n \t */\n-\tint (*tf_dev_alloc_search_tbl_type)\n-\t\t\t(struct tf *tfp,\n-\t\t\tstruct tf_tbl_type_alloc_search_parms *parms);\n+\tint (*tf_dev_alloc_search_tbl)(struct tf *tfp,\n+\t\t\t\t       struct tf_tbl_alloc_search_parms *parms);\n \n \t/**\n \t * Sets the specified table type element.\n@@ -195,14 +240,14 @@ struct tf_dev_ops {\n \t *   Pointer to TF handle\n \t *\n \t * [in] parms\n-\t *   Pointer to table type set parameters\n+\t *   Pointer to table set parameters\n \t *\n \t * Returns\n \t *   - (0) if successful.\n \t *   - (-EINVAL) on failure.\n \t */\n-\tint (*tf_dev_set_tbl_type)(struct tf *tfp,\n-\t\t\t\t   struct tf_tbl_type_set_parms *parms);\n+\tint (*tf_dev_set_tbl)(struct tf *tfp,\n+\t\t\t      struct tf_tbl_set_parms *parms);\n \n \t/**\n \t * Retrieves the specified table type element.\n@@ -214,14 +259,14 @@ struct tf_dev_ops {\n \t *   Pointer to TF handle\n \t *\n \t * [in] parms\n-\t *   Pointer to table type get parameters\n+\t *   Pointer to table get parameters\n \t *\n \t * Returns\n \t *   - (0) if successful.\n \t *   - (-EINVAL) on failure.\n \t */\n-\tint (*tf_dev_get_tbl_type)(struct tf *tfp,\n-\t\t\t\t   struct tf_tbl_type_get_parms *parms);\n+\tint (*tf_dev_get_tbl)(struct tf *tfp,\n+\t\t\t       struct tf_tbl_get_parms *parms);\n \n \t/**\n \t * Allocation of a tcam element.\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c\nindex c3c4d1e..c235976 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p4.c\n+++ b/drivers/net/bnxt/tf_core/tf_device_p4.c\n@@ -3,19 +3,87 @@\n  * All rights reserved.\n  */\n \n+#include <rte_common.h>\n+#include <cfa_resource_types.h>\n+\n #include \"tf_device.h\"\n #include \"tf_identifier.h\"\n #include \"tf_tbl_type.h\"\n #include \"tf_tcam.h\"\n \n+/**\n+ * Device specific function that retrieves the MAX number of HCAPI\n+ * types the device supports.\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [out] max_types\n+ *   Pointer to the MAX number of HCAPI types supported\n+ *\n+ * Returns\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on failure.\n+ */\n+static int\n+tf_dev_p4_get_max_types(struct tf *tfp __rte_unused,\n+\t\t\tuint16_t *max_types)\n+{\n+\tif (max_types == NULL)\n+\t\treturn -EINVAL;\n+\n+\t*max_types = CFA_RESOURCE_TYPE_P4_LAST + 1;\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * Device specific function that retrieves the WC TCAM slices the\n+ * device supports.\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [out] slice_size\n+ *   Pointer to the WC TCAM slice size\n+ *\n+ * [out] num_slices_per_row\n+ *   Pointer to the WC TCAM row slice configuration\n+ *\n+ * Returns\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on failure.\n+ */\n+static int\n+tf_dev_p4_get_wc_tcam_slices(struct tf *tfp __rte_unused,\n+\t\t\t     uint16_t *slice_size,\n+\t\t\t     uint16_t *num_slices_per_row)\n+{\n+#define CFA_P4_WC_TCAM_SLICE_SIZE       12\n+#define CFA_P4_WC_TCAM_SLICES_PER_ROW    2\n+\n+\tif (slice_size == NULL || num_slices_per_row == NULL)\n+\t\treturn -EINVAL;\n+\n+\t*slice_size = CFA_P4_WC_TCAM_SLICE_SIZE;\n+\t*num_slices_per_row = CFA_P4_WC_TCAM_SLICES_PER_ROW;\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * Truflow P4 device specific functions\n+ */\n const struct tf_dev_ops tf_dev_ops_p4 = {\n+\t.tf_dev_get_max_types = tf_dev_p4_get_max_types,\n+\t.tf_dev_get_wc_tcam_slices = tf_dev_p4_get_wc_tcam_slices,\n \t.tf_dev_alloc_ident = tf_ident_alloc,\n \t.tf_dev_free_ident = tf_ident_free,\n-\t.tf_dev_alloc_tbl_type = tf_tbl_type_alloc,\n-\t.tf_dev_free_tbl_type = tf_tbl_type_free,\n-\t.tf_dev_alloc_search_tbl_type = tf_tbl_type_alloc_search,\n-\t.tf_dev_set_tbl_type = tf_tbl_type_set,\n-\t.tf_dev_get_tbl_type = tf_tbl_type_get,\n+\t.tf_dev_alloc_tbl = tf_tbl_alloc,\n+\t.tf_dev_free_tbl = tf_tbl_free,\n+\t.tf_dev_alloc_search_tbl = tf_tbl_alloc_search,\n+\t.tf_dev_set_tbl = tf_tbl_set,\n+\t.tf_dev_get_tbl = tf_tbl_get,\n \t.tf_dev_alloc_tcam = tf_tcam_alloc,\n \t.tf_dev_free_tcam = tf_tcam_free,\n \t.tf_dev_alloc_search_tcam = tf_tcam_alloc_search,\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p4.h b/drivers/net/bnxt/tf_core/tf_device_p4.h\nindex 84d90e3..5cd02b2 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p4.h\n+++ b/drivers/net/bnxt/tf_core/tf_device_p4.h\n@@ -12,11 +12,12 @@\n #include \"tf_rm_new.h\"\n \n struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = {\n-\t{ TF_RM_ELEM_CFG_PRIVATE, 0 /* CFA_RESOURCE_TYPE_P4_INVALID */ },\n+\t{ TF_RM_ELEM_CFG_PRIVATE, CFA_RESOURCE_TYPE_INVALID },\n \t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_PROF_FUNC },\n \t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID },\n \t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_EM_PROF_ID },\n-\t{ TF_RM_ELEM_CFG_NULL, 0    /* CFA_RESOURCE_TYPE_P4_L2_FUNC */ }\n+\t/* CFA_RESOURCE_TYPE_P4_L2_FUNC */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }\n };\n \n struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = {\n@@ -24,41 +25,57 @@ struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = {\n \t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_PROF_TCAM },\n \t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_WC_TCAM },\n \t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SP_TCAM },\n-\t{ TF_RM_ELEM_CFG_NULL, 0 /* CFA_RESOURCE_TYPE_P4_CT_RULE_TCAM */ },\n-\t{ TF_RM_ELEM_CFG_NULL, 0  /* CFA_RESOURCE_TYPE_P4_VEB_TCAM */ }\n+\t/* CFA_RESOURCE_TYPE_P4_CT_RULE_TCAM */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_VEB_TCAM */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }\n };\n \n struct tf_rm_element_cfg tf_tbl_p4[TF_TBL_TYPE_MAX] = {\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_FULL_ACTION },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_MCG },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_ENCAP_8B },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_ENCAP_16B },\n-\t{ TF_RM_ELEM_CFG_NULL, 0, /* CFA_RESOURCE_TYPE_P4_SRAM_ENCAP_32B */ },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_ENCAP_64B },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_SP_MAC },\n-\t{ TF_RM_ELEM_CFG_NULL, 0 /* CFA_RESOURCE_TYPE_P4_SRAM_SP_SMAC_IPV4 */ },\n-\t{ TF_RM_ELEM_CFG_NULL, 0 /* CFA_RESOURCE_TYPE_P4_SRAM_SP_SMAC_IPV6 */ },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_COUNTER_64B },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_NAT_SPORT },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_NAT_DPORT },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_NAT_S_IPV4 },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_NAT_D_IPV4 },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_NAT_S_IPV6 },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SRAM_NAT_D_IPV6 },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_FULL_ACTION },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_MCG },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_ENCAP_8B },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_ENCAP_16B },\n+\t/* CFA_RESOURCE_TYPE_P4_SRAM_ENCAP_32B */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_ENCAP_64B },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SP_MAC },\n+\t/* CFA_RESOURCE_TYPE_P4_SRAM_SP_SMAC_IPV4 */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_SRAM_SP_SMAC_IPV6 */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_COUNTER_64B },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_SPORT },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_DPORT },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_S_IPV4 },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_D_IPV4 },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_S_IPV6 },\n+\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_D_IPV6 },\n \t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_METER_PROF },\n \t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_METER },\n \t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_MIRROR },\n-\t{ TF_RM_ELEM_CFG_NULL, /* CFA_RESOURCE_TYPE_P4_UPAR */ },\n-\t{ TF_RM_ELEM_CFG_NULL, /* CFA_RESOURCE_TYPE_P4_EPOC */ },\n-\t{ TF_RM_ELEM_CFG_NULL, /* CFA_RESOURCE_TYPE_P4_METADATA */ },\n-\t{ TF_RM_ELEM_CFG_NULL, /* CFA_RESOURCE_TYPE_P4_CT_STATE */ },\n-\t{ TF_RM_ELEM_CFG_NULL, /* CFA_RESOURCE_TYPE_P4_RANGE_PROF */ },\n-\t{ TF_RM_ELEM_CFG_NULL, /* CFA_RESOURCE_TYPE_P4_RANGE_ENTRY */ },\n-\t{ TF_RM_ELEM_CFG_NULL, /* CFA_RESOURCE_TYPE_P4_LAG */ },\n-\t{ TF_RM_ELEM_CFG_NULL, /* CFA_RESOURCE_TYPE_P4_VNIC_SVIF */ },\n-\t{ TF_RM_ELEM_CFG_NULL, /* CFA_RESOURCE_TYPE_P4_EM_FBK */ },\n-\t{ TF_RM_ELEM_CFG_NULL, /* CFA_RESOURCE_TYPE_P4_WC_FKB */ },\n-\t{ TF_RM_ELEM_CFG_NULL, /* CFA_RESOURCE_TYPE_P4_EXT */ }\n+\t/* CFA_RESOURCE_TYPE_P4_UPAR */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_EPOC */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_METADATA */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_CT_STATE */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_RANGE_PROF */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_RANGE_ENTRY */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_LAG */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_VNIC_SVIF */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_EM_FBK */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_WC_FKB */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n+\t/* CFA_RESOURCE_TYPE_P4_EXT */\n+\t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }\n };\n \n #endif /* _TF_DEVICE_P4_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c\nindex 726d0b4..e89f976 100644\n--- a/drivers/net/bnxt/tf_core/tf_identifier.c\n+++ b/drivers/net/bnxt/tf_core/tf_identifier.c\n@@ -6,42 +6,172 @@\n #include <rte_common.h>\n \n #include \"tf_identifier.h\"\n+#include \"tf_common.h\"\n+#include \"tf_rm_new.h\"\n+#include \"tf_util.h\"\n+#include \"tfp.h\"\n \n struct tf;\n \n /**\n  * Identifier DBs.\n  */\n-/* static void *ident_db[TF_DIR_MAX]; */\n+static void *ident_db[TF_DIR_MAX];\n \n /**\n  * Init flag, set on bind and cleared on unbind\n  */\n-/* static uint8_t init; */\n+static uint8_t init;\n \n int\n-tf_ident_bind(struct tf *tfp __rte_unused,\n-\t      struct tf_ident_cfg *parms __rte_unused)\n+tf_ident_bind(struct tf *tfp,\n+\t      struct tf_ident_cfg_parms *parms)\n {\n+\tint rc;\n+\tint i;\n+\tstruct tf_rm_create_db_parms db_cfg = { 0 };\n+\n+\tTF_CHECK_PARMS2(tfp, parms);\n+\n+\tif (init) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Identifier already initialized\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tdb_cfg.num_elements = parms->num_elements;\n+\n+\tfor (i = 0; i < TF_DIR_MAX; i++) {\n+\t\tdb_cfg.dir = i;\n+\t\tdb_cfg.num_elements = parms->num_elements;\n+\t\tdb_cfg.cfg = parms->cfg;\n+\t\tdb_cfg.alloc_num = parms->resources->identifier_cnt[i];\n+\t\tdb_cfg.rm_db = ident_db[i];\n+\t\trc = tf_rm_create_db(tfp, &db_cfg);\n+\t\tif (rc) {\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s: Identifier DB creation failed\\n\",\n+\t\t\t\t    tf_dir_2_str(i));\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n+\tinit = 1;\n+\n \treturn 0;\n }\n \n int\n tf_ident_unbind(struct tf *tfp __rte_unused)\n {\n+\tint rc;\n+\tint i;\n+\tstruct tf_rm_free_db_parms fparms = { 0 };\n+\n+\tTF_CHECK_PARMS1(tfp);\n+\n+\t/* Bail if nothing has been initialized done silent as to\n+\t * allow for creation cleanup.\n+\t */\n+\tif (!init)\n+\t\treturn -EINVAL;\n+\n+\tfor (i = 0; i < TF_DIR_MAX; i++) {\n+\t\tfparms.dir = i;\n+\t\tfparms.rm_db = ident_db[i];\n+\t\trc = tf_rm_free_db(tfp, &fparms);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\n+\t\tident_db[i] = NULL;\n+\t}\n+\n+\tinit = 0;\n+\n \treturn 0;\n }\n \n int\n tf_ident_alloc(struct tf *tfp __rte_unused,\n-\t       struct tf_ident_alloc_parms *parms __rte_unused)\n+\t       struct tf_ident_alloc_parms *parms)\n {\n+\tint rc;\n+\tstruct tf_rm_allocate_parms aparms = { 0 };\n+\n+\tTF_CHECK_PARMS2(tfp, parms);\n+\n+\tif (!init) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: No Identifier DBs created\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir));\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Allocate requested element */\n+\taparms.rm_db = ident_db[parms->dir];\n+\taparms.db_index = parms->ident_type;\n+\taparms.index = (uint32_t *)&parms->id;\n+\trc = tf_rm_allocate(&aparms);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Failed allocate, type:%d\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    parms->ident_type);\n+\t\treturn rc;\n+\t}\n+\n \treturn 0;\n }\n \n int\n tf_ident_free(struct tf *tfp __rte_unused,\n-\t      struct tf_ident_free_parms *parms __rte_unused)\n+\t      struct tf_ident_free_parms *parms)\n {\n+\tint rc;\n+\tstruct tf_rm_is_allocated_parms aparms = { 0 };\n+\tstruct tf_rm_free_parms fparms = { 0 };\n+\tint allocated = 0;\n+\n+\tTF_CHECK_PARMS2(tfp, parms);\n+\n+\tif (!init) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: No Identifier DBs created\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir));\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Check if element is in use */\n+\taparms.rm_db = ident_db[parms->dir];\n+\taparms.db_index = parms->ident_type;\n+\taparms.index = parms->id;\n+\taparms.allocated = &allocated;\n+\trc = tf_rm_is_allocated(&aparms);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tif (!allocated) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Entry already free, type:%d, index:%d\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    parms->ident_type,\n+\t\t\t    parms->id);\n+\t\treturn rc;\n+\t}\n+\n+\t/* Free requested element */\n+\tfparms.rm_db = ident_db[parms->dir];\n+\tfparms.db_index = parms->ident_type;\n+\tfparms.index = parms->id;\n+\trc = tf_rm_free(&fparms);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Free failed, type:%d, index:%d\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    parms->ident_type,\n+\t\t\t    parms->id);\n+\t\treturn rc;\n+\t}\n+\n \treturn 0;\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_identifier.h b/drivers/net/bnxt/tf_core/tf_identifier.h\nindex b77c91b..1c5319b 100644\n--- a/drivers/net/bnxt/tf_core/tf_identifier.h\n+++ b/drivers/net/bnxt/tf_core/tf_identifier.h\n@@ -12,21 +12,28 @@\n  * The Identifier module provides processing of Identifiers.\n  */\n \n-struct tf_ident_cfg {\n+struct tf_ident_cfg_parms {\n \t/**\n-\t * Number of identifier types in each of the configuration\n-\t * arrays\n+\t * [in] Number of identifier types in each of the\n+\t * configuration arrays\n \t */\n \tuint16_t num_elements;\n-\n \t/**\n-\t * TCAM configuration array\n+\t * [in] Identifier configuration array\n+\t */\n+\tstruct tf_rm_element_cfg *cfg;\n+\t/**\n+\t * [in] Boolean controlling the request shadow copy.\n \t */\n-\tstruct tf_rm_element_cfg *ident_cfg[TF_DIR_MAX];\n+\tbool shadow_copy;\n+\t/**\n+\t * [in] Session resource allocations\n+\t */\n+\tstruct tf_session_resources *resources;\n };\n \n /**\n- * Identifier allcoation parameter definition\n+ * Identifier allocation parameter definition\n  */\n struct tf_ident_alloc_parms {\n \t/**\n@@ -40,7 +47,7 @@ struct tf_ident_alloc_parms {\n \t/**\n \t * [out] Identifier allocated\n \t */\n-\tuint16_t id;\n+\tuint16_t *id;\n };\n \n /**\n@@ -88,7 +95,7 @@ struct tf_ident_free_parms {\n  *   - (-EINVAL) on failure.\n  */\n int tf_ident_bind(struct tf *tfp,\n-\t\t  struct tf_ident_cfg *parms);\n+\t\t  struct tf_ident_cfg_parms *parms);\n \n /**\n  * Cleans up the private DBs and releases all the data.\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c\nindex c755c85..e08a96f 100644\n--- a/drivers/net/bnxt/tf_core/tf_msg.c\n+++ b/drivers/net/bnxt/tf_core/tf_msg.c\n@@ -6,15 +6,13 @@\n #include <inttypes.h>\n #include <stdbool.h>\n #include <stdlib.h>\n-\n-#include \"bnxt.h\"\n-#include \"tf_core.h\"\n-#include \"tf_session.h\"\n-#include \"tfp.h\"\n+#include <string.h>\n \n #include \"tf_msg_common.h\"\n #include \"tf_msg.h\"\n-#include \"hsi_struct_def_dpdk.h\"\n+#include \"tf_util.h\"\n+#include \"tf_session.h\"\n+#include \"tfp.h\"\n #include \"hwrm_tf.h\"\n #include \"tf_em.h\"\n \n@@ -141,6 +139,51 @@ tf_tcam_tbl_2_hwrm(enum tf_tcam_tbl_type tcam_type,\n }\n \n /**\n+ * Allocates a DMA buffer that can be used for message transfer.\n+ *\n+ * [in] buf\n+ *   Pointer to DMA buffer structure\n+ *\n+ * [in] size\n+ *   Requested size of the buffer in bytes\n+ *\n+ * Returns:\n+ *    0      - Success\n+ *   -ENOMEM - Unable to allocate buffer, no memory\n+ */\n+static int\n+tf_msg_alloc_dma_buf(struct tf_msg_dma_buf *buf, int size)\n+{\n+\tstruct tfp_calloc_parms alloc_parms;\n+\tint rc;\n+\n+\t/* Allocate session */\n+\talloc_parms.nitems = 1;\n+\talloc_parms.size = size;\n+\talloc_parms.alignment = 4096;\n+\trc = tfp_calloc(&alloc_parms);\n+\tif (rc)\n+\t\treturn -ENOMEM;\n+\n+\tbuf->pa_addr = (uintptr_t)alloc_parms.mem_pa;\n+\tbuf->va_addr = alloc_parms.mem_va;\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * Free's a previous allocated DMA buffer.\n+ *\n+ * [in] buf\n+ *   Pointer to DMA buffer structure\n+ */\n+static void\n+tf_msg_free_dma_buf(struct tf_msg_dma_buf *buf)\n+{\n+\ttfp_free(buf->va_addr);\n+}\n+\n+/**\n  * Sends session open request to TF Firmware\n  */\n int\n@@ -154,7 +197,7 @@ tf_msg_session_open(struct tf *tfp,\n \tstruct tfp_send_msg_parms parms = { 0 };\n \n \t/* Populate the request */\n-\tmemcpy(&req.session_name, ctrl_chan_name, TF_SESSION_NAME_MAX);\n+\ttfp_memcpy(&req.session_name, ctrl_chan_name, TF_SESSION_NAME_MAX);\n \n \tparms.tf_type = HWRM_TF_SESSION_OPEN;\n \tparms.req_data = (uint32_t *)&req;\n@@ -870,6 +913,180 @@ tf_msg_session_sram_resc_flush(struct tf *tfp,\n \treturn tfp_le_to_cpu_32(parms.tf_resp_code);\n }\n \n+int\n+tf_msg_session_resc_qcaps(struct tf *tfp,\n+\t\t\t  enum tf_dir dir,\n+\t\t\t  uint16_t size,\n+\t\t\t  struct tf_rm_resc_req_entry *query,\n+\t\t\t  enum tf_rm_resc_resv_strategy *resv_strategy)\n+{\n+\tint rc;\n+\tint i;\n+\tstruct tfp_send_msg_parms parms = { 0 };\n+\tstruct hwrm_tf_session_resc_qcaps_input req = { 0 };\n+\tstruct hwrm_tf_session_resc_qcaps_output resp = { 0 };\n+\tuint8_t fw_session_id;\n+\tstruct tf_msg_dma_buf qcaps_buf = { 0 };\n+\tstruct tf_rm_resc_req_entry *data;\n+\tint dma_size;\n+\n+\tif (size == 0 || query == NULL || resv_strategy == NULL) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Resource QCAPS parameter error, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-EINVAL));\n+\t\treturn -EINVAL;\n+\t}\n+\n+\trc = tf_session_get_fw_session_id(tfp, &fw_session_id);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Unable to lookup FW id, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\t/* Prepare DMA buffer */\n+\tdma_size = size * sizeof(struct tf_rm_resc_req_entry);\n+\trc = tf_msg_alloc_dma_buf(&qcaps_buf, dma_size);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Populate the request */\n+\treq.fw_session_id = tfp_cpu_to_le_32(fw_session_id);\n+\treq.flags = tfp_cpu_to_le_16(dir);\n+\treq.qcaps_size = size;\n+\treq.qcaps_addr = qcaps_buf.pa_addr;\n+\n+\tparms.tf_type = HWRM_TF_SESSION_RESC_QCAPS;\n+\tparms.req_data = (uint32_t *)&req;\n+\tparms.req_size = sizeof(req);\n+\tparms.resp_data = (uint32_t *)&resp;\n+\tparms.resp_size = sizeof(resp);\n+\tparms.mailbox = TF_KONG_MB;\n+\n+\trc = tfp_send_msg_direct(tfp, &parms);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Process the response\n+\t * Should always get expected number of entries\n+\t */\n+\tif (resp.size != size) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: QCAPS message error, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-EINVAL));\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Post process the response */\n+\tdata = (struct tf_rm_resc_req_entry *)qcaps_buf.va_addr;\n+\tfor (i = 0; i < size; i++) {\n+\t\tquery[i].type = tfp_cpu_to_le_32(data[i].type);\n+\t\tquery[i].min = tfp_le_to_cpu_16(data[i].min);\n+\t\tquery[i].max = tfp_le_to_cpu_16(data[i].max);\n+\t}\n+\n+\t*resv_strategy = resp.flags &\n+\t      HWRM_TF_SESSION_RESC_QCAPS_OUTPUT_FLAGS_SESS_RESV_STRATEGY_MASK;\n+\n+\ttf_msg_free_dma_buf(&qcaps_buf);\n+\n+\treturn rc;\n+}\n+\n+int\n+tf_msg_session_resc_alloc(struct tf *tfp,\n+\t\t\t  enum tf_dir dir,\n+\t\t\t  uint16_t size,\n+\t\t\t  struct tf_rm_resc_req_entry *request,\n+\t\t\t  struct tf_rm_resc_entry *resv)\n+{\n+\tint rc;\n+\tint i;\n+\tstruct tfp_send_msg_parms parms = { 0 };\n+\tstruct hwrm_tf_session_resc_alloc_input req = { 0 };\n+\tstruct hwrm_tf_session_resc_alloc_output resp = { 0 };\n+\tuint8_t fw_session_id;\n+\tstruct tf_msg_dma_buf req_buf = { 0 };\n+\tstruct tf_msg_dma_buf resv_buf = { 0 };\n+\tstruct tf_rm_resc_req_entry *req_data;\n+\tstruct tf_rm_resc_entry *resv_data;\n+\tint dma_size;\n+\n+\trc = tf_session_get_fw_session_id(tfp, &fw_session_id);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Unable to lookup FW id, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\t/* Prepare DMA buffers */\n+\tdma_size = size * sizeof(struct tf_rm_resc_req_entry);\n+\trc = tf_msg_alloc_dma_buf(&req_buf, dma_size);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tdma_size = size * sizeof(struct tf_rm_resc_entry);\n+\trc = tf_msg_alloc_dma_buf(&resv_buf, dma_size);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Populate the request */\n+\treq.fw_session_id = tfp_cpu_to_le_32(fw_session_id);\n+\treq.flags = tfp_cpu_to_le_16(dir);\n+\treq.req_size = size;\n+\n+\treq_data = (struct tf_rm_resc_req_entry *)req_buf.va_addr;\n+\tfor (i = 0; i < size; i++) {\n+\t\treq_data[i].type = tfp_cpu_to_le_32(request[i].type);\n+\t\treq_data[i].min = tfp_cpu_to_le_16(request[i].min);\n+\t\treq_data[i].max = tfp_cpu_to_le_16(request[i].max);\n+\t}\n+\n+\treq.req_addr = req_buf.pa_addr;\n+\treq.resp_addr = resv_buf.pa_addr;\n+\n+\tparms.tf_type = HWRM_TF_SESSION_RESC_ALLOC;\n+\tparms.req_data = (uint32_t *)&req;\n+\tparms.req_size = sizeof(req);\n+\tparms.resp_data = (uint32_t *)&resp;\n+\tparms.resp_size = sizeof(resp);\n+\tparms.mailbox = TF_KONG_MB;\n+\n+\trc = tfp_send_msg_direct(tfp, &parms);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Process the response\n+\t * Should always get expected number of entries\n+\t */\n+\tif (resp.size != size) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Alloc message error, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-EINVAL));\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Post process the response */\n+\tresv_data = (struct tf_rm_resc_entry *)resv_buf.va_addr;\n+\tfor (i = 0; i < size; i++) {\n+\t\tresv[i].type = tfp_cpu_to_le_32(resv_data[i].type);\n+\t\tresv[i].start = tfp_cpu_to_le_16(resv_data[i].start);\n+\t\tresv[i].stride = tfp_cpu_to_le_16(resv_data[i].stride);\n+\t}\n+\n+\ttf_msg_free_dma_buf(&req_buf);\n+\ttf_msg_free_dma_buf(&resv_buf);\n+\n+\treturn rc;\n+}\n+\n /**\n  * Sends EM mem register request to Firmware\n  */\n@@ -1034,7 +1251,9 @@ int tf_msg_insert_em_internal_entry(struct tf *tfp,\n \n \treq.fw_session_id =\n \t\ttfp_cpu_to_le_32(tfs->session_id.internal.fw_session_id);\n-\tmemcpy(req.em_key, em_parms->key, ((em_parms->key_sz_in_bits + 7) / 8));\n+\ttfp_memcpy(req.em_key,\n+\t\t   em_parms->key,\n+\t\t   ((em_parms->key_sz_in_bits + 7) / 8));\n \n \tflags = (em_parms->dir == TF_DIR_TX ?\n \t\t HWRM_TF_EM_INSERT_INPUT_FLAGS_DIR_TX :\n@@ -1216,26 +1435,6 @@ tf_msg_get_tbl_entry(struct tf *tfp,\n \treturn tfp_le_to_cpu_32(parms.tf_resp_code);\n }\n \n-static int\n-tf_msg_alloc_dma_buf(struct tf_msg_dma_buf *buf, int size)\n-{\n-\tstruct tfp_calloc_parms alloc_parms;\n-\tint rc;\n-\n-\t/* Allocate session */\n-\talloc_parms.nitems = 1;\n-\talloc_parms.size = size;\n-\talloc_parms.alignment = 4096;\n-\trc = tfp_calloc(&alloc_parms);\n-\tif (rc)\n-\t\treturn -ENOMEM;\n-\n-\tbuf->pa_addr = (uintptr_t)alloc_parms.mem_pa;\n-\tbuf->va_addr = alloc_parms.mem_va;\n-\n-\treturn 0;\n-}\n-\n int\n tf_msg_get_bulk_tbl_entry(struct tf *tfp,\n \t\t\t  struct tf_get_bulk_tbl_entry_parms *params)\n@@ -1323,12 +1522,14 @@ tf_msg_tcam_entry_set(struct tf *tfp,\n \t\tif (rc)\n \t\t\tgoto cleanup;\n \t\tdata = buf.va_addr;\n-\t\tmemcpy(&req.dev_data[0], &buf.pa_addr, sizeof(buf.pa_addr));\n+\t\ttfp_memcpy(&req.dev_data[0],\n+\t\t\t   &buf.pa_addr,\n+\t\t\t   sizeof(buf.pa_addr));\n \t}\n \n-\tmemcpy(&data[0], parms->key, key_bytes);\n-\tmemcpy(&data[key_bytes], parms->mask, key_bytes);\n-\tmemcpy(&data[req.result_offset], parms->result, result_bytes);\n+\ttfp_memcpy(&data[0], parms->key, key_bytes);\n+\ttfp_memcpy(&data[key_bytes], parms->mask, key_bytes);\n+\ttfp_memcpy(&data[req.result_offset], parms->result, result_bytes);\n \n \tmparms.tf_type = HWRM_TF_TCAM_SET;\n \tmparms.req_data = (uint32_t *)&req;\n@@ -1343,8 +1544,7 @@ tf_msg_tcam_entry_set(struct tf *tfp,\n \t\tgoto cleanup;\n \n cleanup:\n-\tif (buf.va_addr != NULL)\n-\t\ttfp_free(buf.va_addr);\n+\ttf_msg_free_dma_buf(&buf);\n \n \treturn rc;\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h\nindex 8d050c4..06f52ef 100644\n--- a/drivers/net/bnxt/tf_core/tf_msg.h\n+++ b/drivers/net/bnxt/tf_core/tf_msg.h\n@@ -6,8 +6,12 @@\n #ifndef _TF_MSG_H_\n #define _TF_MSG_H_\n \n+#include <rte_common.h>\n+#include <hsi_struct_def_dpdk.h>\n+\n #include \"tf_tbl.h\"\n #include \"tf_rm.h\"\n+#include \"tf_rm_new.h\"\n \n struct tf;\n \n@@ -122,6 +126,61 @@ int tf_msg_session_sram_resc_flush(struct tf *tfp,\n \t\t\t\t   struct tf_rm_entry *sram_entry);\n \n /**\n+ * Sends session HW resource query capability request to TF Firmware\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [in] dir\n+ *   Receive or Transmit direction\n+ *\n+ * [in] size\n+ *   Number of elements in the query. Should be set to the max\n+ *   elements for the device type\n+ *\n+ * [out] query\n+ *   Pointer to an array of query elements\n+ *\n+ * [out] resv_strategy\n+ *   Pointer to the reservation strategy\n+ *\n+ * Returns:\n+ *   0 on Success else internal Truflow error\n+ */\n+int tf_msg_session_resc_qcaps(struct tf *tfp,\n+\t\t\t      enum tf_dir dir,\n+\t\t\t      uint16_t size,\n+\t\t\t      struct tf_rm_resc_req_entry *query,\n+\t\t\t      enum tf_rm_resc_resv_strategy *resv_strategy);\n+\n+/**\n+ * Sends session HW resource allocation request to TF Firmware\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [in] dir\n+ *   Receive or Transmit direction\n+ *\n+ * [in] size\n+ *   Number of elements in the req and resv arrays\n+ *\n+ * [in] req\n+ *   Pointer to an array of request elements\n+ *\n+ * [in] resv\n+ *   Pointer to an array of reserved elements\n+ *\n+ * Returns:\n+ *   0 on Success else internal Truflow error\n+ */\n+int tf_msg_session_resc_alloc(struct tf *tfp,\n+\t\t\t      enum tf_dir dir,\n+\t\t\t      uint16_t size,\n+\t\t\t      struct tf_rm_resc_req_entry *request,\n+\t\t\t      struct tf_rm_resc_entry *resv);\n+\n+/**\n  * Sends EM internal insert request to Firmware\n  */\n int tf_msg_insert_em_internal_entry(struct tf *tfp,\ndiff --git a/drivers/net/bnxt/tf_core/tf_rm_new.c b/drivers/net/bnxt/tf_core/tf_rm_new.c\nindex 51bb9ba..7cadb23 100644\n--- a/drivers/net/bnxt/tf_core/tf_rm_new.c\n+++ b/drivers/net/bnxt/tf_core/tf_rm_new.c\n@@ -3,20 +3,18 @@\n  * All rights reserved.\n  */\n \n+#include <string.h>\n+\n #include <rte_common.h>\n \n-#include \"tf_rm_new.h\"\n+#include <cfa_resource_types.h>\n \n-/**\n- * Resource query single entry. Used when accessing HCAPI RM on the\n- * firmware.\n- */\n-struct tf_rm_query_entry {\n-\t/** Minimum guaranteed number of elements */\n-\tuint16_t min;\n-\t/** Maximum non-guaranteed number of elements */\n-\tuint16_t max;\n-};\n+#include \"tf_rm_new.h\"\n+#include \"tf_util.h\"\n+#include \"tf_session.h\"\n+#include \"tf_device.h\"\n+#include \"tfp.h\"\n+#include \"tf_msg.h\"\n \n /**\n  * Generic RM Element data type that an RM DB is build upon.\n@@ -27,7 +25,7 @@ struct tf_rm_element {\n \t * hcapi_type can be ignored. If Null then the element is not\n \t * valid for the device.\n \t */\n-\tenum tf_rm_elem_cfg_type type;\n+\tenum tf_rm_elem_cfg_type cfg_type;\n \n \t/**\n \t * HCAPI RM Type for the element.\n@@ -50,53 +48,435 @@ struct tf_rm_element {\n /**\n  * TF RM DB definition\n  */\n-struct tf_rm_db {\n+struct tf_rm_new_db {\n+\t/**\n+\t * Number of elements in the DB\n+\t */\n+\tuint16_t num_entries;\n+\n+\t/**\n+\t * Direction this DB controls.\n+\t */\n+\tenum tf_dir dir;\n+\n \t/**\n \t * The DB consists of an array of elements\n \t */\n \tstruct tf_rm_element *db;\n };\n \n+\n+/**\n+ * Resource Manager Adjust of base index definitions.\n+ */\n+enum tf_rm_adjust_type {\n+\tTF_RM_ADJUST_ADD_BASE, /**< Adds base to the index */\n+\tTF_RM_ADJUST_RM_BASE   /**< Removes base from the index */\n+};\n+\n+/**\n+ * Adjust an index according to the allocation information.\n+ *\n+ * All resources are controlled in a 0 based pool. Some resources, by\n+ * design, are not 0 based, i.e. Full Action Records (SRAM) thus they\n+ * need to be adjusted before they are handed out.\n+ *\n+ * [in] db\n+ *   Pointer to the db, used for the lookup\n+ *\n+ * [in] action\n+ *   Adjust action\n+ *\n+ * [in] db_index\n+ *   DB index for the element type\n+ *\n+ * [in] index\n+ *   Index to convert\n+ *\n+ * [out] adj_index\n+ *   Adjusted index\n+ *\n+ * Returns:\n+ *     0          - Success\n+ *   - EOPNOTSUPP - Operation not supported\n+ */\n+static int\n+tf_rm_adjust_index(struct tf_rm_element *db,\n+\t\t   enum tf_rm_adjust_type action,\n+\t\t   uint32_t db_index,\n+\t\t   uint32_t index,\n+\t\t   uint32_t *adj_index)\n+{\n+\tint rc = 0;\n+\tuint32_t base_index;\n+\n+\tbase_index = db[db_index].alloc.entry.start;\n+\n+\tswitch (action) {\n+\tcase TF_RM_ADJUST_RM_BASE:\n+\t\t*adj_index = index - base_index;\n+\t\tbreak;\n+\tcase TF_RM_ADJUST_ADD_BASE:\n+\t\t*adj_index = index + base_index;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\treturn rc;\n+}\n+\n int\n-tf_rm_create_db(struct tf *tfp __rte_unused,\n-\t\tstruct tf_rm_create_db_parms *parms __rte_unused)\n+tf_rm_create_db(struct tf *tfp,\n+\t\tstruct tf_rm_create_db_parms *parms)\n {\n+\tint rc;\n+\tint i;\n+\tstruct tf_session *tfs;\n+\tstruct tf_dev_info *dev;\n+\tuint16_t max_types;\n+\tstruct tfp_calloc_parms cparms;\n+\tstruct tf_rm_resc_req_entry *query;\n+\tenum tf_rm_resc_resv_strategy resv_strategy;\n+\tstruct tf_rm_resc_req_entry *req;\n+\tstruct tf_rm_resc_entry *resv;\n+\tstruct tf_rm_new_db *rm_db;\n+\tstruct tf_rm_element *db;\n+\tuint32_t pool_size;\n+\n+\t/* Retrieve the session information */\n+\trc = tf_session_get_session(tfp, &tfs);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Retrieve device information */\n+\trc = tf_session_get_device(tfs, &dev);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Need device max number of elements for the RM QCAPS */\n+\trc = dev->ops->tf_dev_get_max_types(tfp, &max_types);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tcparms.nitems = max_types;\n+\tcparms.size = sizeof(struct tf_rm_resc_req_entry);\n+\tcparms.alignment = 0;\n+\trc = tfp_calloc(&cparms);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tquery = (struct tf_rm_resc_req_entry *)cparms.mem_va;\n+\n+\t/* Get Firmware Capabilities */\n+\trc = tf_msg_session_resc_qcaps(tfp,\n+\t\t\t\t       parms->dir,\n+\t\t\t\t       max_types,\n+\t\t\t\t       query,\n+\t\t\t\t       &resv_strategy);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Process capabilities against db requirements */\n+\n+\t/* Alloc request, alignment already set */\n+\tcparms.nitems = parms->num_elements;\n+\tcparms.size = sizeof(struct tf_rm_resc_req_entry);\n+\trc = tfp_calloc(&cparms);\n+\tif (rc)\n+\t\treturn rc;\n+\treq = (struct tf_rm_resc_req_entry *)cparms.mem_va;\n+\n+\t/* Alloc reservation, alignment and nitems already set */\n+\tcparms.size = sizeof(struct tf_rm_resc_entry);\n+\trc = tfp_calloc(&cparms);\n+\tif (rc)\n+\t\treturn rc;\n+\tresv = (struct tf_rm_resc_entry *)cparms.mem_va;\n+\n+\t/* Build the request */\n+\tfor (i = 0; i < parms->num_elements; i++) {\n+\t\t/* Skip any non HCAPI cfg elements */\n+\t\tif (parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI) {\n+\t\t\treq[i].type = parms->cfg[i].hcapi_type;\n+\t\t\t/* Check that we can get the full amount allocated */\n+\t\t\tif (parms->alloc_num[i] <=\n+\t\t\t    query[parms->cfg[i].hcapi_type].max) {\n+\t\t\t\treq[i].min = parms->alloc_num[i];\n+\t\t\t\treq[i].max = parms->alloc_num[i];\n+\t\t\t} else {\n+\t\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t\t    \"%s: Resource failure, type:%d\\n\",\n+\t\t\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t\t\t    parms->cfg[i].hcapi_type);\n+\t\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t\t\"req:%d, avail:%d\\n\",\n+\t\t\t\t\tparms->alloc_num[i],\n+\t\t\t\t\tquery[parms->cfg[i].hcapi_type].max);\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t} else {\n+\t\t\t/* Skip the element */\n+\t\t\treq[i].type = CFA_RESOURCE_TYPE_INVALID;\n+\t\t}\n+\t}\n+\n+\trc = tf_msg_session_resc_alloc(tfp,\n+\t\t\t\t       parms->dir,\n+\t\t\t\t       parms->num_elements,\n+\t\t\t\t       req,\n+\t\t\t\t       resv);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Build the RM DB per the request */\n+\tcparms.nitems = 1;\n+\tcparms.size = sizeof(struct tf_rm_new_db);\n+\trc = tfp_calloc(&cparms);\n+\tif (rc)\n+\t\treturn rc;\n+\trm_db = (void *)cparms.mem_va;\n+\n+\t/* Build the DB within RM DB */\n+\tcparms.nitems = parms->num_elements;\n+\tcparms.size = sizeof(struct tf_rm_element);\n+\trc = tfp_calloc(&cparms);\n+\tif (rc)\n+\t\treturn rc;\n+\trm_db->db = (struct tf_rm_element *)cparms.mem_va;\n+\n+\tdb = rm_db->db;\n+\tfor (i = 0; i < parms->num_elements; i++) {\n+\t\t/* If allocation failed for a single entry the DB\n+\t\t * creation is considered a failure.\n+\t\t */\n+\t\tif (parms->alloc_num[i] != resv[i].stride) {\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s: Alloc failed, type:%d\\n\",\n+\t\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t\t    i);\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"req:%d, alloc:%d\\n\",\n+\t\t\t\t    parms->alloc_num[i],\n+\t\t\t\t    resv[i].stride);\n+\t\t\tgoto fail;\n+\t\t}\n+\n+\t\tdb[i].cfg_type = parms->cfg[i].cfg_type;\n+\t\tdb[i].hcapi_type = parms->cfg[i].hcapi_type;\n+\t\tdb[i].alloc.entry.start = resv[i].start;\n+\t\tdb[i].alloc.entry.stride = resv[i].stride;\n+\n+\t\t/* Create pool */\n+\t\tpool_size = (BITALLOC_SIZEOF(resv[i].stride) /\n+\t\t\t     sizeof(struct bitalloc));\n+\t\t/* Alloc request, alignment already set */\n+\t\tcparms.nitems = pool_size;\n+\t\tcparms.size = sizeof(struct bitalloc);\n+\t\trc = tfp_calloc(&cparms);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t\tdb[i].pool = (struct bitalloc *)cparms.mem_va;\n+\t}\n+\n+\trm_db->num_entries = i;\n+\trm_db->dir = parms->dir;\n+\tparms->rm_db = (void *)rm_db;\n+\n+\ttfp_free((void *)req);\n+\ttfp_free((void *)resv);\n+\n \treturn 0;\n+\n+ fail:\n+\ttfp_free((void *)req);\n+\ttfp_free((void *)resv);\n+\ttfp_free((void *)db->pool);\n+\ttfp_free((void *)db);\n+\ttfp_free((void *)rm_db);\n+\tparms->rm_db = NULL;\n+\n+\treturn -EINVAL;\n }\n \n int\n tf_rm_free_db(struct tf *tfp __rte_unused,\n-\t      struct tf_rm_free_db_parms *parms __rte_unused)\n+\t      struct tf_rm_free_db_parms *parms)\n {\n-\treturn 0;\n+\tint rc = 0;\n+\tint i;\n+\tstruct tf_rm_new_db *rm_db;\n+\n+\t/* Traverse the DB and clear each pool.\n+\t * NOTE:\n+\t *   Firmware is not cleared. It will be cleared on close only.\n+\t */\n+\trm_db = (struct tf_rm_new_db *)parms->rm_db;\n+\tfor (i = 0; i < rm_db->num_entries; i++)\n+\t\ttfp_free((void *)rm_db->db->pool);\n+\n+\ttfp_free((void *)parms->rm_db);\n+\n+\treturn rc;\n }\n \n int\n-tf_rm_allocate(struct tf_rm_allocate_parms *parms __rte_unused)\n+tf_rm_allocate(struct tf_rm_allocate_parms *parms)\n {\n-\treturn 0;\n+\tint rc = 0;\n+\tint id;\n+\tstruct tf_rm_new_db *rm_db;\n+\tenum tf_rm_elem_cfg_type cfg_type;\n+\n+\tif (parms == NULL || parms->rm_db == NULL)\n+\t\treturn -EINVAL;\n+\n+\trm_db = (struct tf_rm_new_db *)parms->rm_db;\n+\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\n+\t/* Bail out if not controlled by RM */\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n+\t    cfg_type != TF_RM_ELEM_CFG_PRIVATE)\n+\t\treturn -ENOTSUP;\n+\n+\tid = ba_alloc(rm_db->db[parms->db_index].pool);\n+\tif (id == BA_FAIL) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Allocation failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(rm_db->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\t/* Adjust for any non zero start value */\n+\trc = tf_rm_adjust_index(rm_db->db,\n+\t\t\t\tTF_RM_ADJUST_ADD_BASE,\n+\t\t\t\tparms->db_index,\n+\t\t\t\tid,\n+\t\t\t\tparms->index);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Alloc adjust of base index failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(rm_db->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn -1;\n+\t}\n+\n+\treturn rc;\n }\n \n int\n-tf_rm_free(struct tf_rm_free_parms *parms __rte_unused)\n+tf_rm_free(struct tf_rm_free_parms *parms)\n {\n-\treturn 0;\n+\tint rc = 0;\n+\tuint32_t adj_index;\n+\tstruct tf_rm_new_db *rm_db;\n+\tenum tf_rm_elem_cfg_type cfg_type;\n+\n+\tif (parms == NULL || parms->rm_db == NULL)\n+\t\treturn -EINVAL;\n+\n+\trm_db = (struct tf_rm_new_db *)parms->rm_db;\n+\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\n+\t/* Bail out if not controlled by RM */\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n+\t    cfg_type != TF_RM_ELEM_CFG_PRIVATE)\n+\t\treturn -ENOTSUP;\n+\n+\t/* Adjust for any non zero start value */\n+\trc = tf_rm_adjust_index(rm_db->db,\n+\t\t\t\tTF_RM_ADJUST_RM_BASE,\n+\t\t\t\tparms->db_index,\n+\t\t\t\tparms->index,\n+\t\t\t\t&adj_index);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\trc = ba_free(rm_db->db[parms->db_index].pool, adj_index);\n+\t/* No logging direction matters and that is not available here */\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treturn rc;\n }\n \n int\n-tf_rm_is_allocated(struct tf_rm_is_allocated_parms *parms __rte_unused)\n+tf_rm_is_allocated(struct tf_rm_is_allocated_parms *parms)\n {\n-\treturn 0;\n+\tint rc = 0;\n+\tuint32_t adj_index;\n+\tstruct tf_rm_new_db *rm_db;\n+\tenum tf_rm_elem_cfg_type cfg_type;\n+\n+\tif (parms == NULL || parms->rm_db == NULL)\n+\t\treturn -EINVAL;\n+\n+\trm_db = (struct tf_rm_new_db *)parms->rm_db;\n+\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\n+\t/* Bail out if not controlled by RM */\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n+\t    cfg_type != TF_RM_ELEM_CFG_PRIVATE)\n+\t\treturn -ENOTSUP;\n+\n+\t/* Adjust for any non zero start value */\n+\trc = tf_rm_adjust_index(rm_db->db,\n+\t\t\t\tTF_RM_ADJUST_RM_BASE,\n+\t\t\t\tparms->db_index,\n+\t\t\t\tparms->index,\n+\t\t\t\t&adj_index);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t*parms->allocated = ba_inuse(rm_db->db[parms->db_index].pool,\n+\t\t\t\t     adj_index);\n+\n+\treturn rc;\n }\n \n int\n-tf_rm_get_info(struct tf_rm_get_alloc_info_parms *parms __rte_unused)\n+tf_rm_get_info(struct tf_rm_get_alloc_info_parms *parms)\n {\n-\treturn 0;\n+\tint rc = 0;\n+\tstruct tf_rm_new_db *rm_db;\n+\tenum tf_rm_elem_cfg_type cfg_type;\n+\n+\tif (parms == NULL || parms->rm_db == NULL)\n+\t\treturn -EINVAL;\n+\n+\trm_db = (struct tf_rm_new_db *)parms->rm_db;\n+\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\n+\t/* Bail out if not controlled by RM */\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n+\t    cfg_type != TF_RM_ELEM_CFG_PRIVATE)\n+\t\treturn -ENOTSUP;\n+\n+\tparms->info = &rm_db->db[parms->db_index].alloc;\n+\n+\treturn rc;\n }\n \n int\n-tf_rm_get_hcapi_type(struct tf_rm_get_hcapi_parms *parms __rte_unused)\n+tf_rm_get_hcapi_type(struct tf_rm_get_hcapi_parms *parms)\n {\n-\treturn 0;\n+\tint rc = 0;\n+\tstruct tf_rm_new_db *rm_db;\n+\tenum tf_rm_elem_cfg_type cfg_type;\n+\n+\tif (parms == NULL || parms->rm_db == NULL)\n+\t\treturn -EINVAL;\n+\n+\trm_db = (struct tf_rm_new_db *)parms->rm_db;\n+\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\n+\t/* Bail out if not controlled by RM */\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n+\t    cfg_type != TF_RM_ELEM_CFG_PRIVATE)\n+\t\treturn -ENOTSUP;\n+\n+\t*parms->hcapi_type = rm_db->db[parms->db_index].hcapi_type;\n+\n+\treturn rc;\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_rm_new.h b/drivers/net/bnxt/tf_core/tf_rm_new.h\nindex 72dba09..6d8234d 100644\n--- a/drivers/net/bnxt/tf_core/tf_rm_new.h\n+++ b/drivers/net/bnxt/tf_core/tf_rm_new.h\n@@ -3,8 +3,8 @@\n  * All rights reserved.\n  */\n \n-#ifndef TF_RM_H_\n-#define TF_RM_H_\n+#ifndef TF_RM_NEW_H_\n+#define TF_RM_NEW_H_\n \n #include \"tf_core.h\"\n #include \"bitalloc.h\"\n@@ -32,13 +32,16 @@ struct tf;\n  * MAX pool size of the Chip œneeds to be added to the tf_rm_elem_info\n  * structure and several new APIs would need to be added to allow for\n  * growth of a single TF resource type.\n+ *\n+ * The access functions does not check for NULL pointers as it's a\n+ * support module, not called directly.\n  */\n \n /**\n  * Resource reservation single entry result. Used when accessing HCAPI\n  * RM on the firmware.\n  */\n-struct tf_rm_entry {\n+struct tf_rm_new_entry {\n \t/** Starting index of the allocated resource */\n \tuint16_t start;\n \t/** Number of allocated elements */\n@@ -52,13 +55,33 @@ struct tf_rm_entry {\n  * ULP layer that is not controlled by HCAPI within the Firmware.\n  */\n enum tf_rm_elem_cfg_type {\n-\tTF_RM_ELEM_CFG_NULL,    /**< No configuration */\n-\tTF_RM_ELEM_CFG_HCAPI,   /**< HCAPI 'controlled' */\n-\tTF_RM_ELEM_CFG_PRIVATE, /**< Private thus not HCAPI 'controlled' */\n+\t/** No configuration */\n+\tTF_RM_ELEM_CFG_NULL,\n+\t/** HCAPI 'controlled' */\n+\tTF_RM_ELEM_CFG_HCAPI,\n+\t/** Private thus not HCAPI 'controlled' */\n+\tTF_RM_ELEM_CFG_PRIVATE,\n+\t/**\n+\t * Shared element thus it belongs to a shared FW Session and\n+\t * is not controlled by the Host.\n+\t */\n+\tTF_RM_ELEM_CFG_SHARED,\n \tTF_RM_TYPE_MAX\n };\n \n /**\n+ * RM Reservation strategy enumeration. Type of strategy comes from\n+ * the HCAPI RM QCAPS handshake.\n+ */\n+enum tf_rm_resc_resv_strategy {\n+\tTF_RM_RESC_RESV_STATIC_PARTITION,\n+\tTF_RM_RESC_RESV_STRATEGY_1,\n+\tTF_RM_RESC_RESV_STRATEGY_2,\n+\tTF_RM_RESC_RESV_STRATEGY_3,\n+\tTF_RM_RESC_RESV_MAX\n+};\n+\n+/**\n  * RM Element configuration structure, used by the Device to configure\n  * how an individual TF type is configured in regard to the HCAPI RM\n  * of same type.\n@@ -68,7 +91,7 @@ struct tf_rm_element_cfg {\n \t * RM Element config controls how the DB for that element is\n \t * processed.\n \t */\n-\tenum tf_rm_elem_cfg_type cfg;\n+\tenum tf_rm_elem_cfg_type cfg_type;\n \n \t/* If a HCAPI to TF type conversion is required then TF type\n \t * can be added here.\n@@ -92,7 +115,7 @@ struct tf_rm_alloc_info {\n \t * In case of dynamic allocation support this would have\n \t * to be changed to linked list of tf_rm_entry instead.\n \t */\n-\tstruct tf_rm_entry entry;\n+\tstruct tf_rm_new_entry entry;\n };\n \n /**\n@@ -104,17 +127,21 @@ struct tf_rm_create_db_parms {\n \t */\n \tenum tf_dir dir;\n \t/**\n-\t * [in] Number of elements in the parameter structure\n+\t * [in] Number of elements.\n \t */\n \tuint16_t num_elements;\n \t/**\n-\t * [in] Parameter structure\n+\t * [in] Parameter structure array. Array size is num_elements.\n+\t */\n+\tstruct tf_rm_element_cfg *cfg;\n+\t/**\n+\t * Allocation number array. Array size is num_elements.\n \t */\n-\tstruct tf_rm_element_cfg *parms;\n+\tuint16_t *alloc_num;\n \t/**\n \t * [out] RM DB Handle\n \t */\n-\tvoid *tf_rm_db;\n+\tvoid *rm_db;\n };\n \n /**\n@@ -128,7 +155,7 @@ struct tf_rm_free_db_parms {\n \t/**\n \t * [in] RM DB Handle\n \t */\n-\tvoid *tf_rm_db;\n+\tvoid *rm_db;\n };\n \n /**\n@@ -138,7 +165,7 @@ struct tf_rm_allocate_parms {\n \t/**\n \t * [in] RM DB Handle\n \t */\n-\tvoid *tf_rm_db;\n+\tvoid *rm_db;\n \t/**\n \t * [in] DB Index, indicates which DB entry to perform the\n \t * action on.\n@@ -159,7 +186,7 @@ struct tf_rm_free_parms {\n \t/**\n \t * [in] RM DB Handle\n \t */\n-\tvoid *tf_rm_db;\n+\tvoid *rm_db;\n \t/**\n \t * [in] DB Index, indicates which DB entry to perform the\n \t * action on.\n@@ -168,7 +195,7 @@ struct tf_rm_free_parms {\n \t/**\n \t * [in] Index to free\n \t */\n-\tuint32_t index;\n+\tuint16_t index;\n };\n \n /**\n@@ -178,7 +205,7 @@ struct tf_rm_is_allocated_parms {\n \t/**\n \t * [in] RM DB Handle\n \t */\n-\tvoid *tf_rm_db;\n+\tvoid *rm_db;\n \t/**\n \t * [in] DB Index, indicates which DB entry to perform the\n \t * action on.\n@@ -191,7 +218,7 @@ struct tf_rm_is_allocated_parms {\n \t/**\n \t * [in] Pointer to flag that indicates the state of the query\n \t */\n-\tuint8_t *allocated;\n+\tint *allocated;\n };\n \n /**\n@@ -201,7 +228,7 @@ struct tf_rm_get_alloc_info_parms {\n \t/**\n \t * [in] RM DB Handle\n \t */\n-\tvoid *tf_rm_db;\n+\tvoid *rm_db;\n \t/**\n \t * [in] DB Index, indicates which DB entry to perform the\n \t * action on.\n@@ -221,7 +248,7 @@ struct tf_rm_get_hcapi_parms {\n \t/**\n \t * [in] RM DB Handle\n \t */\n-\tvoid *tf_rm_db;\n+\tvoid *rm_db;\n \t/**\n \t * [in] DB Index, indicates which DB entry to perform the\n \t * action on.\n@@ -306,6 +333,7 @@ int tf_rm_free_db(struct tf *tfp,\n  * Returns\n  *   - (0) if successful.\n  *   - (-EINVAL) on failure.\n+ *   - (-ENOMEM) if pool is empty\n  */\n int tf_rm_allocate(struct tf_rm_allocate_parms *parms);\n \n@@ -317,7 +345,7 @@ int tf_rm_allocate(struct tf_rm_allocate_parms *parms);\n  *\n  * Returns\n  *   - (0) if successful.\n- *   - (-EpINVAL) on failure.\n+ *   - (-EINVAL) on failure.\n  */\n int tf_rm_free(struct tf_rm_free_parms *parms);\n \n@@ -365,4 +393,4 @@ int tf_rm_get_info(struct tf_rm_get_alloc_info_parms *parms);\n  */\n int tf_rm_get_hcapi_type(struct tf_rm_get_hcapi_parms *parms);\n \n-#endif /* TF_RM_H_ */\n+#endif /* TF_RM_NEW_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_session.c b/drivers/net/bnxt/tf_core/tf_session.c\nindex c749945..2f769d8 100644\n--- a/drivers/net/bnxt/tf_core/tf_session.c\n+++ b/drivers/net/bnxt/tf_core/tf_session.c\n@@ -3,29 +3,293 @@\n  * All rights reserved.\n  */\n \n+#include <string.h>\n+\n+#include <rte_common.h>\n+\n+#include \"tf_session.h\"\n+#include \"tf_common.h\"\n+#include \"tf_msg.h\"\n+#include \"tfp.h\"\n+\n+int\n+tf_session_open_session(struct tf *tfp,\n+\t\t\tstruct tf_session_open_session_parms *parms)\n+{\n+\tint rc;\n+\tstruct tf_session *session;\n+\tstruct tfp_calloc_parms cparms;\n+\tuint8_t fw_session_id;\n+\tunion tf_session_id *session_id;\n+\n+\tTF_CHECK_PARMS2(tfp, parms);\n+\n+\t/* Open FW session and get a new session_id */\n+\trc = tf_msg_session_open(tfp,\n+\t\t\t\t parms->open_cfg->ctrl_chan_name,\n+\t\t\t\t &fw_session_id);\n+\tif (rc) {\n+\t\t/* Log error */\n+\t\tif (rc == -EEXIST)\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"Session is already open, rc:%s\\n\",\n+\t\t\t\t    strerror(-rc));\n+\t\telse\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"Open message send failed, rc:%s\\n\",\n+\t\t\t\t    strerror(-rc));\n+\n+\t\tparms->open_cfg->session_id.id = TF_FW_SESSION_ID_INVALID;\n+\t\treturn rc;\n+\t}\n+\n+\t/* Allocate session */\n+\tcparms.nitems = 1;\n+\tcparms.size = sizeof(struct tf_session_info);\n+\tcparms.alignment = 0;\n+\trc = tfp_calloc(&cparms);\n+\tif (rc) {\n+\t\t/* Log error */\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to allocate session info, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\tgoto cleanup;\n+\t}\n+\ttfp->session = (struct tf_session_info *)cparms.mem_va;\n+\n+\t/* Allocate core data for the session */\n+\tcparms.nitems = 1;\n+\tcparms.size = sizeof(struct tf_session);\n+\tcparms.alignment = 0;\n+\trc = tfp_calloc(&cparms);\n+\tif (rc) {\n+\t\t/* Log error */\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to allocate session data, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\tgoto cleanup;\n+\t}\n+\ttfp->session->core_data = cparms.mem_va;\n+\n+\t/* Initialize Session and Device */\n+\tsession = (struct tf_session *)tfp->session->core_data;\n+\tsession->ver.major = 0;\n+\tsession->ver.minor = 0;\n+\tsession->ver.update = 0;\n+\n+\tsession_id = &parms->open_cfg->session_id;\n+\tsession->session_id.internal.domain = session_id->internal.domain;\n+\tsession->session_id.internal.bus = session_id->internal.bus;\n+\tsession->session_id.internal.device = session_id->internal.device;\n+\tsession->session_id.internal.fw_session_id = fw_session_id;\n+\t/* Return the allocated fw session id */\n+\tsession_id->internal.fw_session_id = fw_session_id;\n+\n+\tsession->shadow_copy = parms->open_cfg->shadow_copy;\n+\n+\ttfp_memcpy(session->ctrl_chan_name,\n+\t\t   parms->open_cfg->ctrl_chan_name,\n+\t\t   TF_SESSION_NAME_MAX);\n+\n+\trc = dev_bind(tfp,\n+\t\t      parms->open_cfg->device_type,\n+\t\t      session->shadow_copy,\n+\t\t      &parms->open_cfg->resources,\n+\t\t      session->dev);\n+\t/* Logging handled by dev_bind */\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Query for Session Config\n+\t */\n+\trc = tf_msg_session_qcfg(tfp);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Query config message send failed, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\tgoto cleanup_close;\n+\t}\n+\n+\tsession->ref_count++;\n+\n+\treturn 0;\n+\n+ cleanup:\n+\ttfp_free(tfp->session->core_data);\n+\ttfp_free(tfp->session);\n+\ttfp->session = NULL;\n+\treturn rc;\n+\n+ cleanup_close:\n+\ttf_close_session(tfp);\n+\treturn -EINVAL;\n+}\n+\n+int\n+tf_session_attach_session(struct tf *tfp __rte_unused,\n+\t\t\t  struct tf_session_attach_session_parms *parms __rte_unused)\n+{\n+#if 0\n+\n+\t/* A shared session is similar to single session. It consists\n+\t * of two parts the tf_session_info element which remains\n+\t * private to the caller and the session within this element\n+\t * which is shared. The session it self holds the dynamic\n+\t * data, i.e. the device and its sub modules.\n+\t *\n+\t * Firmware side is updated about any sharing as well.\n+\t */\n+\n+\t/* - Open the shared memory for the attach_chan_name\n+\t * - Point to the shared session for this Device instance\n+\t * - Check that session is valid\n+\t * - Attach to the firmware so it can record there is more\n+\t *   than one client of the session.\n+\t */\n+\n+\tif (tfp->session->session_id.id != TF_SESSION_ID_INVALID) {\n+\t\trc = tf_msg_session_attach(tfp,\n+\t\t\t\t\t   parms->ctrl_chan_name,\n+\t\t\t\t\t   parms->session_id);\n+\t}\n+#endif /* 0 */\n+\tint rc = -EOPNOTSUPP;\n+\n+\tTF_CHECK_PARMS2(tfp, parms);\n+\n+\tTFP_DRV_LOG(ERR,\n+\t\t    \"Attach not yet supported, rc:%s\\n\",\n+\t\t    strerror(-rc));\n+\treturn rc;\n+}\n+\n+int\n+tf_session_close_session(struct tf *tfp,\n+\t\t\t struct tf_session_close_session_parms *parms)\n+{\n+\tint rc;\n+\tstruct tf_session *tfs;\n+\tstruct tf_dev_info *tfd;\n+\n+\tTF_CHECK_PARMS2(tfp, parms);\n+\n+\trc = tf_session_get_session(tfp, &tfs);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Session lookup failed, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\tif (tfs->session_id.id == TF_SESSION_ID_INVALID) {\n+\t\trc = -EINVAL;\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Invalid session id, unable to close, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\t/* Record the session we're closing so the caller knows the\n+\t * details.\n+\t */\n+\t*parms->session_id = tfs->session_id;\n+\n+\trc = tf_session_get_device(tfs, &tfd);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Device lookup failed, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\t/* In case we're attached only the session client gets closed */\n+\trc = tf_msg_session_close(tfp);\n+\tif (rc) {\n+\t\t/* Log error */\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"FW Session close failed, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t}\n+\n+\ttfs->ref_count--;\n+\n+\t/* Final cleanup as we're last user of the session */\n+\tif (tfs->ref_count == 0) {\n+\t\t/* Unbind the device */\n+\t\trc = dev_unbind(tfp, tfd);\n+\t\tif (rc) {\n+\t\t\t/* Log error */\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"Device unbind failed, rc:%s\\n\",\n+\t\t\t\t    strerror(-rc));\n+\t\t}\n+\n+\t\ttfp_free(tfp->session->core_data);\n+\t\ttfp_free(tfp->session);\n+\t\ttfp->session = NULL;\n+\t}\n+\n+\treturn 0;\n+}\n+\n int\n tf_session_get_session(struct tf *tfp,\n-\t\t       struct tf_session *tfs)\n+\t\t       struct tf_session **tfs)\n {\n+\tint rc;\n+\n \tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tTFP_DRV_LOG(ERR, \"Session not created\\n\");\n-\t\treturn -EINVAL;\n+\t\trc = -EINVAL;\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Session not created, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n \t}\n \n-\ttfs = (struct tf_session *)(tfp->session->core_data);\n+\t*tfs = (struct tf_session *)(tfp->session->core_data);\n \n \treturn 0;\n }\n \n int\n tf_session_get_device(struct tf_session *tfs,\n-\t\t      struct tf_device *tfd)\n+\t\t      struct tf_dev_info **tfd)\n {\n+\tint rc;\n+\n \tif (tfs->dev == NULL) {\n-\t\tTFP_DRV_LOG(ERR, \"Device not created\\n\");\n-\t\treturn -EINVAL;\n+\t\trc = -EINVAL;\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Device not created, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n \t}\n-\ttfd = tfs->dev;\n+\n+\t*tfd = tfs->dev;\n+\n+\treturn 0;\n+}\n+\n+int\n+tf_session_get_fw_session_id(struct tf *tfp,\n+\t\t\t     uint8_t *fw_session_id)\n+{\n+\tint rc;\n+\tstruct tf_session *tfs;\n+\n+\tif (tfp->session == NULL) {\n+\t\trc = -EINVAL;\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Session not created, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\trc = tf_session_get_session(tfp, &tfs);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t*fw_session_id = tfs->session_id.internal.fw_session_id;\n \n \treturn 0;\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_session.h b/drivers/net/bnxt/tf_core/tf_session.h\nindex b1cc7a4..9279251 100644\n--- a/drivers/net/bnxt/tf_core/tf_session.h\n+++ b/drivers/net/bnxt/tf_core/tf_session.h\n@@ -63,12 +63,7 @@ struct tf_session {\n \t */\n \tstruct tf_session_version ver;\n \n-\t/** Device type, provided by tf_open_session().\n-\t */\n-\tenum tf_device_type device_type;\n-\n-\t/** Session ID, allocated by FW on tf_open_session().\n-\t */\n+\t/** Session ID, allocated by FW on tf_open_session() */\n \tunion tf_session_id session_id;\n \n \t/**\n@@ -101,7 +96,7 @@ struct tf_session {\n \t */\n \tuint8_t ref_count;\n \n-\t/** Device */\n+\t/** Device handle */\n \tstruct tf_dev_info *dev;\n \n \t/** Session HW and SRAM resources */\n@@ -324,12 +319,96 @@ struct tf_session {\n };\n \n /**\n+ * Session open parameter definition\n+ */\n+struct tf_session_open_session_parms {\n+\t/**\n+\t * [in] Pointer to the TF open session configuration\n+\t */\n+\tstruct tf_open_session_parms *open_cfg;\n+};\n+\n+/**\n+ * Session attach parameter definition\n+ */\n+struct tf_session_attach_session_parms {\n+\t/**\n+\t * [in] Pointer to the TF attach session configuration\n+\t */\n+\tstruct tf_attach_session_parms *attach_cfg;\n+};\n+\n+/**\n+ * Session close parameter definition\n+ */\n+struct tf_session_close_session_parms {\n+\tuint8_t *ref_count;\n+\tunion tf_session_id *session_id;\n+};\n+\n+/**\n  * @page session Session Management\n  *\n+ * @ref tf_session_open_session\n+ *\n+ * @ref tf_session_attach_session\n+ *\n+ * @ref tf_session_close_session\n+ *\n  * @ref tf_session_get_session\n  *\n  * @ref tf_session_get_device\n+ *\n+ * @ref tf_session_get_fw_session_id\n+ */\n+\n+/**\n+ * Creates a host session with a corresponding firmware session.\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [in] parms\n+ *   Pointer to the session open parameters\n+ *\n+ * Returns\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on failure.\n  */\n+int tf_session_open_session(struct tf *tfp,\n+\t\t\t    struct tf_session_open_session_parms *parms);\n+\n+/**\n+ * Attaches a previous created session.\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [in] parms\n+ *   Pointer to the session attach parameters\n+ *\n+ * Returns\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on failure.\n+ */\n+int tf_session_attach_session(struct tf *tfp,\n+\t\t\t      struct tf_session_attach_session_parms *parms);\n+\n+/**\n+ * Closes a previous created session.\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [in/out] parms\n+ *   Pointer to the session close parameters.\n+ *\n+ * Returns\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on failure.\n+ */\n+int tf_session_close_session(struct tf *tfp,\n+\t\t\t     struct tf_session_close_session_parms *parms);\n \n /**\n  * Looks up the private session information from the TF session info.\n@@ -338,14 +417,14 @@ struct tf_session {\n  *   Pointer to TF handle\n  *\n  * [out] tfs\n- *   Pointer to the session\n+ *   Pointer pointer to the session\n  *\n  * Returns\n  *   - (0) if successful.\n  *   - (-EINVAL) on failure.\n  */\n int tf_session_get_session(struct tf *tfp,\n-\t\t\t   struct tf_session *tfs);\n+\t\t\t   struct tf_session **tfs);\n \n /**\n  * Looks up the device information from the TF Session.\n@@ -354,13 +433,30 @@ int tf_session_get_session(struct tf *tfp,\n  *   Pointer to TF handle\n  *\n  * [out] tfd\n- *   Pointer to the device\n+ *   Pointer pointer to the device\n  *\n  * Returns\n  *   - (0) if successful.\n  *   - (-EINVAL) on failure.\n  */\n int tf_session_get_device(struct tf_session *tfs,\n-\t\t\t  struct tf_dev_info *tfd);\n+\t\t\t  struct tf_dev_info **tfd);\n+\n+/**\n+ * Looks up the FW session id of the firmware connection for the\n+ * requested TF handle.\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [out] session_id\n+ *   Pointer to the session_id\n+ *\n+ * Returns\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on failure.\n+ */\n+int tf_session_get_fw_session_id(struct tf *tfp,\n+\t\t\t\t uint8_t *fw_session_id);\n \n #endif /* _TF_SESSION_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_tbl.h b/drivers/net/bnxt/tf_core/tf_tbl.h\nindex 6cda487..b335a9c 100644\n--- a/drivers/net/bnxt/tf_core/tf_tbl.h\n+++ b/drivers/net/bnxt/tf_core/tf_tbl.h\n@@ -7,8 +7,12 @@\n #define _TF_TBL_H_\n \n #include <stdint.h>\n+\n+#include \"tf_core.h\"\n #include \"stack.h\"\n \n+struct tf_session;\n+\n enum tf_pg_tbl_lvl {\n \tPT_LVL_0,\n \tPT_LVL_1,\ndiff --git a/drivers/net/bnxt/tf_core/tf_tbl_type.c b/drivers/net/bnxt/tf_core/tf_tbl_type.c\nindex a57a5dd..b79706f 100644\n--- a/drivers/net/bnxt/tf_core/tf_tbl_type.c\n+++ b/drivers/net/bnxt/tf_core/tf_tbl_type.c\n@@ -10,12 +10,12 @@\n struct tf;\n \n /**\n- * Table Type DBs.\n+ * Table DBs.\n  */\n /* static void *tbl_db[TF_DIR_MAX]; */\n \n /**\n- * Table Type Shadow DBs\n+ * Table Shadow DBs\n  */\n /* static void *shadow_tbl_db[TF_DIR_MAX]; */\n \n@@ -30,49 +30,49 @@ struct tf;\n /* static uint8_t shadow_init; */\n \n int\n-tf_tbl_type_bind(struct tf *tfp __rte_unused,\n-\t\t struct tf_tbl_type_cfg_parms *parms __rte_unused)\n+tf_tbl_bind(struct tf *tfp __rte_unused,\n+\t    struct tf_tbl_cfg_parms *parms __rte_unused)\n {\n \treturn 0;\n }\n \n int\n-tf_tbl_type_unbind(struct tf *tfp __rte_unused)\n+tf_tbl_unbind(struct tf *tfp __rte_unused)\n {\n \treturn 0;\n }\n \n int\n-tf_tbl_type_alloc(struct tf *tfp __rte_unused,\n-\t\t  struct tf_tbl_type_alloc_parms *parms __rte_unused)\n+tf_tbl_alloc(struct tf *tfp __rte_unused,\n+\t     struct tf_tbl_alloc_parms *parms __rte_unused)\n {\n \treturn 0;\n }\n \n int\n-tf_tbl_type_free(struct tf *tfp __rte_unused,\n-\t\t struct tf_tbl_type_free_parms *parms __rte_unused)\n+tf_tbl_free(struct tf *tfp __rte_unused,\n+\t    struct tf_tbl_free_parms *parms __rte_unused)\n {\n \treturn 0;\n }\n \n int\n-tf_tbl_type_alloc_search(struct tf *tfp __rte_unused,\n-\t\t\t struct tf_tbl_type_alloc_search_parms *parms __rte_unused)\n+tf_tbl_alloc_search(struct tf *tfp __rte_unused,\n+\t\t    struct tf_tbl_alloc_search_parms *parms __rte_unused)\n {\n \treturn 0;\n }\n \n int\n-tf_tbl_type_set(struct tf *tfp __rte_unused,\n-\t\tstruct tf_tbl_type_set_parms *parms __rte_unused)\n+tf_tbl_set(struct tf *tfp __rte_unused,\n+\t   struct tf_tbl_set_parms *parms __rte_unused)\n {\n \treturn 0;\n }\n \n int\n-tf_tbl_type_get(struct tf *tfp __rte_unused,\n-\t\tstruct tf_tbl_type_get_parms *parms __rte_unused)\n+tf_tbl_get(struct tf *tfp __rte_unused,\n+\t   struct tf_tbl_get_parms *parms __rte_unused)\n {\n \treturn 0;\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_tbl_type.h b/drivers/net/bnxt/tf_core/tf_tbl_type.h\nindex c880b36..11f2aa3 100644\n--- a/drivers/net/bnxt/tf_core/tf_tbl_type.h\n+++ b/drivers/net/bnxt/tf_core/tf_tbl_type.h\n@@ -11,33 +11,39 @@\n struct tf;\n \n /**\n- * The Table Type module provides processing of Internal TF table types.\n+ * The Table module provides processing of Internal TF table types.\n  */\n \n /**\n- * Table Type configuration parameters\n+ * Table configuration parameters\n  */\n-struct tf_tbl_type_cfg_parms {\n+struct tf_tbl_cfg_parms {\n \t/**\n \t * Number of table types in each of the configuration arrays\n \t */\n \tuint16_t num_elements;\n-\n \t/**\n \t * Table Type element configuration array\n \t */\n-\tstruct tf_rm_element_cfg *tbl_cfg[TF_DIR_MAX];\n-\n+\tstruct tf_rm_element_cfg *cfg;\n \t/**\n \t * Shadow table type configuration array\n \t */\n-\tstruct tf_shadow_tbl_type_cfg *tbl_shadow_cfg[TF_DIR_MAX];\n+\tstruct tf_shadow_tbl_cfg *shadow_cfg;\n+\t/**\n+\t * Boolean controlling the request shadow copy.\n+\t */\n+\tbool shadow_copy;\n+\t/**\n+\t * Session resource allocations\n+\t */\n+\tstruct tf_session_resources *resources;\n };\n \n /**\n- * Table Type allocation parameters\n+ * Table allocation parameters\n  */\n-struct tf_tbl_type_alloc_parms {\n+struct tf_tbl_alloc_parms {\n \t/**\n \t * [in] Receive or transmit direction\n \t */\n@@ -53,9 +59,9 @@ struct tf_tbl_type_alloc_parms {\n };\n \n /**\n- * Table Type free parameters\n+ * Table free parameters\n  */\n-struct tf_tbl_type_free_parms {\n+struct tf_tbl_free_parms {\n \t/**\n \t * [in] Receive or transmit direction\n \t */\n@@ -75,7 +81,10 @@ struct tf_tbl_type_free_parms {\n \tuint16_t ref_cnt;\n };\n \n-struct tf_tbl_type_alloc_search_parms {\n+/**\n+ * Table allocate search parameters\n+ */\n+struct tf_tbl_alloc_search_parms {\n \t/**\n \t * [in] Receive or transmit direction\n \t */\n@@ -117,9 +126,9 @@ struct tf_tbl_type_alloc_search_parms {\n };\n \n /**\n- * Table Type set parameters\n+ * Table set parameters\n  */\n-struct tf_tbl_type_set_parms {\n+struct tf_tbl_set_parms {\n \t/**\n \t * [in] Receive or transmit direction\n \t */\n@@ -143,9 +152,9 @@ struct tf_tbl_type_set_parms {\n };\n \n /**\n- * Table Type get parameters\n+ * Table get parameters\n  */\n-struct tf_tbl_type_get_parms {\n+struct tf_tbl_get_parms {\n \t/**\n \t * [in] Receive or transmit direction\n \t */\n@@ -169,39 +178,39 @@ struct tf_tbl_type_get_parms {\n };\n \n /**\n- * @page tbl_type Table Type\n+ * @page tbl Table\n  *\n- * @ref tf_tbl_type_bind\n+ * @ref tf_tbl_bind\n  *\n- * @ref tf_tbl_type_unbind\n+ * @ref tf_tbl_unbind\n  *\n- * @ref tf_tbl_type_alloc\n+ * @ref tf_tbl_alloc\n  *\n- * @ref tf_tbl_type_free\n+ * @ref tf_tbl_free\n  *\n- * @ref tf_tbl_type_alloc_search\n+ * @ref tf_tbl_alloc_search\n  *\n- * @ref tf_tbl_type_set\n+ * @ref tf_tbl_set\n  *\n- * @ref tf_tbl_type_get\n+ * @ref tf_tbl_get\n  */\n \n /**\n- * Initializes the Table Type module with the requested DBs. Must be\n+ * Initializes the Table module with the requested DBs. Must be\n  * invoked as the first thing before any of the access functions.\n  *\n  * [in] tfp\n  *   Pointer to TF handle, used for HCAPI communication\n  *\n  * [in] parms\n- *   Pointer to parameters\n+ *   Pointer to Table configuration parameters\n  *\n  * Returns\n  *   - (0) if successful.\n  *   - (-EINVAL) on failure.\n  */\n-int tf_tbl_type_bind(struct tf *tfp,\n-\t\t     struct tf_tbl_type_cfg_parms *parms);\n+int tf_tbl_bind(struct tf *tfp,\n+\t\tstruct tf_tbl_cfg_parms *parms);\n \n /**\n  * Cleans up the private DBs and releases all the data.\n@@ -216,7 +225,7 @@ int tf_tbl_type_bind(struct tf *tfp,\n  *   - (0) if successful.\n  *   - (-EINVAL) on failure.\n  */\n-int tf_tbl_type_unbind(struct tf *tfp);\n+int tf_tbl_unbind(struct tf *tfp);\n \n /**\n  * Allocates the requested table type from the internal RM DB.\n@@ -225,14 +234,14 @@ int tf_tbl_type_unbind(struct tf *tfp);\n  *   Pointer to TF handle, used for HCAPI communication\n  *\n  * [in] parms\n- *   Pointer to parameters\n+ *   Pointer to Table allocation parameters\n  *\n  * Returns\n  *   - (0) if successful.\n  *   - (-EINVAL) on failure.\n  */\n-int tf_tbl_type_alloc(struct tf *tfp,\n-\t\t      struct tf_tbl_type_alloc_parms *parms);\n+int tf_tbl_alloc(struct tf *tfp,\n+\t\t struct tf_tbl_alloc_parms *parms);\n \n /**\n  * Free's the requested table type and returns it to the DB. If shadow\n@@ -244,14 +253,14 @@ int tf_tbl_type_alloc(struct tf *tfp,\n  *   Pointer to TF handle, used for HCAPI communication\n  *\n  * [in] parms\n- *   Pointer to parameters\n+ *   Pointer to Table free parameters\n  *\n  * Returns\n  *   - (0) if successful.\n  *   - (-EINVAL) on failure.\n  */\n-int tf_tbl_type_free(struct tf *tfp,\n-\t\t     struct tf_tbl_type_free_parms *parms);\n+int tf_tbl_free(struct tf *tfp,\n+\t\tstruct tf_tbl_free_parms *parms);\n \n /**\n  * Supported if Shadow DB is configured. Searches the Shadow DB for\n@@ -269,8 +278,8 @@ int tf_tbl_type_free(struct tf *tfp,\n  *   - (0) if successful.\n  *   - (-EINVAL) on failure.\n  */\n-int tf_tbl_type_alloc_search(struct tf *tfp,\n-\t\t\t     struct tf_tbl_type_alloc_search_parms *parms);\n+int tf_tbl_alloc_search(struct tf *tfp,\n+\t\t\tstruct tf_tbl_alloc_search_parms *parms);\n \n /**\n  * Configures the requested element by sending a firmware request which\n@@ -280,14 +289,14 @@ int tf_tbl_type_alloc_search(struct tf *tfp,\n  *   Pointer to TF handle, used for HCAPI communication\n  *\n  * [in] parms\n- *   Pointer to parameters\n+ *   Pointer to Table set parameters\n  *\n  * Returns\n  *   - (0) if successful.\n  *   - (-EINVAL) on failure.\n  */\n-int tf_tbl_type_set(struct tf *tfp,\n-\t\t    struct tf_tbl_type_set_parms *parms);\n+int tf_tbl_set(struct tf *tfp,\n+\t       struct tf_tbl_set_parms *parms);\n \n /**\n  * Retrieves the requested element by sending a firmware request to get\n@@ -297,13 +306,13 @@ int tf_tbl_type_set(struct tf *tfp,\n  *   Pointer to TF handle, used for HCAPI communication\n  *\n  * [in] parms\n- *   Pointer to parameters\n+ *   Pointer to Table get parameters\n  *\n  * Returns\n  *   - (0) if successful.\n  *   - (-EINVAL) on failure.\n  */\n-int tf_tbl_type_get(struct tf *tfp,\n-\t\t    struct tf_tbl_type_get_parms *parms);\n+int tf_tbl_get(struct tf *tfp,\n+\t       struct tf_tbl_get_parms *parms);\n \n #endif /* TF_TBL_TYPE_H */\ndiff --git a/drivers/net/bnxt/tf_core/tf_tcam.h b/drivers/net/bnxt/tf_core/tf_tcam.h\nindex 1420c9e..68c25eb 100644\n--- a/drivers/net/bnxt/tf_core/tf_tcam.h\n+++ b/drivers/net/bnxt/tf_core/tf_tcam.h\n@@ -20,16 +20,22 @@ struct tf_tcam_cfg_parms {\n \t * Number of tcam types in each of the configuration arrays\n \t */\n \tuint16_t num_elements;\n-\n \t/**\n \t * TCAM configuration array\n \t */\n-\tstruct tf_rm_element_cfg *tcam_cfg[TF_DIR_MAX];\n-\n+\tstruct tf_rm_element_cfg *cfg;\n \t/**\n \t * Shadow table type configuration array\n \t */\n-\tstruct tf_shadow_tcam_cfg *tcam_shadow_cfg[TF_DIR_MAX];\n+\tstruct tf_shadow_tcam_cfg *shadow_cfg;\n+\t/**\n+\t * Boolean controlling the request shadow copy.\n+\t */\n+\tbool shadow_copy;\n+\t/**\n+\t * Session resource allocations\n+\t */\n+\tstruct tf_session_resources *resources;\n };\n \n /**\n",
    "prefixes": [
        "13/50"
    ]
}