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GET /api/patches/71138/?format=api
{ "id": 71138, "url": "http://patches.dpdk.org/api/patches/71138/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200610114427.22146-3-somnath.kotur@broadcom.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200610114427.22146-3-somnath.kotur@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200610114427.22146-3-somnath.kotur@broadcom.com", "date": "2020-06-10T11:43:53", "name": "[02/36] net/bnxt: remove svif and vlan information from header bitmap", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "16e170a40576394d37fb376dd98f807280edcf97", "submitter": { "id": 908, "url": "http://patches.dpdk.org/api/people/908/?format=api", "name": "Somnath Kotur", "email": "somnath.kotur@broadcom.com" }, "delegate": { "id": 1766, "url": "http://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200610114427.22146-3-somnath.kotur@broadcom.com/mbox/", "series": [ { "id": 10380, "url": "http://patches.dpdk.org/api/series/10380/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10380", "date": "2020-06-10T11:43:51", "name": "bnxt patches", "version": 1, "mbox": "http://patches.dpdk.org/series/10380/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/71138/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/71138/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 98FC2A051A;\n\tWed, 10 Jun 2020 13:49:12 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B8D5E397D;\n\tWed, 10 Jun 2020 13:48:59 +0200 (CEST)", "from relay.smtp.broadcom.com (relay.smtp.broadcom.com\n [192.19.232.149]) by dpdk.org (Postfix) with ESMTP id 664782C5E\n for <dev@dpdk.org>; Wed, 10 Jun 2020 13:48:57 +0200 (CEST)", "from dhcp-10-123-153-55.dhcp.broadcom.net\n (dhcp-10-123-153-55.dhcp.broadcom.net [10.123.153.55])\n by relay.smtp.broadcom.com (Postfix) with ESMTP id 9269B1BD5A6;\n Wed, 10 Jun 2020 04:48:56 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.10.3 relay.smtp.broadcom.com 9269B1BD5A6", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n s=dkimrelay; t=1591789737;\n bh=ch38XP3qdIKnxoNxV1SFCwB7M6bHE0dcku3Jj77WiLQ=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=goXNhlroeRs11wpVLo83ja0tyCa+28g0onDMa9mr8giqWBHBgOYmUzxAs60P8T2mS\n LMkbrSmNzasWeyGkOHuSPjKt2rjenOWGshDgcqb3aWpseCsPvvtd/coeYegrGclLj1\n GdQdUMLZzlPneYnOoHdTNcVS2x5yyjiC2lcUZj50=", "From": "Somnath Kotur <somnath.kotur@broadcom.com>", "To": "dev@dpdk.org", "Cc": "ferruh.yigit@intel.com", "Date": "Wed, 10 Jun 2020 17:13:53 +0530", "Message-Id": "<20200610114427.22146-3-somnath.kotur@broadcom.com>", "X-Mailer": "git-send-email 2.10.1.613.g2cc2e70", "In-Reply-To": "<20200610114427.22146-1-somnath.kotur@broadcom.com>", "References": "<20200610114427.22146-1-somnath.kotur@broadcom.com>", "Subject": "[dpdk-dev] [PATCH 02/36] net/bnxt: remove svif and vlan information\n\tfrom header bitmap", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\n\nThe svif and vlan information are removed from header bitmap\nsignature so that the matching algorithm does not use these\nfields to perform matching. So flows with or without vlan\ntag could use the same flow template.\n\nSigned-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\nReviewed-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\nReviewed-by: Michael Baucom <michael.baucom@broadcom.com>\nSigned-off-by: Somnath Kotur <somnath.kotur@broadcom.com>\n---\n drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c | 3 ++\n drivers/net/bnxt/tf_ulp/ulp_mapper.c | 16 ++++++++\n drivers/net/bnxt/tf_ulp/ulp_mapper.h | 2 +\n drivers/net/bnxt/tf_ulp/ulp_matcher.c | 25 +------------\n drivers/net/bnxt/tf_ulp/ulp_rte_parser.c | 45 +++++++++++------------\n drivers/net/bnxt/tf_ulp/ulp_rte_parser.h | 1 +\n drivers/net/bnxt/tf_ulp/ulp_template_db.c | 18 ++++-----\n drivers/net/bnxt/tf_ulp/ulp_template_db.h | 49 +++++++++++--------------\n drivers/net/bnxt/tf_ulp/ulp_template_field_db.h | 2 +-\n drivers/net/bnxt/tf_ulp/ulp_utils.c | 34 +++++++++++++++++\n drivers/net/bnxt/tf_ulp/ulp_utils.h | 18 +++++++++\n 11 files changed, 128 insertions(+), 85 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\nindex dbec8ce..1d8d79f 100644\n--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\n+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\n@@ -99,6 +99,8 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,\n \tULP_UTIL_CHF_IDX_WR(¶ms, BNXT_ULP_CHF_IDX_INCOMING_IF,\n \t\t\t dev->data->port_id);\n \tULP_UTIL_CHF_IDX_WR(¶ms, BNXT_ULP_CHF_IDX_DIRECTION, params.dir);\n+\tULP_UTIL_CHF_IDX_WR(¶ms, BNXT_ULP_CHF_IDX_SVIF,\n+\t\t\t BNXT_ULP_INVALID_SVIF_VAL);\n \n \t/* Parse the rte flow pattern */\n \tret = bnxt_ulp_rte_parser_hdr_parse(pattern, ¶ms);\n@@ -121,6 +123,7 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,\n \tmapper_cparms.app_priority = attr->priority;\n \tmapper_cparms.hdr_bitmap = ¶ms.hdr_bitmap;\n \tmapper_cparms.hdr_field = params.hdr_field;\n+\tmapper_cparms.comp_fld = params.comp_fld;\n \tmapper_cparms.act = ¶ms.act_bitmap;\n \tmapper_cparms.act_prop = ¶ms.act_prop;\n \tmapper_cparms.class_tid = class_id;\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c\nindex 938b88e..1a0d577 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c\n@@ -743,6 +743,21 @@ ulp_mapper_keymask_field_process(struct bnxt_ulp_mapper_parms *parms,\n \t\t\treturn -EINVAL;\n \t\t}\n \t\tbreak;\n+\tcase BNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD:\n+\t\tif (!ulp_operand_read(operand, (uint8_t *)&idx,\n+\t\t\t\t sizeof(uint16_t))) {\n+\t\t\tBNXT_TF_DBG(ERR, \"%s key operand read failed.\\n\", name);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tidx = tfp_be_to_cpu_16(idx);\n+\t\tif (idx < BNXT_ULP_CHF_IDX_LAST)\n+\t\t\tval = ulp_blob_push_32(blob, &parms->comp_fld[idx],\n+\t\t\t\t\t bitlen);\n+\t\tif (!val) {\n+\t\t\tBNXT_TF_DBG(ERR, \"%s push to key blob failed\\n\", name);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tbreak;\n \tcase BNXT_ULP_SPEC_OPC_SET_TO_REGFILE:\n \t\tif (!ulp_operand_read(operand, (uint8_t *)&idx,\n \t\t\t\t sizeof(uint16_t))) {\n@@ -1857,6 +1872,7 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx,\n \tparms.act_bitmap = cparms->act;\n \tparms.regfile = ®file;\n \tparms.hdr_field = cparms->hdr_field;\n+\tparms.comp_fld = cparms->comp_fld;\n \tparms.tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx);\n \tparms.ulp_ctx = ulp_ctx;\n \tparms.tcam_tbl_opc = BNXT_ULP_MAPPER_TCAM_TBL_OPC_NORMAL;\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.h b/drivers/net/bnxt/tf_ulp/ulp_mapper.h\nindex 162d869..e794795 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.h\n@@ -67,6 +67,7 @@ struct bnxt_ulp_mapper_parms {\n \tstruct ulp_rte_act_prop\t\t\t*act_prop;\n \tstruct ulp_rte_act_bitmap\t\t*act_bitmap;\n \tstruct ulp_rte_hdr_field\t\t*hdr_field;\n+\tuint32_t\t\t\t\t*comp_fld;\n \tstruct ulp_regfile\t\t\t*regfile;\n \tstruct tf\t\t\t\t*tfp;\n \tstruct bnxt_ulp_context\t\t\t*ulp_ctx;\n@@ -82,6 +83,7 @@ struct bnxt_ulp_mapper_create_parms {\n \tuint32_t\t\t\tapp_priority;\n \tstruct ulp_rte_hdr_bitmap\t*hdr_bitmap;\n \tstruct ulp_rte_hdr_field\t*hdr_field;\n+\tuint32_t\t\t\t*comp_fld;\n \tstruct ulp_rte_act_bitmap\t*act;\n \tstruct ulp_rte_act_prop\t\t*act_prop;\n \tuint32_t\t\t\tclass_tid;\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_matcher.c b/drivers/net/bnxt/tf_ulp/ulp_matcher.c\nindex e5f23ef..f665700 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_matcher.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_matcher.c\n@@ -34,22 +34,6 @@ ulp_matcher_action_hash_calculate(uint64_t hi_sig)\n \treturn (uint32_t)hash;\n }\n \n-/* Utility function to mask the computed and internal proto headers. */\n-static void\n-ulp_matcher_hdr_fields_normalize(struct ulp_rte_hdr_bitmap *hdr1,\n-\t\t\t\t struct ulp_rte_hdr_bitmap *hdr2)\n-{\n-\t/* copy the contents first */\n-\trte_memcpy(hdr2, hdr1, sizeof(struct ulp_rte_hdr_bitmap));\n-\n-\t/* reset the computed fields */\n-\tULP_BITMAP_RESET(hdr2->bits, BNXT_ULP_HDR_BIT_SVIF);\n-\tULP_BITMAP_RESET(hdr2->bits, BNXT_ULP_HDR_BIT_OO_VLAN);\n-\tULP_BITMAP_RESET(hdr2->bits, BNXT_ULP_HDR_BIT_OI_VLAN);\n-\tULP_BITMAP_RESET(hdr2->bits, BNXT_ULP_HDR_BIT_IO_VLAN);\n-\tULP_BITMAP_RESET(hdr2->bits, BNXT_ULP_HDR_BIT_II_VLAN);\n-}\n-\n /*\n * Function to handle the matching of RTE Flows and validating\n * the pattern masks against the flow templates.\n@@ -58,16 +42,11 @@ int32_t\n ulp_matcher_pattern_match(struct ulp_rte_parser_params *params,\n \t\t\t uint32_t *class_id)\n {\n-\tstruct ulp_rte_hdr_bitmap hdr_bitmap_masked;\n \tstruct bnxt_ulp_class_match_info *class_match;\n \tuint32_t class_hid;\n \tuint8_t vf_to_vf;\n \tuint16_t tmpl_id;\n \n-\t/* Remove the hdr bit maps that are internal or computed */\n-\tulp_matcher_hdr_fields_normalize(¶ms->hdr_bitmap,\n-\t\t\t\t\t &hdr_bitmap_masked);\n-\n \t/* determine vf to vf flow */\n \tif (params->dir == ULP_DIR_EGRESS &&\n \t ULP_BITMAP_ISSET(params->act_bitmap.bits,\n@@ -78,7 +57,7 @@ ulp_matcher_pattern_match(struct ulp_rte_parser_params *params,\n \t}\n \n \t/* calculate the hash of the given flow */\n-\tclass_hid = ulp_matcher_class_hash_calculate(hdr_bitmap_masked.bits,\n+\tclass_hid = ulp_matcher_class_hash_calculate(params->hdr_bitmap.bits,\n \t\t\t\t\t\t params->fld_bitmap.bits);\n \n \t/* validate the calculate hash values */\n@@ -89,7 +68,7 @@ ulp_matcher_pattern_match(struct ulp_rte_parser_params *params,\n \t\tgoto error;\n \n \tclass_match = &ulp_class_match_list[tmpl_id];\n-\tif (ULP_BITMAP_CMP(&hdr_bitmap_masked, &class_match->hdr_sig)) {\n+\tif (ULP_BITMAP_CMP(¶ms->hdr_bitmap, &class_match->hdr_sig)) {\n \t\tBNXT_TF_DBG(DEBUG, \"Proto Header does not match\\n\");\n \t\tgoto error;\n \t}\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\nindex ace5fad..4f7adfc 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\n@@ -165,15 +165,13 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,\n \tuint32_t ifindex;\n \tint32_t rc;\n \n-\tif (ULP_BITMAP_ISSET(params->hdr_bitmap.bits, BNXT_ULP_HDR_BIT_SVIF)) {\n+\tif (ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_SVIF) !=\n+\t BNXT_ULP_INVALID_SVIF_VAL) {\n \t\tBNXT_TF_DBG(ERR,\n \t\t\t \"SVIF already set,multiple source not support'd\\n\");\n \t\treturn BNXT_TF_RC_ERROR;\n \t}\n \n-\t/*update the hdr_bitmap with BNXT_ULP_HDR_PROTO_SVIF */\n-\tULP_BITMAP_SET(params->hdr_bitmap.bits, BNXT_ULP_HDR_BIT_SVIF);\n-\n \tif (proto == RTE_FLOW_ITEM_TYPE_PORT_ID) {\n \t\tdir = ULP_UTIL_CHF_IDX_RD(params,\n \t\t\t\t\t BNXT_ULP_CHF_IDX_DIRECTION);\n@@ -192,6 +190,8 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,\n \tmemcpy(hdr_field->spec, &svif, sizeof(svif));\n \tmemcpy(hdr_field->mask, &mask, sizeof(mask));\n \thdr_field->size = sizeof(svif);\n+\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_SVIF,\n+\t\t\t rte_be_to_cpu_16(svif));\n \treturn BNXT_TF_RC_SUCCESS;\n }\n \n@@ -202,7 +202,8 @@ ulp_rte_parser_svif_process(struct ulp_rte_parser_params *params)\n \tuint16_t port_id = 0;\n \tuint16_t svif_mask = 0xFFFF;\n \n-\tif (ULP_BITMAP_ISSET(params->hdr_bitmap.bits, BNXT_ULP_HDR_BIT_SVIF))\n+\tif (ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_SVIF) !=\n+\t BNXT_ULP_INVALID_SVIF_VAL)\n \t\treturn BNXT_TF_RC_SUCCESS;\n \n \t/* SVIF not set. So get the port id */\n@@ -421,41 +422,39 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,\n \t/* Update the hdr_bitmap of the vlans */\n \thdr_bit = ¶ms->hdr_bitmap;\n \tif (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&\n-\t !ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OO_VLAN)) {\n-\t\t/* Set the outer vlan bit and update the vlan tag num */\n-\t\tULP_BITMAP_SET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OO_VLAN);\n+\t !outer_vtag_num) {\n+\t\t/* Update the vlan tag num */\n \t\touter_vtag_num++;\n \t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_NUM,\n \t\t\t\t outer_vtag_num);\n \t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_PRESENT, 1);\n \t} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&\n-\t\t ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OO_VLAN) &&\n-\t\t !ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OI_VLAN)) {\n-\t\t/* Set the outer vlan bit and update the vlan tag num */\n-\t\tULP_BITMAP_SET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OI_VLAN);\n+\t\t ULP_UTIL_CHF_IDX_RD(params,\n+\t\t\t\t BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&\n+\t\t outer_vtag_num == 1) {\n+\t\t/* update the vlan tag num */\n \t\touter_vtag_num++;\n \t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_NUM,\n \t\t\t\t outer_vtag_num);\n \t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_TWO_VTAGS, 1);\n \t} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&\n-\t\t ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OO_VLAN) &&\n-\t\t ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OI_VLAN) &&\n+\t\t ULP_UTIL_CHF_IDX_RD(params,\n+\t\t\t\t BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&\n \t\t ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_I_ETH) &&\n-\t\t !ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_IO_VLAN)) {\n-\t\t/* Set the inner vlan bit and update the vlan tag num */\n-\t\tULP_BITMAP_SET(hdr_bit->bits, BNXT_ULP_HDR_BIT_IO_VLAN);\n+\t\t !inner_vtag_num) {\n+\t\t/* update the vlan tag num */\n \t\tinner_vtag_num++;\n \t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_NUM,\n \t\t\t\t inner_vtag_num);\n \t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_PRESENT, 1);\n \t} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&\n-\t\t ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OO_VLAN) &&\n-\t\t ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OI_VLAN) &&\n+\t\t ULP_UTIL_CHF_IDX_RD(params,\n+\t\t\t\t BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&\n \t\t ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_I_ETH) &&\n-\t\t ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_IO_VLAN) &&\n-\t\t !ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_II_VLAN)) {\n-\t\t/* Set the inner vlan bit and update the vlan tag num */\n-\t\tULP_BITMAP_SET(hdr_bit->bits, BNXT_ULP_HDR_BIT_II_VLAN);\n+\t\t ULP_UTIL_CHF_IDX_RD(params,\n+\t\t\t\t BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&\n+\t\t inner_vtag_num == 1) {\n+\t\t/* update the vlan tag num */\n \t\tinner_vtag_num++;\n \t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_NUM,\n \t\t\t\t inner_vtag_num);\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h\nindex cbc8a43..868e6dc 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h\n@@ -19,6 +19,7 @@\n #define BNXT_ULP_ENCAP_IPV4_SIZE\t\t12\n #define BNXT_ULP_ENCAP_IPV6_SIZE\t\t8\n #define BNXT_ULP_ENCAP_UDP_SIZE\t\t\t4\n+#define BNXT_ULP_INVALID_SVIF_VAL\t\t-1U\n \n /* Function to handle the parsing of the RTE port id. */\n int32_t\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.c b/drivers/net/bnxt/tf_ulp/ulp_template_db.c\nindex e89aefa..f06fbc0 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.c\n@@ -3,10 +3,6 @@\n * All rights reserved.\n */\n \n-/*\n- * date: Mon Mar 9 02:37:53 2020\n- * version: 0.0\n- */\n \n #include \"ulp_template_db.h\"\n #include \"ulp_template_field_db.h\"\n@@ -538,12 +534,12 @@ uint32_t bnxt_ulp_encap_vtag_map[] = {\n };\n \n uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {\n-\t[BNXT_ULP_CLASS_HID_0092] = 1\n+\t[BNXT_ULP_CLASS_HID_0013] = 1\n };\n \n struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t[1] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0092,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0013,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n@@ -833,15 +829,17 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n-\t/* class template id: 0, wh_plus, table: profile_tcam_cache_0 */\n \t{\n \t.field_bit_size = 1,\n \t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_CHF_IDX_O_VTAG_NUM >> 8) & 0xff,\n+\t\tBNXT_ULP_CHF_IDX_O_VTAG_NUM & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 7,\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_db.h\nindex e6065d2..212068f 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.h\n@@ -3,10 +3,6 @@\n * All rights reserved.\n */\n \n-/*\n- * date: Mon Mar 9 02:37:53 2020\n- * version: 0.0\n- */\n \n #ifndef ULP_TEMPLATE_DB_H_\n #define ULP_TEMPLATE_DB_H_\n@@ -64,24 +60,19 @@ enum bnxt_ulp_action_bit {\n };\n \n enum bnxt_ulp_hdr_bit {\n-\tBNXT_ULP_HDR_BIT_SVIF = 0x0000000000000001,\n-\tBNXT_ULP_HDR_BIT_O_ETH = 0x0000000000000002,\n-\tBNXT_ULP_HDR_BIT_OO_VLAN = 0x0000000000000004,\n-\tBNXT_ULP_HDR_BIT_OI_VLAN = 0x0000000000000008,\n-\tBNXT_ULP_HDR_BIT_O_IPV4 = 0x0000000000000010,\n-\tBNXT_ULP_HDR_BIT_O_IPV6 = 0x0000000000000020,\n-\tBNXT_ULP_HDR_BIT_O_TCP = 0x0000000000000040,\n-\tBNXT_ULP_HDR_BIT_O_UDP = 0x0000000000000080,\n-\tBNXT_ULP_HDR_BIT_T_VXLAN = 0x0000000000000100,\n-\tBNXT_ULP_HDR_BIT_T_GRE = 0x0000000000000200,\n-\tBNXT_ULP_HDR_BIT_I_ETH = 0x0000000000000400,\n-\tBNXT_ULP_HDR_BIT_IO_VLAN = 0x0000000000000800,\n-\tBNXT_ULP_HDR_BIT_II_VLAN = 0x0000000000001000,\n-\tBNXT_ULP_HDR_BIT_I_IPV4 = 0x0000000000002000,\n-\tBNXT_ULP_HDR_BIT_I_IPV6 = 0x0000000000004000,\n-\tBNXT_ULP_HDR_BIT_I_TCP = 0x0000000000008000,\n-\tBNXT_ULP_HDR_BIT_I_UDP = 0x0000000000010000,\n-\tBNXT_ULP_HDR_BIT_LAST = 0x0000000000020000\n+\tBNXT_ULP_HDR_BIT_O_ETH = 0x0000000000000001,\n+\tBNXT_ULP_HDR_BIT_O_IPV4 = 0x0000000000000002,\n+\tBNXT_ULP_HDR_BIT_O_IPV6 = 0x0000000000000004,\n+\tBNXT_ULP_HDR_BIT_O_TCP = 0x0000000000000008,\n+\tBNXT_ULP_HDR_BIT_O_UDP = 0x0000000000000010,\n+\tBNXT_ULP_HDR_BIT_T_VXLAN = 0x0000000000000020,\n+\tBNXT_ULP_HDR_BIT_T_GRE = 0x0000000000000040,\n+\tBNXT_ULP_HDR_BIT_I_ETH = 0x0000000000000080,\n+\tBNXT_ULP_HDR_BIT_I_IPV4 = 0x0000000000000100,\n+\tBNXT_ULP_HDR_BIT_I_IPV6 = 0x0000000000000200,\n+\tBNXT_ULP_HDR_BIT_I_TCP = 0x0000000000000400,\n+\tBNXT_ULP_HDR_BIT_I_UDP = 0x0000000000000800,\n+\tBNXT_ULP_HDR_BIT_LAST = 0x0000000000001000\n };\n \n enum bnxt_ulp_act_type {\n@@ -232,10 +223,11 @@ enum bnxt_ulp_search_before_alloc {\n enum bnxt_ulp_spec_opc {\n \tBNXT_ULP_SPEC_OPC_SET_TO_CONSTANT = 0,\n \tBNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD = 1,\n-\tBNXT_ULP_SPEC_OPC_SET_TO_REGFILE = 2,\n-\tBNXT_ULP_SPEC_OPC_SET_TO_DEF_REGFILE = 3,\n-\tBNXT_ULP_SPEC_OPC_ADD_PAD = 4,\n-\tBNXT_ULP_SPEC_OPC_LAST = 5\n+\tBNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD = 2,\n+\tBNXT_ULP_SPEC_OPC_SET_TO_REGFILE = 3,\n+\tBNXT_ULP_SPEC_OPC_SET_TO_DEF_REGFILE = 4,\n+\tBNXT_ULP_SPEC_OPC_ADD_PAD = 5,\n+\tBNXT_ULP_SPEC_OPC_LAST = 6\n };\n \n enum bnxt_ulp_encap_vtag_encoding {\n@@ -445,12 +437,13 @@ enum bnxt_ulp_act_prop_idx {\n \tBNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 236,\n \tBNXT_ULP_ACT_PROP_IDX_LAST = 268\n };\n+\n enum bnxt_ulp_class_hid {\n-\tBNXT_ULP_CLASS_HID_0092 = 0x0092\n+\tBNXT_ULP_CLASS_HID_0013 = 0x0013\n };\n \n enum bnxt_ulp_act_hid {\n \tBNXT_ULP_ACT_HID_0029 = 0x0029\n };\n \n-#endif /* _ULP_TEMPLATE_DB_H_ */\n+#endif\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h\nindex 587de8a..2655b83 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h\n@@ -60,4 +60,4 @@ enum bnxt_ulp_hf_bitmask0 {\n \tBNXT_ULP_HF0_BITMASK_O_UDP_CSUM = 0x0000010000000000\n };\n \n-#endif /* _ULP_HDR_FIELD_ENUMS_H_ */\n+#endif\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_utils.c b/drivers/net/bnxt/tf_ulp/ulp_utils.c\nindex 0150c1d..bd267b6 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_utils.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_utils.c\n@@ -310,6 +310,40 @@ ulp_blob_push_64(struct ulp_blob *blob,\n }\n \n /*\n+ * Add data to the binary blob at the current offset.\n+ *\n+ * blob [in] The blob that data is added to. The blob must\n+ * be initialized prior to pushing data.\n+ *\n+ * data [in] 32-bit value to be added to the blob.\n+ *\n+ * datalen [in] The number of bits to be added ot the blob.\n+ *\n+ * The offset of the data is updated after each push of data.\n+ * NULL returned on error, pointer pushed value otherwise.\n+ */\n+uint8_t *\n+ulp_blob_push_32(struct ulp_blob *blob,\n+\t\t uint32_t *data,\n+\t\t uint32_t datalen)\n+{\n+\tuint8_t *val = (uint8_t *)data;\n+\tuint32_t rc;\n+\tuint32_t size = ULP_BITS_2_BYTE(datalen);\n+\n+\tif (!data || size > sizeof(uint32_t)) {\n+\t\tBNXT_TF_DBG(ERR, \"invalid argument\\n\");\n+\t\treturn 0;\n+\t}\n+\n+\trc = ulp_blob_push(blob, &val[sizeof(uint32_t) - size], datalen);\n+\tif (!rc)\n+\t\treturn 0;\n+\n+\treturn &val[sizeof(uint32_t) - size];\n+}\n+\n+/*\n * Add encap data to the binary blob at the current offset.\n *\n * blob [in] The blob that data is added to. The blob must\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_utils.h b/drivers/net/bnxt/tf_ulp/ulp_utils.h\nindex 5db3933..b8de4b4 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_utils.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_utils.h\n@@ -179,6 +179,24 @@ ulp_blob_push_64(struct ulp_blob *blob,\n \t\t uint32_t datalen);\n \n /*\n+ * Add data to the binary blob at the current offset.\n+ *\n+ * blob [in] The blob that data is added to. The blob must\n+ * be initialized prior to pushing data.\n+ *\n+ * data [in] 32-bit value to be added to the blob.\n+ *\n+ * datalen [in] The number of bits to be added ot the blob.\n+ *\n+ * The offset of the data is updated after each push of data.\n+ * NULL returned on error, pointer pushed value otherwise.\n+ */\n+uint8_t *\n+ulp_blob_push_32(struct ulp_blob *blob,\n+\t\t uint32_t *data,\n+\t\t uint32_t datalen);\n+\n+/*\n * Add encap data to the binary blob at the current offset.\n *\n * blob [in] The blob that data is added to. The blob must\n", "prefixes": [ "02/36" ] }