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{
    "id": 71108,
    "url": "http://patches.dpdk.org/api/patches/71108/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200610065733.18698-26-somnath.kotur@broadcom.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200610065733.18698-26-somnath.kotur@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200610065733.18698-26-somnath.kotur@broadcom.com",
    "date": "2020-06-10T06:57:22",
    "name": "[25/36] net/bnxt: add support for vxlan encap and decap templates",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "17347ee51f8572c8b0e90000475d2d1d18737de3",
    "submitter": {
        "id": 908,
        "url": "http://patches.dpdk.org/api/people/908/?format=api",
        "name": "Somnath Kotur",
        "email": "somnath.kotur@broadcom.com"
    },
    "delegate": {
        "id": 1766,
        "url": "http://patches.dpdk.org/api/users/1766/?format=api",
        "username": "ajitkhaparde",
        "first_name": "Ajit",
        "last_name": "Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200610065733.18698-26-somnath.kotur@broadcom.com/mbox/",
    "series": [
        {
            "id": 10371,
            "url": "http://patches.dpdk.org/api/series/10371/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10371",
            "date": "2020-06-10T06:56:57",
            "name": "bnxt fixes and enhancements",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/10371/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/71108/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/71108/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id EA976A04FD;\n\tWed, 10 Jun 2020 09:07:10 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6A5DF1BF53;\n\tWed, 10 Jun 2020 09:02:39 +0200 (CEST)",
            "from relay.smtp.broadcom.com (relay.smtp.broadcom.com\n [192.19.211.62]) by dpdk.org (Postfix) with ESMTP id 761D52BE9\n for <dev@dpdk.org>; Wed, 10 Jun 2020 09:02:05 +0200 (CEST)",
            "from dhcp-10-123-153-55.dhcp.broadcom.net\n (bgccx-dev-host-lnx35.bec.broadcom.net [10.123.153.55])\n by relay.smtp.broadcom.com (Postfix) with ESMTP id E08F32984E2;\n Wed, 10 Jun 2020 00:02:04 -0700 (PDT)"
        ],
        "DKIM-Filter": "OpenDKIM Filter v2.10.3 relay.smtp.broadcom.com E08F32984E2",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n s=dkimrelay; t=1591772525;\n bh=anAdbN+yjGRNNoNPprUomguixMrxNfkl5RvzXuRd2GQ=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=E81KWissHMSpm5Y0rtrcoi9IRkwdxQbV6i7eebeQGxQVbOObM44gXDDp2CWfR2uLu\n QufUMB2HlvHR4yizq9KEZl/ci6xVMe52JxEY2sOQyKXOQLThWsou3+GKOSenWG3Nz7\n 5YgGqE4Rlibglvm6ipb7OVFiBiO7GPiuNlhbBwTw=",
        "From": "Somnath Kotur <somnath.kotur@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "ferruh.yigit@intel.com",
        "Date": "Wed, 10 Jun 2020 12:27:22 +0530",
        "Message-Id": "<20200610065733.18698-26-somnath.kotur@broadcom.com>",
        "X-Mailer": "git-send-email 2.10.1.613.g2cc2e70",
        "In-Reply-To": "<20200610065733.18698-1-somnath.kotur@broadcom.com>",
        "References": "<20200610065733.18698-1-somnath.kotur@broadcom.com>",
        "Subject": "[dpdk-dev] [PATCH 25/36] net/bnxt: add support for vxlan encap and\n\tdecap templates",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\n\nTwo templates are added to ulp template db, an ingress rule\nfor vxlan decap and an egress rule for vxlan encap.\n\nSigned-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\nReviewed-by: Michael Baucom <michael.baucom@broadcom.com>\nSigned-off-by: Somnath Kotur <somnath.kotur@broadcom.com>\n---\n drivers/net/bnxt/tf_ulp/ulp_template_db.c       | 3310 +++++++++++++++++++++--\n drivers/net/bnxt/tf_ulp/ulp_template_db.h       |  157 +-\n drivers/net/bnxt/tf_ulp/ulp_template_field_db.h |  161 ++\n 3 files changed, 3365 insertions(+), 263 deletions(-)",
    "diff": "diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.c b/drivers/net/bnxt/tf_ulp/ulp_template_db.c\nindex 6c547da..e9cf78c 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.c\n@@ -537,18 +537,20 @@ struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = {\n };\n \n uint32_t bnxt_ulp_encap_vtag_map[] = {\n-\t[0] = BNXT_ULP_ENCAP_VTAG_ENCODING_NOP,\n-\t[1] = BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_ECAP_PRI,\n-\t[2] = BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI\n+\t[0] = BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP,\n+\t[1] = BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI,\n+\t[2] = BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI\n };\n \n uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {\n-\t[BNXT_ULP_CLASS_HID_0013] = 1\n+\t[BNXT_ULP_CLASS_HID_0080] = 1,\n+\t[BNXT_ULP_CLASS_HID_0000] = 2,\n+\t[BNXT_ULP_CLASS_HID_0087] = 3\n };\n \n struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t[1] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0013,\n+\t.class_hid = BNXT_ULP_CLASS_HID_0080,\n \t.hdr_sig = { .bits =\n \t\tBNXT_ULP_HDR_BIT_O_ETH |\n \t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n@@ -563,22 +565,79 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n \t.class_tid = 0,\n \t.act_vnic = 0,\n \t.wc_pri = 0\n+\t},\n+\t[2] = {\n+\t.class_hid = BNXT_ULP_CLASS_HID_0000,\n+\t.hdr_sig = { .bits =\n+\t\tBNXT_ULP_HDR_BIT_O_ETH |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n+\t.field_sig = { .bits =\n+\t\tBNXT_ULP_HF1_BITMASK_O_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF1_BITMASK_O_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF1_BITMASK_O_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF1_BITMASK_O_UDP_DST_PORT |\n+\t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n+\t.class_tid = 1,\n+\t.act_vnic = 0,\n+\t.wc_pri = 0\n+\t},\n+\t[3] = {\n+\t.class_hid = BNXT_ULP_CLASS_HID_0087,\n+\t.hdr_sig = { .bits =\n+\t\tBNXT_ULP_HDR_BIT_O_ETH |\n+\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_O_UDP |\n+\t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n+\t\tBNXT_ULP_HDR_BIT_I_ETH |\n+\t\tBNXT_ULP_HDR_BIT_I_IPV4 |\n+\t\tBNXT_ULP_HDR_BIT_I_UDP |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n+\t.field_sig = { .bits =\n+\t\tBNXT_ULP_HF2_BITMASK_I_IPV4_SRC_ADDR |\n+\t\tBNXT_ULP_HF2_BITMASK_I_IPV4_DST_ADDR |\n+\t\tBNXT_ULP_HF2_BITMASK_I_UDP_SRC_PORT |\n+\t\tBNXT_ULP_HF2_BITMASK_I_UDP_DST_PORT |\n+\t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n+\t.class_tid = 2,\n+\t.act_vnic = 0,\n+\t.wc_pri = 0\n \t}\n };\n \n uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {\n-\t[BNXT_ULP_ACT_HID_0029] = 1\n+\t[BNXT_ULP_ACT_HID_00a1] = 1,\n+\t[BNXT_ULP_ACT_HID_0040] = 2,\n+\t[BNXT_ULP_ACT_HID_0029] = 3\n };\n \n struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t[1] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_00a1,\n+\t.act_sig = { .bits =\n+\t\tBNXT_ULP_ACTION_BIT_VXLAN_DECAP |\n+\t\tBNXT_ULP_ACTION_BIT_MARK |\n+\t\tBNXT_ULP_ACTION_BIT_VNIC |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n+\t.act_tid = 0\n+\t},\n+\t[2] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_0040,\n+\t.act_sig = { .bits =\n+\t\tBNXT_ULP_ACTION_BIT_VPORT |\n+\t\tBNXT_ULP_ACTION_BIT_VXLAN_ENCAP |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n+\t.act_tid = 1\n+\t},\n+\t[3] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0029,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACTION_BIT_MARK |\n \t\tBNXT_ULP_ACTION_BIT_RSS |\n \t\tBNXT_ULP_ACTION_BIT_VNIC |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n-\t.act_tid = 0\n+\t.act_tid = 2\n \t}\n };\n \n@@ -588,6 +647,18 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n \t.num_tbls = 5,\n \t.start_tbl_idx = 0\n+\t},\n+\t[((1 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n+\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n+\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n+\t.num_tbls = 5,\n+\t.start_tbl_idx = 5\n+\t},\n+\t[((2 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n+\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n+\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n+\t.num_tbls = 5,\n+\t.start_tbl_idx = 10\n \t}\n };\n \n@@ -706,6 +777,236 @@ struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n \t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n \t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n+\t.direction = TF_DIR_TX,\n+\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 71,\n+\t.blob_key_bit_size = 12,\n+\t.key_bit_size = 12,\n+\t.key_num_fields = 2,\n+\t.result_start_idx = 32,\n+\t.result_bit_size = 10,\n+\t.result_num_fields = 1,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 2,\n+\t.ident_nums = 1,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n+\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,\n+\t.direction = TF_DIR_TX,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 73,\n+\t.blob_key_bit_size = 167,\n+\t.key_bit_size = 167,\n+\t.key_num_fields = 13,\n+\t.result_start_idx = 33,\n+\t.result_bit_size = 64,\n+\t.result_num_fields = 13,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 3,\n+\t.ident_nums = 0,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n+\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n+\t.direction = TF_DIR_TX,\n+\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 86,\n+\t.blob_key_bit_size = 16,\n+\t.key_bit_size = 16,\n+\t.key_num_fields = 3,\n+\t.result_start_idx = 46,\n+\t.result_bit_size = 10,\n+\t.result_num_fields = 1,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 3,\n+\t.ident_nums = 1,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n+\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n+\t.direction = TF_DIR_TX,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 89,\n+\t.blob_key_bit_size = 81,\n+\t.key_bit_size = 81,\n+\t.key_num_fields = 42,\n+\t.result_start_idx = 47,\n+\t.result_bit_size = 38,\n+\t.result_num_fields = 8,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 4,\n+\t.ident_nums = 0,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n+\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,\n+\t.resource_type = TF_MEM_EXTERNAL,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,\n+\t.direction = TF_DIR_TX,\n+\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 131,\n+\t.blob_key_bit_size = 448,\n+\t.key_bit_size = 448,\n+\t.key_num_fields = 11,\n+\t.result_start_idx = 55,\n+\t.result_bit_size = 64,\n+\t.result_num_fields = 9,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 4,\n+\t.ident_nums = 0,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_YES,\n+\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n+\t.direction = TF_DIR_RX,\n+\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 142,\n+\t.blob_key_bit_size = 12,\n+\t.key_bit_size = 12,\n+\t.key_num_fields = 2,\n+\t.result_start_idx = 64,\n+\t.result_bit_size = 10,\n+\t.result_num_fields = 1,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 4,\n+\t.ident_nums = 1,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n+\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,\n+\t.direction = TF_DIR_RX,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 144,\n+\t.blob_key_bit_size = 167,\n+\t.key_bit_size = 167,\n+\t.key_num_fields = 13,\n+\t.result_start_idx = 65,\n+\t.result_bit_size = 64,\n+\t.result_num_fields = 13,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 5,\n+\t.ident_nums = 0,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n+\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n+\t.direction = TF_DIR_RX,\n+\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 157,\n+\t.blob_key_bit_size = 16,\n+\t.key_bit_size = 16,\n+\t.key_num_fields = 3,\n+\t.result_start_idx = 78,\n+\t.result_bit_size = 10,\n+\t.result_num_fields = 1,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 5,\n+\t.ident_nums = 1,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n+\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n+\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n+\t.direction = TF_DIR_RX,\n+\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 160,\n+\t.blob_key_bit_size = 81,\n+\t.key_bit_size = 81,\n+\t.key_num_fields = 42,\n+\t.result_start_idx = 79,\n+\t.result_bit_size = 38,\n+\t.result_num_fields = 8,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 6,\n+\t.ident_nums = 0,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n+\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,\n+\t.resource_type = TF_MEM_EXTERNAL,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,\n+\t.direction = TF_DIR_RX,\n+\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.key_start_idx = 202,\n+\t.blob_key_bit_size = 448,\n+\t.key_bit_size = 448,\n+\t.key_num_fields = 11,\n+\t.result_start_idx = 87,\n+\t.result_bit_size = 64,\n+\t.result_num_fields = 9,\n+\t.encap_num_fields = 0,\n+\t.ident_start_idx = 6,\n+\t.ident_nums = 0,\n+\t.mark_enable = BNXT_ULP_MARK_ENABLE_YES,\n+\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n+\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n \t}\n };\n \n@@ -716,7 +1017,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,\n \t\tBNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -727,7 +1029,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -761,12 +1064,14 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t{\n \t.field_bit_size = 8,\n \t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,\n-\t.mask_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,\n \t\tBNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,\n \t\tBNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -831,7 +1136,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -858,12 +1164,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,\n-\t\tBNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 7,\n@@ -883,7 +1186,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,\n \t\tBNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -891,20 +1195,24 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t{\n \t.field_bit_size = 1,\n \t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 4,\n \t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -912,8 +1220,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -921,8 +1231,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -930,8 +1242,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -939,8 +1253,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -948,8 +1264,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_ISIP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 4,\n@@ -957,7 +1275,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {BNXT_ULP_SYM_L3_HDR_TYPE_IPV4,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV4,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -967,8 +1286,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -976,8 +1297,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -985,8 +1308,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -994,8 +1319,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 2,\n@@ -1003,8 +1330,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_UC_MC_BC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 2,\n@@ -1012,7 +1341,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {BNXT_ULP_SYM_L2_HDR_TYPE_DIX,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_HDR_TYPE_DIX,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -1022,8 +1352,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -1031,8 +1363,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 3,\n@@ -1040,8 +1374,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 4,\n@@ -1049,7 +1385,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -1059,17 +1396,21 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n \t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_VALID_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -1077,8 +1418,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 4,\n@@ -1086,7 +1429,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -1096,8 +1440,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -1105,8 +1451,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_VALID_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -1114,8 +1462,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -1123,8 +1473,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -1132,8 +1484,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 4,\n@@ -1141,18 +1495,21 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n \t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -1160,8 +1517,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_VALID_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -1169,8 +1528,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -1178,8 +1539,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 2,\n@@ -1187,8 +1550,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 2,\n@@ -1196,7 +1561,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {BNXT_ULP_SYM_TL2_HDR_TYPE_DIX,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -1206,8 +1572,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_HDR_VALID_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n@@ -1215,8 +1583,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_HREC_NEXT_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 9,\n@@ -1224,8 +1594,11 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_SYM_RESERVED_IGNORE >> 8) & 0xff,\n+\t\tBNXT_ULP_SYM_RESERVED_IGNORE & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 7,\n@@ -1245,8 +1618,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_AGG_ERROR_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 2,\n@@ -1254,8 +1629,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_RECYCLE_CNT_ZERO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 4,\n@@ -1263,7 +1640,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n \t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {BNXT_ULP_SYM_PKT_TYPE_L2,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_PKT_TYPE_L2,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -1300,7 +1678,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF0_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n \t\tBNXT_ULP_HF0_IDX_O_UDP_DST_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -1311,7 +1690,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {(BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n \t\tBNXT_ULP_HF0_IDX_O_UDP_SRC_PORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -1322,7 +1702,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {BNXT_ULP_SYM_IP_PROTO_UDP,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n@@ -1332,7 +1713,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n \t\tBNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -1343,7 +1725,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {(BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n \t\tBNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -1372,7 +1755,8 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n \t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -1383,71 +1767,2402 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n \t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n \t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF1_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF1_IDX_SVIF_INDEX & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 7,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 3,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF1_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF1_IDX_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF1_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF1_IDX_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 6,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_ISIP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV4,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_UC_MC_BC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_HDR_TYPE_DIX,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_VALID_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_VALID_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_VALID_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_HDR_VALID_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_HREC_NEXT_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 9,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_SYM_RESERVED_IGNORE >> 8) & 0xff,\n+\t\tBNXT_ULP_SYM_RESERVED_IGNORE & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_AGG_ERROR_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_RECYCLE_CNT_ZERO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_PKT_TYPE_L2,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 251,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF1_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF1_IDX_O_UDP_DST_PORT & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF1_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF1_IDX_O_UDP_SRC_PORT & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 32,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF1_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF1_IDX_O_IPV4_DST_ADDR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 32,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF1_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF1_IDX_O_IPV4_SRC_ADDR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 24,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF2_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF2_IDX_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,\n+\t.mask_operand = {\n+\t\t(BNXT_ULP_HF2_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF2_IDX_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF2_IDX_SVIF_INDEX >> 8) & 0xff,\n+\t\tBNXT_ULP_HF2_IDX_SVIF_INDEX & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L4_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_ISIP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV4,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L3_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_UC_MC_BC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_HDR_TYPE_DIX,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_L2_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TUN_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_TYPE_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL4_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_TYPE_IPV4,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_ERROR_NO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL3_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_HDR_TYPE_DIX,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_TL2_HDR_VALID_YES,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_HREC_NEXT_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 9,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_SYM_RESERVED_IGNORE >> 8) & 0xff,\n+\t\tBNXT_ULP_SYM_RESERVED_IGNORE & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_AGG_ERROR_IGNORE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_RECYCLE_CNT_ZERO,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_PKT_TYPE_L2,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n+\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 251,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF2_IDX_I_UDP_DST_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF2_IDX_I_UDP_DST_PORT & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF2_IDX_I_UDP_SRC_PORT >> 8) & 0xff,\n+\t\tBNXT_ULP_HF2_IDX_I_UDP_SRC_PORT & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {\n+\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 32,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF2_IDX_I_IPV4_DST_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF2_IDX_I_IPV4_DST_ADDR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 32,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_HF2_IDX_I_IPV4_SRC_ADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_HF2_IDX_I_IPV4_SRC_ADDR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 24,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n+\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n+\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n+\t.spec_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t}\n+};\n+\n+struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 6,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\t(0x00f9 >> 8) & 0xff,\n+\t\t0x00f9 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 33,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 9,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\t(0x00c5 >> 8) & 0xff,\n+\t\t0x00c5 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 11,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 6,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\t(0x00f9 >> 8) & 0xff,\n+\t\t0x00f9 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 33,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 9,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\t(0x00c5 >> 8) & 0xff,\n+\t\t0x00c5 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 11,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 7,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 6,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\t(0x00f9 >> 8) & 0xff,\n+\t\t0x00f9 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 33,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,\n+\t\tBNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 5,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 9,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\t(0x00c5 >> 8) & 0xff,\n+\t\t0x00c5 & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 11,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 2,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t}\n+};\n+\n+struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_L2_CTXT,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,\n+\t.ident_bit_size = 10,\n+\t.ident_bit_pos = 0\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_EM_PROF,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,\n+\t.ident_bit_size = 10,\n+\t.ident_bit_pos = 0\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_L2_CTXT,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,\n+\t.ident_bit_size = 10,\n+\t.ident_bit_pos = 0\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_EM_PROF,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,\n+\t.ident_bit_size = 10,\n+\t.ident_bit_pos = 0\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_L2_CTXT,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,\n+\t.ident_bit_size = 10,\n+\t.ident_bit_pos = 0\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n+\t.ident_type = TF_IDENT_TYPE_EM_PROF,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,\n+\t.ident_bit_size = 10,\n+\t.ident_bit_pos = 0\n+\t}\n+};\n+\n+struct bnxt_ulp_mapper_tbl_list_info ulp_act_tmpl_list[] = {\n+\t[((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n+\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n+\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n+\t.num_tbls = 1,\n+\t.start_tbl_idx = 0\n+\t},\n+\t[((1 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n+\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n+\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n+\t.num_tbls = 1,\n+\t.start_tbl_idx = 1\n+\t},\n+\t[((2 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n+\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n+\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n+\t.num_tbls = 1,\n+\t.start_tbl_idx = 2\n+\t}\n+};\n+\n+struct bnxt_ulp_mapper_tbl_info ulp_act_tbl_list[] = {\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n+\t.resource_type = TF_TBL_TYPE_EXT,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,\n+\t.direction = TF_DIR_RX,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.result_start_idx = 0,\n+\t.result_bit_size = 128,\n+\t.result_num_fields = 26,\n+\t.encap_num_fields = 0,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n+\t.resource_type = TF_TBL_TYPE_EXT,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,\n+\t.direction = TF_DIR_TX,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.result_start_idx = 26,\n+\t.result_bit_size = 128,\n+\t.result_num_fields = 26,\n+\t.encap_num_fields = 12,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR\n+\t},\n+\t{\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n+\t.resource_type = TF_TBL_TYPE_EXT,\n+\t.resource_sub_type =\n+\t\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,\n+\t.direction = TF_DIR_RX,\n+\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n+\t.result_start_idx = 64,\n+\t.result_bit_size = 128,\n+\t.result_num_fields = 26,\n+\t.encap_num_fields = 0,\n+\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR\n+\t}\n+};\n+\n+struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {\n+\t{\n+\t.field_bit_size = 14,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 8,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 11,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 3,\n+\t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n \t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -1459,19 +4174,36 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 16,\n+\t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n \t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\tBNXT_ULP_SYM_DECAP_FUNC_THRU_TUN,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n \t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 2,\n+\t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n \t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -1482,23 +4214,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n-\n \t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 4,\n+\t.field_bit_size = 14,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n \t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 8,\n+\t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n \t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -1510,31 +4239,33 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 10,\n+\t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {(0x00f9 >> 8) & 0xff,\n-\t\t0x00f9 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 5,\n+\t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n@@ -1544,17 +4275,45 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 33,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {(BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.field_bit_size = 11,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 16,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 10,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n@@ -1564,21 +4323,48 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 5,\n+\t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 9,\n+\t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {(0x00c5 >> 8) & 0xff,\n-\t\t0x00c5 & 0xff,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\tBNXT_ULP_SYM_DECAP_FUNC_NONE,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 12,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_VPORT & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.field_bit_size = 11,\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n \t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -1586,7 +4372,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t{\n \t.field_bit_size = 2,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n@@ -1596,56 +4382,108 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\tBNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {\n+\t\tBNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 3,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n \t.field_bit_size = 1,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n \t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {\n+\t},\n \t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n-\t.ident_type = TF_IDENT_TYPE_L2_CTXT,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,\n-\t.ident_bit_size = 10,\n-\t.ident_bit_pos = 0\n+\t.field_bit_size = 4,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n-\t.ident_type = TF_IDENT_TYPE_EM_PROF,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,\n-\t.ident_bit_size = 10,\n-\t.ident_bit_pos = 0\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_tbl_list_info ulp_act_tmpl_list[] = {\n-\t[((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n-\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n-\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 1,\n-\t.start_tbl_idx = 0\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_tbl_info ulp_act_tbl_list[] = {\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n \t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n-\t.resource_type = TF_TBL_TYPE_EXT,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,\n-\t.direction = TF_DIR_RX,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.result_start_idx = 0,\n-\t.result_bit_size = 128,\n-\t.result_num_fields = 26,\n-\t.encap_num_fields = 0,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {\n+\t.field_bit_size = 1,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 48,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 0,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff,\n+\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 0,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff,\n+\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 32,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n+\t{\n+\t.field_bit_size = 0,\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff,\n+\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ >> 8) & 0xff,\n+\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ & 0xff,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t},\n \t{\n \t.field_bit_size = 14,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n@@ -1769,14 +4607,16 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {\n \t{\n \t.field_bit_size = 4,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {BNXT_ULP_SYM_DECAP_FUNC_NONE,\n+\t.result_operand = {\n+\t\tBNXT_ULP_SYM_DECAP_FUNC_NONE,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 12,\n \t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n-\t.result_operand = {(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,\n+\t.result_operand = {\n+\t\t(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,\n \t\tBNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n@@ -1789,17 +4629,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {\n \t},\n \t{\n \t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_BIT,\n-\t.result_operand = {\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff,\n-\t\t((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff,\n-\t\t(uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n+\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n+\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\n \t{\n \t.field_bit_size = 2,\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_db.h\nindex 0b6a2d3..0f47b8f 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.h\n@@ -12,14 +12,14 @@\n #define BNXT_ULP_LOG2_MAX_NUM_DEV 2\n #define BNXT_ULP_CACHE_TBL_MAX_SZ 4\n #define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 256\n-#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 2\n+#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 4\n #define BNXT_ULP_CLASS_HID_LOW_PRIME 7919\n-#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7919\n-#define BNXT_ULP_CLASS_HID_SHFTR 0\n+#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7907\n+#define BNXT_ULP_CLASS_HID_SHFTR 16\n #define BNXT_ULP_CLASS_HID_SHFTL 23\n #define BNXT_ULP_CLASS_HID_MASK 255\n #define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 256\n-#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 2\n+#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 4\n #define BNXT_ULP_ACT_HID_LOW_PRIME 7919\n #define BNXT_ULP_ACT_HID_HIGH_PRIME 7919\n #define BNXT_ULP_ACT_HID_SHFTR 0\n@@ -232,25 +232,6 @@ enum bnxt_ulp_spec_opc {\n \tBNXT_ULP_SPEC_OPC_LAST = 6\n };\n \n-enum bnxt_ulp_encap_vtag_encoding {\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI = 4,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_REMAP_DIFFSERV = 5,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_ECAP_PRI = 6,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_DIFFSERV = 7,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_0 = 8,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_1 = 9,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_2 = 10,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_3 = 11,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_4 = 12,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_5 = 13,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_6 = 14,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_7 = 15,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NOP = 0,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_STAG_ECAP_PRI = 1,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_STAG_IVLAN_PRI = 2,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_STAG_REMAP_DIFFSERV = 3\n-};\n-\n enum bnxt_ulp_vfr_flag {\n \tBNXT_ULP_VFR_FLAG_NO = 0,\n \tBNXT_ULP_VFR_FLAG_YES = 1,\n@@ -301,6 +282,9 @@ enum bnxt_ulp_resource_sub_type {\n };\n \n enum bnxt_ulp_sym {\n+\tBNXT_ULP_SYM_AGG_ERROR_IGNORE = 0,\n+\tBNXT_ULP_SYM_AGG_ERROR_NO = 0,\n+\tBNXT_ULP_SYM_AGG_ERROR_YES = 1,\n \tBNXT_ULP_SYM_BIG_ENDIAN = 0,\n \tBNXT_ULP_SYM_DECAP_FUNC_NONE = 0,\n \tBNXT_ULP_SYM_DECAP_FUNC_THRU_L2 = 11,\n@@ -332,42 +316,160 @@ enum bnxt_ulp_sym {\n \tBNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN = 2,\n \tBNXT_ULP_SYM_ECV_VALID_NO = 0,\n \tBNXT_ULP_SYM_ECV_VALID_YES = 1,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_ENCAP_PRI = 6,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_0 = 8,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_1 = 8,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_2 = 8,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_3 = 8,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_4 = 8,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_5 = 8,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_6 = 8,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_7 = 8,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_REMAP_DIFFSERV = 7,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI = 1,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_IVLAN_PRI = 2,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_REMAP_DIFFSERV = 3,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI = 4,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_REMAP_DIFFSERV = 5,\n+\tBNXT_ULP_SYM_ECV_VTAG_TYPE_NOP = 0,\n+\tBNXT_ULP_SYM_HREC_NEXT_IGNORE = 0,\n+\tBNXT_ULP_SYM_HREC_NEXT_NO = 0,\n+\tBNXT_ULP_SYM_HREC_NEXT_YES = 1,\n+\tBNXT_ULP_SYM_IP_PROTO_ICMP = 1,\n+\tBNXT_ULP_SYM_IP_PROTO_IGMP = 2,\n+\tBNXT_ULP_SYM_IP_PROTO_IP_IN_IP = 4,\n+\tBNXT_ULP_SYM_IP_PROTO_TCP = 6,\n \tBNXT_ULP_SYM_IP_PROTO_UDP = 17,\n+\tBNXT_ULP_SYM_L2_HDR_ERROR_IGNORE = 0,\n+\tBNXT_ULP_SYM_L2_HDR_ERROR_NO = 0,\n+\tBNXT_ULP_SYM_L2_HDR_ERROR_YES = 1,\n \tBNXT_ULP_SYM_L2_HDR_TYPE_DIX = 0,\n+\tBNXT_ULP_SYM_L2_HDR_TYPE_IGNORE = 0,\n \tBNXT_ULP_SYM_L2_HDR_TYPE_LLC = 2,\n \tBNXT_ULP_SYM_L2_HDR_TYPE_LLC_SNAP = 1,\n+\tBNXT_ULP_SYM_L2_HDR_VALID_IGNORE = 0,\n+\tBNXT_ULP_SYM_L2_HDR_VALID_NO = 0,\n+\tBNXT_ULP_SYM_L2_HDR_VALID_YES = 1,\n+\tBNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE = 0,\n+\tBNXT_ULP_SYM_L2_TWO_VTAGS_NO = 0,\n+\tBNXT_ULP_SYM_L2_TWO_VTAGS_YES = 1,\n+\tBNXT_ULP_SYM_L2_UC_MC_BC_BC = 3,\n+\tBNXT_ULP_SYM_L2_UC_MC_BC_IGNORE = 0,\n+\tBNXT_ULP_SYM_L2_UC_MC_BC_MC = 2,\n+\tBNXT_ULP_SYM_L2_UC_MC_BC_UC = 0,\n+\tBNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE = 0,\n+\tBNXT_ULP_SYM_L2_VTAG_PRESENT_NO = 0,\n+\tBNXT_ULP_SYM_L2_VTAG_PRESENT_YES = 1,\n+\tBNXT_ULP_SYM_L3_HDR_ERROR_IGNORE = 0,\n+\tBNXT_ULP_SYM_L3_HDR_ERROR_NO = 0,\n+\tBNXT_ULP_SYM_L3_HDR_ERROR_YES = 1,\n+\tBNXT_ULP_SYM_L3_HDR_ISIP_IGNORE = 0,\n+\tBNXT_ULP_SYM_L3_HDR_ISIP_NO = 0,\n+\tBNXT_ULP_SYM_L3_HDR_ISIP_YES = 1,\n \tBNXT_ULP_SYM_L3_HDR_TYPE_ARP = 2,\n \tBNXT_ULP_SYM_L3_HDR_TYPE_EAPOL = 4,\n \tBNXT_ULP_SYM_L3_HDR_TYPE_FCOE = 6,\n+\tBNXT_ULP_SYM_L3_HDR_TYPE_IGNORE = 0,\n \tBNXT_ULP_SYM_L3_HDR_TYPE_IPV4 = 0,\n \tBNXT_ULP_SYM_L3_HDR_TYPE_IPV6 = 1,\n \tBNXT_ULP_SYM_L3_HDR_TYPE_PTP = 3,\n \tBNXT_ULP_SYM_L3_HDR_TYPE_ROCE = 5,\n \tBNXT_ULP_SYM_L3_HDR_TYPE_UPAR1 = 7,\n \tBNXT_ULP_SYM_L3_HDR_TYPE_UPAR2 = 8,\n+\tBNXT_ULP_SYM_L3_HDR_VALID_IGNORE = 0,\n+\tBNXT_ULP_SYM_L3_HDR_VALID_NO = 0,\n+\tBNXT_ULP_SYM_L3_HDR_VALID_YES = 1,\n+\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE = 0,\n+\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_NO = 0,\n+\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_YES = 1,\n+\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE = 0,\n+\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_NO = 0,\n+\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_YES = 1,\n+\tBNXT_ULP_SYM_L4_HDR_ERROR_IGNORE = 0,\n+\tBNXT_ULP_SYM_L4_HDR_ERROR_NO = 0,\n+\tBNXT_ULP_SYM_L4_HDR_ERROR_YES = 1,\n+\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0,\n+\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_NO = 0,\n+\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_YES = 1,\n \tBNXT_ULP_SYM_L4_HDR_TYPE_BTH_V1 = 5,\n \tBNXT_ULP_SYM_L4_HDR_TYPE_ICMP = 2,\n+\tBNXT_ULP_SYM_L4_HDR_TYPE_IGNORE = 0,\n \tBNXT_ULP_SYM_L4_HDR_TYPE_TCP = 0,\n \tBNXT_ULP_SYM_L4_HDR_TYPE_UDP = 1,\n \tBNXT_ULP_SYM_L4_HDR_TYPE_UPAR1 = 3,\n \tBNXT_ULP_SYM_L4_HDR_TYPE_UPAR2 = 4,\n+\tBNXT_ULP_SYM_L4_HDR_VALID_IGNORE = 0,\n+\tBNXT_ULP_SYM_L4_HDR_VALID_NO = 0,\n+\tBNXT_ULP_SYM_L4_HDR_VALID_YES = 1,\n \tBNXT_ULP_SYM_LITTLE_ENDIAN = 1,\n \tBNXT_ULP_SYM_MATCH_TYPE_EM = 0,\n \tBNXT_ULP_SYM_MATCH_TYPE_WM = 1,\n \tBNXT_ULP_SYM_NO = 0,\n+\tBNXT_ULP_SYM_PKT_TYPE_IGNORE = 0,\n \tBNXT_ULP_SYM_PKT_TYPE_L2 = 0,\n \tBNXT_ULP_SYM_POP_VLAN_NO = 0,\n \tBNXT_ULP_SYM_POP_VLAN_YES = 1,\n+\tBNXT_ULP_SYM_RECYCLE_CNT_IGNORE = 0,\n+\tBNXT_ULP_SYM_RECYCLE_CNT_ONE = 1,\n+\tBNXT_ULP_SYM_RECYCLE_CNT_THREE = 3,\n+\tBNXT_ULP_SYM_RECYCLE_CNT_TWO = 2,\n+\tBNXT_ULP_SYM_RECYCLE_CNT_ZERO = 0,\n+\tBNXT_ULP_SYM_RESERVED_IGNORE = 0,\n \tBNXT_ULP_SYM_STINGRAY2_LOOPBACK_PORT = 3,\n \tBNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT = 3,\n \tBNXT_ULP_SYM_THOR_LOOPBACK_PORT = 3,\n \tBNXT_ULP_SYM_TL2_HDR_TYPE_DIX = 0,\n+\tBNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL2_HDR_VALID_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL2_HDR_VALID_NO = 0,\n+\tBNXT_ULP_SYM_TL2_HDR_VALID_YES = 1,\n+\tBNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL2_TWO_VTAGS_NO = 0,\n+\tBNXT_ULP_SYM_TL2_TWO_VTAGS_YES = 1,\n+\tBNXT_ULP_SYM_TL2_UC_MC_BC_BC = 3,\n+\tBNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL2_UC_MC_BC_MC = 2,\n+\tBNXT_ULP_SYM_TL2_UC_MC_BC_UC = 0,\n+\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_NO = 0,\n+\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_YES = 1,\n+\tBNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL3_HDR_ERROR_NO = 0,\n+\tBNXT_ULP_SYM_TL3_HDR_ERROR_YES = 1,\n+\tBNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL3_HDR_ISIP_NO = 0,\n+\tBNXT_ULP_SYM_TL3_HDR_ISIP_YES = 1,\n+\tBNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE = 0,\n \tBNXT_ULP_SYM_TL3_HDR_TYPE_IPV4 = 0,\n \tBNXT_ULP_SYM_TL3_HDR_TYPE_IPV6 = 1,\n+\tBNXT_ULP_SYM_TL3_HDR_VALID_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL3_HDR_VALID_NO = 0,\n+\tBNXT_ULP_SYM_TL3_HDR_VALID_YES = 1,\n+\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_NO = 0,\n+\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_YES = 1,\n+\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_NO = 0,\n+\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_YES = 1,\n+\tBNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL4_HDR_ERROR_NO = 0,\n+\tBNXT_ULP_SYM_TL4_HDR_ERROR_YES = 1,\n+\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_NO = 0,\n+\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_YES = 1,\n+\tBNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE = 0,\n \tBNXT_ULP_SYM_TL4_HDR_TYPE_TCP = 0,\n \tBNXT_ULP_SYM_TL4_HDR_TYPE_UDP = 1,\n+\tBNXT_ULP_SYM_TL4_HDR_VALID_IGNORE = 0,\n+\tBNXT_ULP_SYM_TL4_HDR_VALID_NO = 0,\n+\tBNXT_ULP_SYM_TL4_HDR_VALID_YES = 1,\n+\tBNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE = 0,\n+\tBNXT_ULP_SYM_TUN_HDR_ERROR_NO = 0,\n+\tBNXT_ULP_SYM_TUN_HDR_ERROR_YES = 1,\n+\tBNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE = 0,\n \tBNXT_ULP_SYM_TUN_HDR_TYPE_GENEVE = 1,\n \tBNXT_ULP_SYM_TUN_HDR_TYPE_GRE = 3,\n+\tBNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE = 0,\n \tBNXT_ULP_SYM_TUN_HDR_TYPE_IPV4 = 4,\n \tBNXT_ULP_SYM_TUN_HDR_TYPE_IPV6 = 5,\n \tBNXT_ULP_SYM_TUN_HDR_TYPE_MPLS = 7,\n@@ -377,6 +479,9 @@ enum bnxt_ulp_sym {\n \tBNXT_ULP_SYM_TUN_HDR_TYPE_UPAR1 = 8,\n \tBNXT_ULP_SYM_TUN_HDR_TYPE_UPAR2 = 9,\n \tBNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN = 0,\n+\tBNXT_ULP_SYM_TUN_HDR_VALID_IGNORE = 0,\n+\tBNXT_ULP_SYM_TUN_HDR_VALID_NO = 0,\n+\tBNXT_ULP_SYM_TUN_HDR_VALID_YES = 1,\n \tBNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT = 3,\n \tBNXT_ULP_SYM_YES = 1\n };\n@@ -470,10 +575,14 @@ enum bnxt_ulp_act_prop_idx {\n };\n \n enum bnxt_ulp_class_hid {\n-\tBNXT_ULP_CLASS_HID_0013 = 0x0013\n+\tBNXT_ULP_CLASS_HID_0080 = 0x0080,\n+\tBNXT_ULP_CLASS_HID_0000 = 0x0000,\n+\tBNXT_ULP_CLASS_HID_0087 = 0x0087\n };\n \n enum bnxt_ulp_act_hid {\n+\tBNXT_ULP_ACT_HID_00a1 = 0x00a1,\n+\tBNXT_ULP_ACT_HID_0040 = 0x0040,\n \tBNXT_ULP_ACT_HID_0029 = 0x0029\n };\n \ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h\nindex 2655b83..f69082d 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h\n@@ -33,6 +33,87 @@ enum bnxt_ulp_hf0 {\n \tBNXT_ULP_HF0_IDX_O_UDP_CSUM              = 23\n };\n \n+enum bnxt_ulp_hf1 {\n+\tBNXT_ULP_HF1_IDX_SVIF_INDEX              = 0,\n+\tBNXT_ULP_HF1_IDX_O_ETH_DMAC              = 1,\n+\tBNXT_ULP_HF1_IDX_O_ETH_SMAC              = 2,\n+\tBNXT_ULP_HF1_IDX_O_ETH_TYPE              = 3,\n+\tBNXT_ULP_HF1_IDX_OO_VLAN_CFI_PRI         = 4,\n+\tBNXT_ULP_HF1_IDX_OO_VLAN_VID             = 5,\n+\tBNXT_ULP_HF1_IDX_OO_VLAN_TYPE            = 6,\n+\tBNXT_ULP_HF1_IDX_OI_VLAN_CFI_PRI         = 7,\n+\tBNXT_ULP_HF1_IDX_OI_VLAN_VID             = 8,\n+\tBNXT_ULP_HF1_IDX_OI_VLAN_TYPE            = 9,\n+\tBNXT_ULP_HF1_IDX_O_IPV4_VER              = 10,\n+\tBNXT_ULP_HF1_IDX_O_IPV4_TOS              = 11,\n+\tBNXT_ULP_HF1_IDX_O_IPV4_LEN              = 12,\n+\tBNXT_ULP_HF1_IDX_O_IPV4_FRAG_ID          = 13,\n+\tBNXT_ULP_HF1_IDX_O_IPV4_FRAG_OFF         = 14,\n+\tBNXT_ULP_HF1_IDX_O_IPV4_TTL              = 15,\n+\tBNXT_ULP_HF1_IDX_O_IPV4_NEXT_PID         = 16,\n+\tBNXT_ULP_HF1_IDX_O_IPV4_CSUM             = 17,\n+\tBNXT_ULP_HF1_IDX_O_IPV4_SRC_ADDR         = 18,\n+\tBNXT_ULP_HF1_IDX_O_IPV4_DST_ADDR         = 19,\n+\tBNXT_ULP_HF1_IDX_O_UDP_SRC_PORT          = 20,\n+\tBNXT_ULP_HF1_IDX_O_UDP_DST_PORT          = 21,\n+\tBNXT_ULP_HF1_IDX_O_UDP_LENGTH            = 22,\n+\tBNXT_ULP_HF1_IDX_O_UDP_CSUM              = 23\n+};\n+\n+enum bnxt_ulp_hf2 {\n+\tBNXT_ULP_HF2_IDX_SVIF_INDEX              = 0,\n+\tBNXT_ULP_HF2_IDX_O_ETH_DMAC              = 1,\n+\tBNXT_ULP_HF2_IDX_O_ETH_SMAC              = 2,\n+\tBNXT_ULP_HF2_IDX_O_ETH_TYPE              = 3,\n+\tBNXT_ULP_HF2_IDX_OO_VLAN_CFI_PRI         = 4,\n+\tBNXT_ULP_HF2_IDX_OO_VLAN_VID             = 5,\n+\tBNXT_ULP_HF2_IDX_OO_VLAN_TYPE            = 6,\n+\tBNXT_ULP_HF2_IDX_OI_VLAN_CFI_PRI         = 7,\n+\tBNXT_ULP_HF2_IDX_OI_VLAN_VID             = 8,\n+\tBNXT_ULP_HF2_IDX_OI_VLAN_TYPE            = 9,\n+\tBNXT_ULP_HF2_IDX_O_IPV4_VER              = 10,\n+\tBNXT_ULP_HF2_IDX_O_IPV4_TOS              = 11,\n+\tBNXT_ULP_HF2_IDX_O_IPV4_LEN              = 12,\n+\tBNXT_ULP_HF2_IDX_O_IPV4_FRAG_ID          = 13,\n+\tBNXT_ULP_HF2_IDX_O_IPV4_FRAG_OFF         = 14,\n+\tBNXT_ULP_HF2_IDX_O_IPV4_TTL              = 15,\n+\tBNXT_ULP_HF2_IDX_O_IPV4_NEXT_PID         = 16,\n+\tBNXT_ULP_HF2_IDX_O_IPV4_CSUM             = 17,\n+\tBNXT_ULP_HF2_IDX_O_IPV4_SRC_ADDR         = 18,\n+\tBNXT_ULP_HF2_IDX_O_IPV4_DST_ADDR         = 19,\n+\tBNXT_ULP_HF2_IDX_O_UDP_SRC_PORT          = 20,\n+\tBNXT_ULP_HF2_IDX_O_UDP_DST_PORT          = 21,\n+\tBNXT_ULP_HF2_IDX_O_UDP_LENGTH            = 22,\n+\tBNXT_ULP_HF2_IDX_O_UDP_CSUM              = 23,\n+\tBNXT_ULP_HF2_IDX_T_VXLAN_FLAGS           = 24,\n+\tBNXT_ULP_HF2_IDX_T_VXLAN_RSVD0           = 25,\n+\tBNXT_ULP_HF2_IDX_T_VXLAN_VNI             = 26,\n+\tBNXT_ULP_HF2_IDX_T_VXLAN_RSVD1           = 27,\n+\tBNXT_ULP_HF2_IDX_I_ETH_DMAC              = 28,\n+\tBNXT_ULP_HF2_IDX_I_ETH_SMAC              = 29,\n+\tBNXT_ULP_HF2_IDX_I_ETH_TYPE              = 30,\n+\tBNXT_ULP_HF2_IDX_IO_VLAN_CFI_PRI         = 31,\n+\tBNXT_ULP_HF2_IDX_IO_VLAN_VID             = 32,\n+\tBNXT_ULP_HF2_IDX_IO_VLAN_TYPE            = 33,\n+\tBNXT_ULP_HF2_IDX_II_VLAN_CFI_PRI         = 34,\n+\tBNXT_ULP_HF2_IDX_II_VLAN_VID             = 35,\n+\tBNXT_ULP_HF2_IDX_II_VLAN_TYPE            = 36,\n+\tBNXT_ULP_HF2_IDX_I_IPV4_VER              = 37,\n+\tBNXT_ULP_HF2_IDX_I_IPV4_TOS              = 38,\n+\tBNXT_ULP_HF2_IDX_I_IPV4_LEN              = 39,\n+\tBNXT_ULP_HF2_IDX_I_IPV4_FRAG_ID          = 40,\n+\tBNXT_ULP_HF2_IDX_I_IPV4_FRAG_OFF         = 41,\n+\tBNXT_ULP_HF2_IDX_I_IPV4_TTL              = 42,\n+\tBNXT_ULP_HF2_IDX_I_IPV4_NEXT_PID         = 43,\n+\tBNXT_ULP_HF2_IDX_I_IPV4_CSUM             = 44,\n+\tBNXT_ULP_HF2_IDX_I_IPV4_SRC_ADDR         = 45,\n+\tBNXT_ULP_HF2_IDX_I_IPV4_DST_ADDR         = 46,\n+\tBNXT_ULP_HF2_IDX_I_UDP_SRC_PORT          = 47,\n+\tBNXT_ULP_HF2_IDX_I_UDP_DST_PORT          = 48,\n+\tBNXT_ULP_HF2_IDX_I_UDP_LENGTH            = 49,\n+\tBNXT_ULP_HF2_IDX_I_UDP_CSUM              = 50\n+};\n+\n enum bnxt_ulp_hf_bitmask0 {\n \tBNXT_ULP_HF0_BITMASK_SVIF_INDEX          = 0x8000000000000000,\n \tBNXT_ULP_HF0_BITMASK_O_ETH_DMAC          = 0x4000000000000000,\n@@ -59,5 +140,85 @@ enum bnxt_ulp_hf_bitmask0 {\n \tBNXT_ULP_HF0_BITMASK_O_UDP_LENGTH        = 0x0000020000000000,\n \tBNXT_ULP_HF0_BITMASK_O_UDP_CSUM          = 0x0000010000000000\n };\n+enum bnxt_ulp_hf_bitmask1 {\n+\tBNXT_ULP_HF1_BITMASK_SVIF_INDEX          = 0x8000000000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_ETH_DMAC          = 0x4000000000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_ETH_SMAC          = 0x2000000000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_ETH_TYPE          = 0x1000000000000000,\n+\tBNXT_ULP_HF1_BITMASK_OO_VLAN_CFI_PRI     = 0x0800000000000000,\n+\tBNXT_ULP_HF1_BITMASK_OO_VLAN_VID         = 0x0400000000000000,\n+\tBNXT_ULP_HF1_BITMASK_OO_VLAN_TYPE        = 0x0200000000000000,\n+\tBNXT_ULP_HF1_BITMASK_OI_VLAN_CFI_PRI     = 0x0100000000000000,\n+\tBNXT_ULP_HF1_BITMASK_OI_VLAN_VID         = 0x0080000000000000,\n+\tBNXT_ULP_HF1_BITMASK_OI_VLAN_TYPE        = 0x0040000000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_IPV4_VER          = 0x0020000000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_IPV4_TOS          = 0x0010000000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_IPV4_LEN          = 0x0008000000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_IPV4_FRAG_ID      = 0x0004000000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_IPV4_FRAG_OFF     = 0x0002000000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_IPV4_TTL          = 0x0001000000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_IPV4_NEXT_PID     = 0x0000800000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_IPV4_CSUM         = 0x0000400000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_IPV4_SRC_ADDR     = 0x0000200000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_IPV4_DST_ADDR     = 0x0000100000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_UDP_SRC_PORT      = 0x0000080000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_UDP_DST_PORT      = 0x0000040000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_UDP_LENGTH        = 0x0000020000000000,\n+\tBNXT_ULP_HF1_BITMASK_O_UDP_CSUM          = 0x0000010000000000\n+};\n+\n+enum bnxt_ulp_hf_bitmask2 {\n+\tBNXT_ULP_HF2_BITMASK_SVIF_INDEX          = 0x8000000000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_ETH_DMAC          = 0x4000000000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_ETH_SMAC          = 0x2000000000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_ETH_TYPE          = 0x1000000000000000,\n+\tBNXT_ULP_HF2_BITMASK_OO_VLAN_CFI_PRI     = 0x0800000000000000,\n+\tBNXT_ULP_HF2_BITMASK_OO_VLAN_VID         = 0x0400000000000000,\n+\tBNXT_ULP_HF2_BITMASK_OO_VLAN_TYPE        = 0x0200000000000000,\n+\tBNXT_ULP_HF2_BITMASK_OI_VLAN_CFI_PRI     = 0x0100000000000000,\n+\tBNXT_ULP_HF2_BITMASK_OI_VLAN_VID         = 0x0080000000000000,\n+\tBNXT_ULP_HF2_BITMASK_OI_VLAN_TYPE        = 0x0040000000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_IPV4_VER          = 0x0020000000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_IPV4_TOS          = 0x0010000000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_IPV4_LEN          = 0x0008000000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_IPV4_FRAG_ID      = 0x0004000000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_IPV4_FRAG_OFF     = 0x0002000000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_IPV4_TTL          = 0x0001000000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_IPV4_NEXT_PID     = 0x0000800000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_IPV4_CSUM         = 0x0000400000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_IPV4_SRC_ADDR     = 0x0000200000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_IPV4_DST_ADDR     = 0x0000100000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_UDP_SRC_PORT      = 0x0000080000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_UDP_DST_PORT      = 0x0000040000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_UDP_LENGTH        = 0x0000020000000000,\n+\tBNXT_ULP_HF2_BITMASK_O_UDP_CSUM          = 0x0000010000000000,\n+\tBNXT_ULP_HF2_BITMASK_T_VXLAN_FLAGS       = 0x0000008000000000,\n+\tBNXT_ULP_HF2_BITMASK_T_VXLAN_RSVD0       = 0x0000004000000000,\n+\tBNXT_ULP_HF2_BITMASK_T_VXLAN_VNI         = 0x0000002000000000,\n+\tBNXT_ULP_HF2_BITMASK_T_VXLAN_RSVD1       = 0x0000001000000000,\n+\tBNXT_ULP_HF2_BITMASK_I_ETH_DMAC          = 0x0000000800000000,\n+\tBNXT_ULP_HF2_BITMASK_I_ETH_SMAC          = 0x0000000400000000,\n+\tBNXT_ULP_HF2_BITMASK_I_ETH_TYPE          = 0x0000000200000000,\n+\tBNXT_ULP_HF2_BITMASK_IO_VLAN_CFI_PRI     = 0x0000000100000000,\n+\tBNXT_ULP_HF2_BITMASK_IO_VLAN_VID         = 0x0000000080000000,\n+\tBNXT_ULP_HF2_BITMASK_IO_VLAN_TYPE        = 0x0000000040000000,\n+\tBNXT_ULP_HF2_BITMASK_II_VLAN_CFI_PRI     = 0x0000000020000000,\n+\tBNXT_ULP_HF2_BITMASK_II_VLAN_VID         = 0x0000000010000000,\n+\tBNXT_ULP_HF2_BITMASK_II_VLAN_TYPE        = 0x0000000008000000,\n+\tBNXT_ULP_HF2_BITMASK_I_IPV4_VER          = 0x0000000004000000,\n+\tBNXT_ULP_HF2_BITMASK_I_IPV4_TOS          = 0x0000000002000000,\n+\tBNXT_ULP_HF2_BITMASK_I_IPV4_LEN          = 0x0000000001000000,\n+\tBNXT_ULP_HF2_BITMASK_I_IPV4_FRAG_ID      = 0x0000000000800000,\n+\tBNXT_ULP_HF2_BITMASK_I_IPV4_FRAG_OFF     = 0x0000000000400000,\n+\tBNXT_ULP_HF2_BITMASK_I_IPV4_TTL          = 0x0000000000200000,\n+\tBNXT_ULP_HF2_BITMASK_I_IPV4_NEXT_PID     = 0x0000000000100000,\n+\tBNXT_ULP_HF2_BITMASK_I_IPV4_CSUM         = 0x0000000000080000,\n+\tBNXT_ULP_HF2_BITMASK_I_IPV4_SRC_ADDR     = 0x0000000000040000,\n+\tBNXT_ULP_HF2_BITMASK_I_IPV4_DST_ADDR     = 0x0000000000020000,\n+\tBNXT_ULP_HF2_BITMASK_I_UDP_SRC_PORT      = 0x0000000000010000,\n+\tBNXT_ULP_HF2_BITMASK_I_UDP_DST_PORT      = 0x0000000000008000,\n+\tBNXT_ULP_HF2_BITMASK_I_UDP_LENGTH        = 0x0000000000004000,\n+\tBNXT_ULP_HF2_BITMASK_I_UDP_CSUM          = 0x0000000000002000\n+};\n \n #endif\n",
    "prefixes": [
        "25/36"
    ]
}