get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/71031/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 71031,
    "url": "http://patches.dpdk.org/api/patches/71031/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200609120001.35110-25-qi.z.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200609120001.35110-25-qi.z.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200609120001.35110-25-qi.z.zhang@intel.com",
    "date": "2020-06-09T11:59:33",
    "name": "[v2,24/52] net/ice/base: adjust function signature style format",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "e0a383ba60e675903a20a89d1ef27b47e94ab9a5",
    "submitter": {
        "id": 504,
        "url": "http://patches.dpdk.org/api/people/504/?format=api",
        "name": "Qi Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "delegate": {
        "id": 31221,
        "url": "http://patches.dpdk.org/api/users/31221/?format=api",
        "username": "yexl",
        "first_name": "xiaolong",
        "last_name": "ye",
        "email": "xiaolong.ye@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200609120001.35110-25-qi.z.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 10359,
            "url": "http://patches.dpdk.org/api/series/10359/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10359",
            "date": "2020-06-09T11:59:09",
            "name": "net/ice: base code update",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/10359/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/71031/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/71031/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C3D84A0516;\n\tTue,  9 Jun 2020 13:59:56 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id F27611BF46;\n\tTue,  9 Jun 2020 13:57:04 +0200 (CEST)",
            "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 29C841BEA3\n for <dev@dpdk.org>; Tue,  9 Jun 2020 13:56:51 +0200 (CEST)",
            "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 09 Jun 2020 04:56:51 -0700",
            "from dpdk51.sh.intel.com ([10.67.111.82])\n by fmsmga005.fm.intel.com with ESMTP; 09 Jun 2020 04:56:49 -0700"
        ],
        "IronPort-SDR": [
            "\n AtZxcvJ6mOBCsFLuNbxq3+6jjtxL3wMCFPVRS9FxPQgZiM5zUyGvcFvSKTnqW07djLFos9epU4\n RfOBesqPRGvA==",
            "\n 1dnccE+Dpvs67jupIXx8Vk/2gvt8SgEqQSnKgmDxOZ2/cIPK6Ofc6HXLFzLWe/BcPFHv8UEJJo\n x5yU3uFmTFIg=="
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.73,492,1583222400\"; d=\"scan'208\";a=\"473044125\"",
        "From": "Qi Zhang <qi.z.zhang@intel.com>",
        "To": "qiming.yang@intel.com",
        "Cc": "xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Bruce Allan <bruce.w.allan@intel.com>,\n \"Paul M . Stillwell Jr\" <paul.m.stillwell.jr@intel.com>",
        "Date": "Tue,  9 Jun 2020 19:59:33 +0800",
        "Message-Id": "<20200609120001.35110-25-qi.z.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.13.6",
        "In-Reply-To": "<20200609120001.35110-1-qi.z.zhang@intel.com>",
        "References": "<20200603024016.30636-1-qi.z.zhang@intel.com>\n <20200609120001.35110-1-qi.z.zhang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2 24/52] net/ice/base: adjust function signature\n\tstyle format",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Where possible, cuddle multiple lines of function signatures to be\nconsistent throughout the code.\n\nSigned-off-by: Bruce Allan <bruce.w.allan@intel.com>\nSigned-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_common.c   |  3 +--\n drivers/net/ice/base/ice_controlq.c |  9 +++------\n drivers/net/ice/base/ice_dcb.c      |  3 +--\n drivers/net/ice/base/ice_fdir.c     |  5 ++---\n drivers/net/ice/base/ice_sched.c    | 21 +++++++--------------\n drivers/net/ice/base/ice_switch.c   | 17 ++++++-----------\n 6 files changed, 20 insertions(+), 38 deletions(-)",
    "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex a617643b6..d8d583bdf 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -1720,8 +1720,7 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)\n  * @num: number of resources\n  * @res: pointer to array that contains the resources to free\n  */\n-enum ice_status\n-ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)\n+enum ice_status ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)\n {\n \tstruct ice_aqc_alloc_free_res_elem *buf;\n \tenum ice_status status;\ndiff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c\nindex 47dde2f7c..3ef86fa03 100644\n--- a/drivers/net/ice/base/ice_controlq.c\n+++ b/drivers/net/ice/base/ice_controlq.c\n@@ -742,8 +742,7 @@ enum ice_status ice_create_all_ctrlq(struct ice_hw *hw)\n  *\n  * Destroys the send and receive queue locks for a given control queue.\n  */\n-static void\n-ice_destroy_ctrlq_locks(struct ice_ctl_q_info *cq)\n+static void ice_destroy_ctrlq_locks(struct ice_ctl_q_info *cq)\n {\n \tice_destroy_lock(&cq->sq_lock);\n \tice_destroy_lock(&cq->rq_lock);\n@@ -1040,8 +1039,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \tif (!cmd_completed) {\n \t\tif (rd32(hw, cq->rq.len) & cq->rq.len_crit_mask ||\n \t\t    rd32(hw, cq->sq.len) & cq->sq.len_crit_mask) {\n-\t\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n-\t\t\t\t  \"Critical FW error.\\n\");\n+\t\t\tice_debug(hw, ICE_DBG_AQ_MSG, \"Critical FW error.\\n\");\n \t\t\tstatus = ICE_ERR_AQ_FW_CRITICAL;\n \t\t} else {\n \t\t\tice_debug(hw, ICE_DBG_AQ_MSG,\n@@ -1167,8 +1165,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,\n \n \tice_debug(hw, ICE_DBG_AQ_DESC, \"ARQ: desc and buffer:\\n\");\n \n-\tice_debug_cq(hw, (void *)desc, e->msg_buf,\n-\t\t     cq->rq_buf_size);\n+\tice_debug_cq(hw, (void *)desc, e->msg_buf, cq->rq_buf_size);\n \n \t/* Restore the original datalen and buffer address in the desc,\n \t * FW updates datalen to indicate the event message size\ndiff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c\nindex 50634a145..6bdec18c0 100644\n--- a/drivers/net/ice/base/ice_dcb.c\n+++ b/drivers/net/ice/base/ice_dcb.c\n@@ -631,8 +631,7 @@ ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)\n  *\n  * Parse DCB configuration from the LLDPDU\n  */\n-enum ice_status\n-ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)\n+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)\n {\n \tstruct ice_lldp_org_tlv *tlv;\n \tenum ice_status ret = ICE_SUCCESS;\ndiff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c\nindex a62e6eeba..466e0ee36 100644\n--- a/drivers/net/ice/base/ice_fdir.c\n+++ b/drivers/net/ice/base/ice_fdir.c\n@@ -571,8 +571,7 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {\n  * ice_set_dflt_val_fd_desc\n  * @fd_fltr_ctx: pointer to fd filter descriptor\n  */\n-void\n-ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx)\n+void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx)\n {\n \tfd_fltr_ctx->comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;\n \tfd_fltr_ctx->comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW_FAIL;\n@@ -681,7 +680,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,\n \t\tfdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES;\n \t\tfdir_fltr_ctx.qindex = 0;\n \t} else if (input->dest_ctl ==\n-\t\t\tICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER) {\n+\t\t   ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER) {\n \t\tfdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO;\n \t\tfdir_fltr_ctx.qindex = 0;\n \t} else {\ndiff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c\nindex 0a46dd40b..2541103ad 100644\n--- a/drivers/net/ice/base/ice_sched.c\n+++ b/drivers/net/ice/base/ice_sched.c\n@@ -1932,8 +1932,7 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,\n  * This function removes single aggregator VSI info entry from\n  * aggregator list.\n  */\n-static void\n-ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)\n+static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)\n {\n \tstruct ice_sched_agg_info *agg_info;\n \tstruct ice_sched_agg_info *atmp;\n@@ -3079,8 +3078,7 @@ ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,\n  *\n  * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.\n  */\n-static void\n-ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)\n+static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)\n {\n \tif (bw == ICE_SCHED_DFLT_BW) {\n \t\tice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);\n@@ -3099,8 +3097,7 @@ ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)\n  *\n  * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.\n  */\n-static void\n-ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)\n+static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)\n {\n \tif (bw == ICE_SCHED_DFLT_BW) {\n \t\tice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);\n@@ -3125,8 +3122,7 @@ ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)\n  *\n  * Save or clear shared bandwidth (BW) in the passed param bw_t_info.\n  */\n-static void\n-ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)\n+static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)\n {\n \tif (bw == ICE_SCHED_DFLT_BW) {\n \t\tice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);\n@@ -3188,8 +3184,7 @@ ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,\n  *\n  * Save or clear priority (prio) in the passed param bw_t_info.\n  */\n-static void\n-ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)\n+static void ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)\n {\n \tbw_t_info->generic = prio;\n \tif (bw_t_info->generic)\n@@ -5355,8 +5350,7 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)\n  *\n  * This function replay TC nodes.\n  */\n-enum ice_status\n-ice_sched_replay_tc_node_bw(struct ice_port_info *pi)\n+enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)\n {\n \tenum ice_status status = ICE_SUCCESS;\n \tu8 tc;\n@@ -5479,8 +5473,7 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)\n  * This function replays association of VSI to aggregator type nodes, and\n  * node bandwidth information.\n  */\n-enum ice_status\n-ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)\n+enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)\n {\n \tstruct ice_port_info *pi = hw->port_info;\n \tenum ice_status status;\ndiff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex ab8b44de7..6387f9b84 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -1007,8 +1007,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,\n  * this array is the recipe ID and the element is the mapping of which profiles\n  * is this recipe mapped to.\n  */\n-static void\n-ice_get_recp_to_prof_map(struct ice_hw *hw)\n+static void ice_get_recp_to_prof_map(struct ice_hw *hw)\n {\n \tice_declare_bitmap(r_bitmap, ICE_MAX_NUM_RECIPES);\n \tu16 i;\n@@ -3511,8 +3510,7 @@ ice_add_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,\n  *\n  * Function add MAC rule for logical port from HW struct\n  */\n-enum ice_status\n-ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)\n+enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)\n {\n \tif (!m_list || !hw)\n \t\treturn ICE_ERR_PARAM;\n@@ -3710,8 +3708,7 @@ ice_add_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list,\n  *\n  * Function add VLAN rule for logical port from HW struct\n  */\n-enum ice_status\n-ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)\n+enum ice_status ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)\n {\n \tif (!v_list || !hw)\n \t\treturn ICE_ERR_PARAM;\n@@ -3814,7 +3811,6 @@ ice_add_eth_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list,\n \treturn ICE_SUCCESS;\n }\n \n-enum ice_status\n /**\n  * ice_add_eth_mac - Add a ethertype based filter rule\n  * @hw: pointer to the hardware structure\n@@ -3822,6 +3818,7 @@ enum ice_status\n  *\n  * Function add ethertype rule for logical port from HW struct\n  */\n+enum ice_status\n ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)\n {\n \tif (!em_list || !hw)\n@@ -4124,8 +4121,7 @@ ice_remove_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,\n  * @m_list: list of MAC addresses and forwarding information\n  *\n  */\n-enum ice_status\n-ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)\n+enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)\n {\n \tstruct ice_sw_recipe *recp_list;\n \n@@ -7415,8 +7411,7 @@ ice_rem_adv_rule_by_id(struct ice_hw *hw,\n  * as removing a rule fails, it will return immediately with the error code,\n  * else it will return ICE_SUCCESS\n  */\n-enum ice_status\n-ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)\n+enum ice_status ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)\n {\n \tstruct ice_adv_fltr_mgmt_list_entry *list_itr;\n \tstruct ice_vsi_list_map_info *map_info;\n",
    "prefixes": [
        "v2",
        "24/52"
    ]
}